NSCSCC/MIPS
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192 Commits 7 Branches 0 Tags 12 MiB
62e8ef7488
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192 Commits

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Author SHA1 Message Date
cxy004
62e8ef7488 game utils fix print 2021-08-16 04:47:19 +08:00
Paul Pan
26f85e06b0 Merge branch 'master' of https://git.builds.ninja/NSCSCC/MIPS 2021-08-16 04:39:03 +08:00
Paul Pan
a46f893896 update 2021-08-16 04:38:59 +08:00
cxy004
37dc9e6425 ping-pong li -> la 2021-08-16 04:34:43 +08:00
cxy004
b8a50b155f ping-pong init seg7 2021-08-16 04:02:33 +08:00
cxy004
9cc1b6aace Merge remote-tracking branch 'origin/master' 2021-08-16 02:18:28 +08:00
cxy004
5fdacc9278 ping-pong supv 2021-08-16 02:18:13 +08:00
Paul Pan
e24000d19b Merge branch 'master' of https://git.builds.ninja/NSCSCC/MIPS 2021-08-16 02:17:56 +08:00
Paul Pan
52c6546d65 fix forwarding 2021-08-16 02:17:52 +08:00
Hooo1941
7063c67687 add PRId 2021-08-16 01:14:21 +08:00
Paul Pan
9441581e8f game fix 2021-08-16 01:09:52 +08:00
cxy004
8a8c347962 game.S 2021-08-16 00:43:11 +08:00
Paul Pan
f1f47b7520 fix game 2021-08-15 23:00:43 +08:00
cxy004
1aa7ead513 ping-pong game.S 2021-08-15 22:55:41 +08:00
Paul Pan
216ee53089 pingpong update 
Co-authored-by: cxy004 <cxy004@qq.com>
 2021-08-15 17:50:00 +08:00
cxy004
3d0ed8add4 ping-pong update 2021-08-15 17:04:55 +08:00
cxy004
45d1909625 Merge remote-tracking branch 'origin/master' 2021-08-15 16:50:38 +08:00
cxy004
bb76bfece2 ping-pong 2021-08-15 16:50:28 +08:00
Paul Pan
302617b3dc fix cp0 IE 2021-08-15 16:14:43 +08:00
Paul Pan
f8f732bb70 update 
Co-authored-by: Hooo1941 <Hooo1941@users.noreply.github.com>
Co-authored-by: cxy004 <cxy004@qq.com>
 2021-08-15 11:25:08 +08:00
Paul Pan
997f34c7e7 ebase 2021-08-14 21:24:07 +08:00
Paul Pan
cbf99e1b33 tlb entries 32 -> 4 
Co-authored-by: cxy004 <cxy004@qq.com>
Co-authored-by: Hooo1941 <Hooo1941@users.noreply.github.com>
 2021-08-14 20:28:23 +08:00
Paul Pan
4a610a5093 update datapath 2021-08-14 20:19:01 +08:00
Paul Pan
cc81a4f3e4 soft update 2021-08-14 20:18:43 +08:00
Paul Pan
09e0644f08 try tlb optimize 
Co-authored-by: cxy004 <cxy004@qq.com>
Co-authored-by: Hooo1941 <Hooo1941@users.noreply.github.com>
 2021-08-13 22:47:58 +08:00
Paul Pan
eab17474ff add dev lib 2021-08-13 20:40:53 +08:00
Paul Pan
6fe89863b0 1. tlb test PASS 
2. testbench.sv

Co-authored-by: cxy004 <cxy004@qq.com>
 2021-08-13 18:28:04 +08:00
Paul Pan
638a4e60b1 fix mmu 
Co-authored-by: cxy004 <cxy004@qq.com>
Co-authored-by: Hooo1941 <Hooo1941@users.noreply.github.com>
 2021-08-13 13:16:32 +08:00
Paul Pan
27bda939f6 Merge branch 'master' of https://git.builds.ninja/NSCSCC/MIPS 2021-08-12 23:03:34 +08:00
Paul Pan
28752ef2f7 1. AXI add arsize control 
2. MMU & Cache fix bug (cached ff)

Co-authored-by: cxy004 <cxy004@qq.com>
 2021-08-12 23:03:29 +08:00
cxy004
9ac9b951fa decode tools 2021-08-12 21:40:52 +08:00
Paul Pan
22e469ceec 1. tlb: add soft 
2. datapath OFA fix2
3. datapath C0 hazard
4. MMU buffer

Co-authored-by: cxy004 <cxy004@qq.com>
Co-authored-by: Hooo1941 <Hooo1941@users.noreply.github.com>
 2021-08-12 21:38:30 +08:00
Paul Pan
d923ba69c5 datapath fix bug (clear OFA) 
Co-authored-by: cxy004 <cxy004@qq.com>
Co-authored-by: Hooo1941 <Hooo1941@users.noreply.github.com>
 2021-08-11 21:55:54 +08:00
Paul Pan
1153d3aab6 1. MMU fix bug (rvalid) 
2. I/D-Cache refactor

Co-authored-by: cxy004 <cxy004@qq.com>
Co-authored-by: Hooo1941 <Hooo1941@users.noreply.github.com>
 2021-08-11 20:39:24 +08:00
Paul Pan
bc549d8bd4 1. tlb control signals 
2. exccode rename
3. tlb datapath partial

Co-authored-by: cxy004 <cxy004@qq.com>
Co-authored-by: Hooo1941 <Hooo1941@users.noreply.github.com>
 2021-08-11 12:58:02 +08:00
Paul Pan
934a978aa7 update README 2021-08-11 09:27:35 +08:00
Paul Pan
578ef59555 1. tlb cp0 rw 
2. MyCPU top
3. Regfile delete test signals
4. MMU tlb exception signals
5. tlb reset
 2021-08-10 22:47:18 +08:00
Paul Pan
94e9b7bcbd tlb mmu with cache 
simplify AXI
 2021-08-10 21:34:12 +08:00
Paul Pan
a83967f9b9 TLB main 
Co-authored-by: Hooo1941 <Hooo1941@users.noreply.github.com>
Co-authored-by: cxy004 <cxy004@qq.com>
 2021-08-10 20:19:11 +08:00
Paul Pan
50b5a2ae04 TLB init 
Co-authored-by: Hooo1941 <Hooo1941@users.noreply.github.com>
 2021-08-09 23:26:49 +08:00
Paul Pan
24e13ae6c3 fix define 2021-08-08 20:39:26 +08:00
cxy004
5a9e2820a8 try dcache rst 2021-08-08 20:16:11 +08:00
Paul Pan
dccb3f5b8d fix registerfile en 2021-08-08 14:31:11 +08:00
Paul Pan
9be3f3697e fix gen 2021-08-05 18:23:21 +08:00
cxy004
2fd973d877 gen test 2021-08-05 18:22:15 +08:00
cxy004
1cad3f1d8c test genvar & LRU update 2021-08-05 18:12:13 +08:00
cxy004
39d5490971 try pcs 2021-08-05 00:24:31 +08:00
Paul Pan
cac2aad5f1 fix 2021-08-04 23:46:30 +08:00
Paul Pan
d97800ce76 fix 2021-08-04 23:36:59 +08:00
cxy004
834769dd98 mem write forward & LRU fix 2021-08-04 23:33:07 +08:00