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update datapath

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This commit is contained in:
Paul Pan 2021-08-14 20:19:01 +08:00
parent cc81a4f3e4
commit 4a610a5093
1 changed files with 6 additions and 6 deletions
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12
src/Core/Datapath.sv
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@ -864,8 +864,8 @@ module Datapath (
E_I1_STRBERROR
);
assign tlb_tlbp = E.I1.MCtrl.TLBP & E_I1_go & M.en & ~rstM;
assign mem_i.req = E.I1.MCtrl.MR & E_I1_goWithoutOF & M.en & ~rstM;
assign tlb_tlbp = E.I1.MCtrl.TLBP;
assign mem_i.req = E.I1.MCtrl.MR & E_I1_goWithoutOF & M.en & ~rstM;
assign mem_i.addr = E_I1_ForwardS + E.I1.imm;
assign mem_i.size = {E.I1.MCtrl.SZ[1], E.I1.MCtrl.SZ[0] & ~E.I1.MCtrl.SZ[1]};
// assign mem_i.addr = E.I1.ALUOut;
@ -1143,10 +1143,10 @@ module Datapath (
assign C0_wdata = M_I0_ForwardT;
// M.I1.MEM
assign tlb_tlbwi = M.I1.MCtrl.TLBWI;
assign c0_tlbr = M.I1.MCtrl.TLBR;
assign c0_tlbp = M.I1.MCtrl.TLBP;
assign mem_i.wr = M.I1.MCtrl.MWR;
assign tlb_tlbwi = M.I1.MCtrl.TLBWI;
assign c0_tlbr = M.I1.MCtrl.TLBR;
assign c0_tlbp = M.I1.MCtrl.TLBP & M.en;
assign mem_i.wr = M.I1.MCtrl.MWR;
memoutput M_I1_memoutput (
M.I1.ALUOut[1:0],
M_I1_ForwardT,