Commit Graph

20 Commits

Author SHA1 Message Date
a2f8fdae9b
clean up 2021-10-14 22:31:25 +08:00
4facc2dd10 enhanced test cases 2021-09-24 20:45:55 +08:00
a5192eb4d8 update README.md 2021-09-22 22:29:52 +08:00
62b26e3ab2 fix trap
add testcases
2021-09-22 16:26:40 +08:00
7e85ca17e3 refactor D-Cache CACHE inst 2021-09-06 22:36:37 +08:00
1f2d7f6f3c 1. fix deadlock on continuous CACHE inst
2. enhance the testcases
2021-09-04 21:07:00 +08:00
17f64e1f2f 1. add cache (D-Cache Address) inst
2. fix bug in ALR
3. fix bug in MMU and DCache
4. Register File rst
2021-09-02 19:20:19 +08:00
3dffdae575
try add D-Cache's CACHE inst 2021-09-01 23:12:58 +08:00
9be2310177
add MADD, MADDU, MSUB, MSUBU 2021-08-31 18:29:27 +08:00
2f22688aca
update README.md and fix bug in inst test 2021-08-30 15:59:21 +08:00
cf9d3e8ed0
fix bug in SWR 2021-08-29 20:16:57 +08:00
6cc760be79
SWL/SWR: update Datapath.sv and Gadgets.sv 2021-08-29 17:14:47 +08:00
1a51af6827 fix ADES 2021-08-25 22:00:59 +08:00
8d039f4327 handle CpU exception 2021-08-25 20:59:32 +08:00
5930267188
access violation exception (Address Error) 2021-08-25 16:18:52 +08:00
934a978aa7 update README 2021-08-11 09:27:35 +08:00
171371fc4f update readme 2021-07-07 16:13:40 +08:00
1986765cfe
[resource] rename 2021-06-18 15:43:51 +08:00
b67b1c522f
[fpga] add on board top file 2021-05-22 20:57:12 +08:00
f47e3b47aa
init 2021-05-22 16:43:39 +08:00