9efca75d1e
* Refactor RISCV port Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Changes to make re-factoring work on ESP32-C3 Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Remove alignment and place handlers in separate sections Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Correct section names This is needed so that the assemblers correctly recognizes functions. Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Move mtvec programming to the application Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Refactor mtimer udpate code Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Move critical nesting to port layer Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Respect configTASK_RETURN_ADDRESS Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Formatting changes Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> |
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.. | ||
ARM7_AT91FR40008 | ||
ARM7_AT91SAM7S | ||
ARM7_LPC23xx | ||
ARM7_LPC2000 | ||
ARM_CA9 | ||
ARM_CA53_64_BIT | ||
ARM_CA53_64_BIT_SRE | ||
ARM_CM0 | ||
ARM_CM3 | ||
ARM_CM3_MPU | ||
ARM_CM4_MPU | ||
ARM_CM4F | ||
ARM_CM7 | ||
ARM_CM23 | ||
ARM_CM23_NTZ/non_secure | ||
ARM_CM33 | ||
ARM_CM33_NTZ/non_secure | ||
ARM_CR5 | ||
ARM_CRx_No_GIC | ||
ATMega323 | ||
AVR32_UC3 | ||
AVR_AVRDx | ||
AVR_Mega0 | ||
ColdFire_V2 | ||
CORTUS_APS3 | ||
H8S2329 | ||
HCS12 | ||
IA32_flat | ||
MCF5235 | ||
MicroBlaze | ||
MicroBlazeV8 | ||
MicroBlazeV9 | ||
MSP430F449 | ||
NiosII | ||
PPC405_Xilinx | ||
PPC440_Xilinx | ||
RISC-V | ||
RL78 | ||
RX100 | ||
RX200 | ||
RX600 | ||
RX600v2 | ||
RX700v3_DPFPU | ||
STR75x | ||
TriCore_1782 |