Fix: Interrut Handler Register Function and Exception Process (#41)
Signed-off-by: shiode <shiode@aptpod.co.jp> Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com> Co-authored-by: David Chalco <59750547+dachalco@users.noreply.github.com> Co-authored-by: Joseph Julicher <jjulicher@mac.com>
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@ -36,6 +36,7 @@
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/* Altera includes. */
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#include "sys/alt_irq.h"
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#include "sys/alt_exceptions.h"
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#include "altera_avalon_timer_regs.h"
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#include "priv/alt_irq_table.h"
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@ -46,6 +47,8 @@
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/* Interrupts are enabled. */
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#define portINITIAL_ESTATUS ( StackType_t ) 0x01
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int _alt_ic_isr_register(alt_u32 ic_id, alt_u32 irq, alt_isr_func isr,
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void *isr_context, void *flags);
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/*-----------------------------------------------------------*/
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/*
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@ -56,7 +59,7 @@ static void prvSetupTimerInterrupt( void );
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/*
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* Call back for the alarm function.
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*/
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void vPortSysTickHandler( void * context, alt_u32 id );
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void vPortSysTickHandler( void * context);
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/*-----------------------------------------------------------*/
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@ -137,7 +140,7 @@ void vPortEndScheduler( void )
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void prvSetupTimerInterrupt( void )
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{
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/* Try to register the interrupt handler. */
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if ( -EINVAL == alt_irq_register( SYS_CLK_IRQ, 0x0, vPortSysTickHandler ) )
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if ( -EINVAL == _alt_ic_isr_register( SYS_CLK_IRQ_INTERRUPT_CONTROLLER_ID, SYS_CLK_IRQ, vPortSysTickHandler, 0x0, 0x0 ) )
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{
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/* Failed to install the Interrupt Handler. */
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asm( "break" );
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@ -156,7 +159,7 @@ void prvSetupTimerInterrupt( void )
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}
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/*-----------------------------------------------------------*/
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void vPortSysTickHandler( void * context, alt_u32 id )
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void vPortSysTickHandler( void * context)
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{
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/* Increment the kernel tick. */
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if( xTaskIncrementTick() != pdFALSE )
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@ -175,25 +178,27 @@ void vPortSysTickHandler( void * context, alt_u32 id )
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* kernel has its scheduler started so that contexts are saved and switched
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* correctly.
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*/
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int alt_irq_register( alt_u32 id, void* context, void (*handler)(void*, alt_u32) )
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int _alt_ic_isr_register(alt_u32 ic_id, alt_u32 irq, alt_isr_func isr,
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void *isr_context, void *flags)
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{
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int rc = -EINVAL;
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alt_irq_context status;
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int id = irq; /* IRQ interpreted as the interrupt ID. */
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if (id < ALT_NIRQ)
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{
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/*
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* interrupts are disabled while the handler tables are updated to ensure
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* that an interrupt doesn't occur while the tables are in an inconsistent
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* that an interrupt doesn't occur while the tables are in an inconsistant
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* state.
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*/
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status = alt_irq_disable_all ();
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alt_irq[id].handler = handler;
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alt_irq[id].context = context;
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alt_irq[id].handler = isr;
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alt_irq[id].context = isr_context;
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rc = (handler) ? alt_irq_enable (id): alt_irq_disable (id);
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rc = (isr) ? alt_ic_irq_enable(ic_id, id) : alt_ic_irq_disable(ic_id, id);
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/* alt_irq_enable_all(status); This line is removed to prevent the interrupt from being immediately enabled. */
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}
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@ -34,11 +34,10 @@
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.globl restore_sp_from_pxCurrentTCB
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# Entry point for exceptions.
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.section .exceptions.entry, "xa"
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.section .exceptions.entry.user, "xa"
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# Save the entire context of a task.
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save_context:
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addi ea, ea, -4 # Point to the next instruction.
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addi sp, sp, -116 # Create space on the stack.
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stw ra, 0(sp)
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# Leave a gap for muldiv 0
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@ -59,7 +58,8 @@ save_context:
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stw r15, 64(sp)
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rdctl r5, estatus # Save the eStatus
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stw r5, 68(sp)
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stw ea, 72(sp) # Save the PC
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addi r15, ea, -4 # Instruction that caused exception
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stw r15, 72(sp) # Save as EA
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stw r16, 76(sp) # Save the remaining registers
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stw r17, 80(sp)
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stw r18, 84(sp)
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@ -75,24 +75,13 @@ save_sp_to_pxCurrentTCB:
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movia et, pxCurrentTCB # Load the address of the pxCurrentTCB pointer
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ldw et, (et) # Load the value of the pxCurrentTCB pointer
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stw sp, (et) # Store the stack pointer into the top of the TCB
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.section .exceptions.irqtest, "xa"
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hw_irq_test:
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/*
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* Test to see if the exception was a software exception or caused
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* by an external interrupt, and vector accordingly.
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*/
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rdctl r4, ipending # Load the Pending Interrupts indication
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rdctl r5, estatus # Load the eStatus (enabled interrupts).
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andi r2, r5, 1 # Are interrupts enabled globally.
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beq r2, zero, soft_exceptions # Interrupts are not enabled.
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beq r4, zero, soft_exceptions # There are no interrupts triggered.
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.section .exceptions.irqhandler, "xa"
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hw_irq_handler:
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call alt_irq_handler # Call the alt_irq_handler to deliver to the registered interrupt handler.
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br irq_test_user # skip the section .exceptions.entry
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.section .exceptions.irqreturn, "xa"
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.section .exceptions.irqtest, "xa"
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irq_test_user:
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.section .exceptions.exit.user, "xa"
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restore_sp_from_pxCurrentTCB:
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movia et, pxCurrentTCB # Load the address of the pxCurrentTCB pointer
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ldw et, (et) # Load the value of the pxCurrentTCB pointer
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@ -135,16 +124,16 @@ restore_context:
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.section .exceptions.soft, "xa"
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soft_exceptions:
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ldw et, 0(ea) # Load the instruction where the interrupt occured.
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movhi at, %hi(0x003B683A) # Load the registers with the trap instruction code
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ori at, at, %lo(0x003B683A)
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cmpne et, et, at # Compare the trap instruction code to the last excuted instruction
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beq et, r0, call_scheduler # its a trap so switchcontext
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break # This is an un-implemented instruction or muldiv problem.
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br restore_context # its something else
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movhi r3, 0x003b /* upper half of trap opcode */
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ori r3, r3, 0x683a /* lower half of trap opcode */
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beq r2, r3, call_scheduler
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br exceptions_unknown_user # its something else
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call_scheduler:
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addi ea, ea, 4 # A trap was called, increment the program counter so it is not called again.
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stw ea, 72(sp) # Save the new program counter to the context.
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stw ea, 72(sp) # EA is PC+4 so will skip over instruction causing exception
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call vTaskSwitchContext # Pick the next context.
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br restore_sp_from_pxCurrentTCB # Switch in the task context and restore.
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.section .exceptions.unknown.user
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exceptions_unknown_user:
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