Commit Graph

459 Commits

Author SHA1 Message Date
Gaurav Aggarwal
2c88fb7fa1 Fix build failure when dynamic allocation is not enabled.
When dynamic allocation is not enabled, vPortFree is not available. The current code used
vPortFree and this resulted in linker error. This commit removes the use of vPortFree when
dynamic allocation is not enabled.
2019-02-16 20:21:47 +00:00
Richard Barry
6844bef74f Replace the pdf RISC-V documentation with links to the documentation web pages. 2019-02-16 01:15:33 +00:00
Richard Barry
b2b1b09ea5 Fix bug in core_cm3.c atomic macros.
Rename the portable/GCC/RISC-V-RV32 directory to just RISC-V as also adding support for 64-bit cores.
2019-02-16 01:08:38 +00:00
Richard Barry
fb73829148 Ensure eTaskGetState() is brought in automatically if INCLUDE_xTaskAbortDelay is set to 1, as it is a dependency of eTaskGetState().
Added the portTASK_FUNCTION_PROTO macros around the timer task, as the macros are already used by the idle task.
Add a PDF of the RISC-V documentation into the repo as the web page is not yet live.
2019-02-08 01:18:08 +00:00
Richard Barry
df5952f655 Add xTaskGetIdleRunTimeCounter() API function to return the run time stats counter for the idle task - useful for POSIX time implementations. 2019-01-21 23:39:48 +00:00
Gaurav Aggarwal
817783d75c Copyright updates from Cadence.
e1df894752
2019-01-16 19:01:25 +00:00
Richard Barry
11d9c440b8 Move the 'generic' version of freertos_risc_v_chip_specific_extensions.h back to a sub-directory as having it in the RISC-V port's base directory was causing SoftConsole to pick up the wrong version (for an unknown reason).
Add a project for the Vega board's RI5CY core.
2018-12-31 18:19:52 +00:00
Richard Barry
e2af102c80 Re-org of RISC-V file structure and naming step 2. 2018-12-30 23:53:47 +00:00
Richard Barry
818eeccc0c Re-org of RISC-V file structure and naming step 1. 2018-12-30 23:20:26 +00:00
Richard Barry
db750d0c82 Update RSIC-V port layer after testing saving and receiving of chip specific registers. 2018-12-30 23:11:40 +00:00
Richard Barry
60b133b2c6 Move the RISC-V pxPortInitialiseStack() implementation to the assembly port file from the C port file so it can have access to the number of chip specific registers it needs to save space for on the stack. 2018-12-30 20:00:43 +00:00
Richard Barry
d369110167 Allow the size of the stack used by many of the standard demo/test tasks to be overridden by FreeRTOSConfig.h settings.
Update the Freedom Studio RISC-V project so the 'full' build configuration is now functional.
2018-12-28 00:44:18 +00:00
Richard Barry
ce36928ea8 Rename directories in the RISC-V port. 2018-12-24 17:37:02 +00:00
Richard Barry
148f588f56 Remove "FromISR' functions from the list of functions that switch to a privileged mode as IRQs are privileged already.
Add the vTimerSetReloadMode() API function.
2018-12-17 22:04:18 +00:00
Richard Barry
101806906d Rework RISC-V portASM.S to make it easier to add in chip specific RISC-V extensions and accommodate chips that don't include the CLINT. 2018-12-16 23:59:49 +00:00
Richard Barry
7cc42b2ab6 Save changes to the RISC-V port layer before making changes necessary to support pulpino too:
+ Switch positions of the asm functions used to start the kernel and handle traps to enable one to reference to the other.
+ Handle external interrupts (working with Renode emulator).
+ The _sp linker variable is now called __freertos_irq_stack_top.
2018-12-16 20:21:29 +00:00
Richard Barry
65f7a2dc19 Update RISC-V port to use a separate interrupt stack. 2018-12-04 01:23:41 +00:00
Richard Barry
e85ea96f78 Some efficiency improvements in Risc-V port. 2018-11-28 19:35:40 +00:00
Richard Barry
dc99300fa9 First task running in RISC-V-Qemu-sifive_e-FreedomStudio demo. 2018-11-24 20:59:07 +00:00
Richard Barry
db64297487 Provide each Risc V task with an initial mstatus register value. 2018-11-20 20:12:35 +00:00
Richard Barry
8cef339aec Update Risc-V port to use environment call in place of software interrupt - still very much a work in progress. 2018-11-19 06:01:29 +00:00
Richard Barry
baee711cb6 Continue work on Risc V port. 2018-11-06 02:04:28 +00:00
Richard Barry
74d0d16aab Update xTaskRemoveFromEventList() so when tickless idle is used prvResetNextTaskUnblockTime() only gets called if the scheduler is not locked, as it would get called when the scheduler is unlocked in any case. 2018-11-05 19:35:54 +00:00
Richard Barry
55ff89373a Update the method used to detect if a timer is active. Previously the timer was deemed to be inactive if it was not referenced from a list. However, when a timer is updated it is temporarily removed from, then re-added to a list, so now the timer's active status is stored separately. 2018-10-24 21:37:59 +00:00
Richard Barry
6fab2b9e0d Add xTaskGetApplicationTaskTagFromISR(), which is an interrupt safe version of xTaskGetApplicationTaskTagFrom(). 2018-10-08 15:10:18 +00:00
Richard Barry
c6de0001fa Added uxTaskGetStackHighWaterMark2(), which is the same as uxTaskGetStackHighWaterMark() other than the return type.
Allows the task name parameter passed into xTaskCreate() to be NULL.
2018-09-30 21:50:05 +00:00
Richard Barry
e3dc5e934b RISC-V tasks now context switching to each other using taskYIELD() - not fully tested yet. 2018-09-27 17:25:17 +00:00
Richard Barry
2bcb1ab02b Add trap handler to RISC-V port so there is no dependency on third party code. 2018-09-23 03:52:23 +00:00
Richard Barry
32f35e9130 RISC-V:
Added code to setup the timer interrupt - not tested yet.
Added the taskYIELD() implementation - so far just checked it generates an interrupt.
2018-09-12 16:33:05 +00:00
Richard Barry
b11eb3a59c RISC-V work in progress:
+ Initialise task stack.
    + Successfully jump to start of first task.
2018-09-10 20:50:05 +00:00
Richard Barry
0c0f0d0f8f Minor synching - no functional changes. 2018-09-07 22:24:51 +00:00
Richard Barry
92ae8e7aff Update version numbers ready for release. 2018-09-07 18:13:20 +00:00
Richard Barry
be9c0730c3 Update trace recorder code to the latest.
Some minor changes to enable the configREMOVE_STATIC_QUALIFIER constant to be used by those debuggers that cannot cope with statics being used.
2018-09-06 03:23:03 +00:00
Richard Barry
21a8ff35dd Two minor updates in the comments to fix html formatting that was preventing doxygen creating documents correctly. 2018-09-01 02:42:34 +00:00
Richard Barry
e2750cd388 Case unused return values for memset and memcpy to void in stream_buffer.c to avoid compiler warnings when the warning level is turned up.
Remove duplicate comment in heap_1.c.
2018-08-29 15:43:41 +00:00
Richard Barry
0d6e3df7ec Minor updates to fix issues with the Segger kernel aware plug since V10.1.0. 2018-08-28 18:10:42 +00:00
Richard Barry
893db45834 Changes required for the IAR StateViewer plug-in to work with FreeRTOS V10.1.0. 2018-08-27 23:11:28 +00:00
Richard Barry
b0ce1f61c9 Move some variables from function scope back to being file scope for the benefit of some kernel aware debuggers that were left working in a non-functioning mode after the V10.1.0 release - not last change for this purpose. 2018-08-27 21:59:26 +00:00
Richard Barry
3a1631fda3 Update copyright date ready for tagging V10.1.0. 2018-08-22 23:23:03 +00:00
Richard Barry
fb9de58f56 Update version numbers in preparation for a new release. 2018-08-21 19:50:48 +00:00
Richard Barry
722ca8fb2b Update demo project for Tensilita - work in progres..
Add support for POSIX style errno - work in progress.
2018-08-21 19:37:04 +00:00
Richard Barry
78d20e2854 Only include the static definition of freertos_tasks_c_additions_init if FREERTOS_TASKS_C_ADDITIONS_INIT is defined, matching the guide used to include the function's prototype. 2018-08-20 15:08:35 +00:00
Gaurav Aggarwal
56dc0dd9b4 Merge bug fixes from Cadence 2018-08-07 07:21:07 +00:00
Richard Barry
f6cbf20019 Update RISC-V project to used official port stubs in place of third party port. 2018-07-07 21:54:41 +00:00
Richard Barry
3bfc32d444 Add stubs for official RISC-V RV32 port. 2018-07-07 21:47:31 +00:00
Richard Barry
0887713969 Fix issues whereby vStreamBufferReset() clobbered the flag that indicated the stream buffer was statically allocated. 2018-06-20 21:21:55 +00:00
Richard Barry
483f4a8c4b Small change to the directory name in which the RISC-V port is stored. 2018-06-20 21:15:04 +00:00
Richard Barry
3d8d2f3cc8 Add RISCV port layer. 2018-06-20 19:21:18 +00:00
Gaurav Aggarwal
c4b1afc4ef Add Xtensa port
The project file is for Xtensa Xplorer simulator.
Also add tests for one size stream buffer.
2018-06-14 19:43:17 +00:00
Richard Barry
d6fcd5dbba Add the option to specify a stack size in the standard demo MessageBuffer tests.
Add stream and message buffer tests into the Zynq demo project.
2018-06-13 16:50:16 +00:00
Richard Barry
4fbcdbf13b Fix misra violations in queue.c by introducing a union that allows the correct data types to be used in place of void *, then tidy up where the union is used. 2018-06-11 18:51:53 +00:00
Richard Barry
4a8c4c9eaf TimerHandle_t is now type safe instead of void *.
Remove casts that are no longer required not type safe handles are used.
2018-06-11 04:43:12 +00:00
Richard Barry
3d8681de9e Continue updating to MISRA 2012 from 2004 - currently working on queue.c and committing as working copy prior to making larger change.
Change QueueHandle_t to be typesafe from void *.
Change StreamBuffer_t to be typesafe from void *.
2018-06-11 01:56:32 +00:00
Richard Barry
7a9f453f96 Remove casts from EventGroupHandle_t to EventGroup_t, and corresponding lint comments, which are not required now EventGroupHandle_t is type safe.
Fix the prototype of prvTimerCallback() in the MPU simulator demo (caught due to the new type safety in tasks.c).
2018-06-04 04:02:57 +00:00
Richard Barry
390fb06b49 First pass at updating from MISRA 2004 to MISRA 2012:
Updated pvContainer member of list items to List_t * rather than void * as they are always contained in a list if anywhere.
Made EventGroupHandle_t typesafe pointer to forward referenced struct rather than void pointer.
Made TaskHandle_t typesafe pointer to forward referenced struct, rather than a void pointer.
2018-06-03 22:57:46 +00:00
Richard Barry
5bebf10fa4 Minor updates to comments only. 2018-05-17 17:50:14 +00:00
Richard Barry
585b16a39f Update definition of StaticTimer_t so its size is correct on MSP403X large memory model builds. 2018-05-07 16:31:50 +00:00
Richard Barry
a3148ba638 xTaskGenericNotify() now sets xYieldPending to pdTRUE even when the 'higher priority task woken' parameter is provided - making its behaviour consistent with event objects.
Ensure tasks that are blocked indefinitely on a direct to task notification return their state as eBlocked, previously was returned as eSuspended - making its behaviour consistent with event objects.
Fix typo in stream_buffer.c where "size_t xBytesAvailable ); PRIVILEGED_FUNCTION" had the semicolon in the wrong place.
Add testing of Stream Buffers to the AbortDelay.c tests.
Guard inclusion of C code when FreeRTOSConfig.h is included from an assembly file in the ARM7_LPC2129_IAR demo.
Fix minor typos in the Windows demo comment blocks.
2018-04-29 18:15:38 +00:00
Richard Barry
025088c280 Fix regressions introduced by introduction of configMESSAGE_BUFFER_LENGTH_TYPE constant - specifically enabling big endian support and updates to xStreamBufferNextMessageLengthBytes. 2018-03-15 18:31:02 +00:00
Richard Barry
3ec86b7a98 Introduce sbBYTES_TO_STORE_MESSAGE_LENGTH to allow the number of bytes used to hold a message length in a message buffer to be reduced if 4 bytes is always too many (save a little RAM). 2018-03-15 15:51:22 +00:00
Richard Barry
aec45f2479 Import the code coverage test additions from the (unpublished) Visual Studio project to the (published) MingW/Eclipse project.
Update the MingW/Eclipse project to add a code coverage build configuration in addition to the existing Debug build configuration.
Update StreamBufferDemo.c so functions are called directly, rather than via configASSERT(), so their code coverage can be measured when configASSERT() is not defined.
In the Win32 port, replace the call to TerminateProcess() in vPortEndScheduler() with exit( 0 ) - which triggers the writing of the code coverage data to the disk.
Fix bug in ucStreamBufferGetStreamBufferType() - which is only used by the Percepio trace tool.
Update the line within vTaskStartScheduler() that was setting xTickCount to 0 to instead set it to configINITIAL_TICK_COUNT.
2018-03-14 15:58:47 +00:00
Richard Barry
bf8d9f4726 Start moving code coverage tests from VisualStudio (not checked in) to the MingW project (checked in) by creating a second build configuration in the Windows Eclipse project that includes the code coverage command line options. Additionally make minor code updates to ensure configASSERT() is not defined, and the application runs for a finite time, when the code coverage build configuration is used. 2018-03-06 17:23:55 +00:00
Richard Barry
f9bef06ec0 Introduce xMessageBufferNextLengthBytes() and tests for the same.
Add call to traceTASK_SWITCHED_IN() in vTaskStartScheduler() so trace tools can see the first task to run.
2018-03-04 19:25:14 +00:00
Richard Barry
9ed3a9fe18 Fix buffer clean up in \FreeRTOS_Plus_TCP_Minimal_Windows_Simulator\demo_logging.c.
Update queue code to allow an overwrite operation on a queue that is in a queue set, and add prvTestQueueOverwriteWithQueueSet() to test function.
Update Eclipse Win32 project to bring it closer the the Visual Studio equivalent.
2018-02-26 21:22:44 +00:00
Richard Barry
7ddb8b342d Microblaze port: Place critical section around XIntc_Enable() to protect read/modify/write operation performed inside the library. 2018-01-30 17:42:12 +00:00
Richard Barry
208cc18a90 Ensure data cannot be sent to a TCP socket if the socket is in the process of closing.
Correct definition of StaticTask_t in the case that portUSE_MPU_WRAPPERS is set to 1.
prvTaskCheckFreeStackSpace() now returns configSTACK_DEPTH_TYPE to allow return values greater than max uint16_t value if required.
xStreamBufferSend() and xStreamBufferReceive() no longer clear task notification bits - clearing was unnecessary as only the task notification state is used.
2018-01-30 17:39:14 +00:00
Richard Barry
0fe82b4d91 Correct out of date comment in tasks.c.
Fix typo in comment in queue.h.
2017-12-28 20:20:26 +00:00
Richard Barry
13651934be Roll up the minor changes checked into svn since V10.0.0 into new V10.0.1 ready for release. 2017-12-18 22:54:18 +00:00
Richard Barry
0d903cf2d6 FreeRTOS+TCP: Added ipconfigSOCKET_HAS_USER_WAKE_CALLBACK configuration option so the user can specify a callback to execute when data arrives.
FreeRTOS+TCP: Improve print output when using WinPCap to assist in selecting the correct network interface.
FreeRTOS kernel: Fix extern "C" { in stream_buffer.h.
FreeRTOS kernel: Correct tskKERNEL_VERSION_NUMBER and tskKERNEL_VERSION_MAJOR constants for V10.
Ensure the currently executing task is printed correctly in vTaskList().
2017-12-12 17:47:56 +00:00
Richard Barry
cfc268814a Update to MIT licensed FreeRTOS V10.0.0 - see https://www.freertos.org/History.txt 2017-11-29 16:53:26 +00:00
Richard Barry
037abdddf2 Update TriCore port to work with latest GCC compiler. 2017-08-09 16:57:35 +00:00
Richard Barry
6eea3d8d4b Correct long time mis-spelled portINITIAL_EXEC_RETURN to portINITIAL_EXC_RETURN 2017-05-30 00:36:09 +00:00
Richard Barry
2887612f27 FreeRTOS.h changes to go with the last tasks.c checkin. 2017-05-29 23:08:34 +00:00
Richard Barry
b5d8be2209 Remove obsolete code from prvCheckTasksWaitingTermination(). 2017-05-29 22:55:09 +00:00
Richard Barry
59925359ed Added traceQUEUE_CREATE_FAILED() trace macros into the queue create functions. 2017-04-10 01:58:58 +00:00
Richard Barry
b080f13543 Add more "memory" clobbers into the MPU ports to make them robust to more aggressive optimisation in newer GCC version. 2017-04-10 01:58:01 +00:00
Richard Barry
0f85ead175 Add more "memory" clobbers into asm code of GCC/ARM_CRx_No_GIC port to make it robust with higher optimisation in newer versions of GCC. 2017-04-10 01:01:11 +00:00
Richard Barry
0a7a0a79d6 Updates to prevent warnings when compiled with LLVM. 2017-04-10 00:26:22 +00:00
Richard Barry
8ca40d80a9 Ensure the PIC32 interrupt stack is 8 byte aligned for all values of configISR_STACK_SIZE. 2017-04-09 20:13:48 +00:00
Richard Barry
464c2660ad Updates to the Cortex-M tickless idle code to reduce clock slippage.
Updates to prevent the vTaskSwitchContext() function being removed from GCC builds when link time optimisation is used.
2017-03-28 03:13:48 +00:00
Richard Barry
aa810cb926 Ensure vTaskGetInfo() sets the sate of the currently running task to eRunning - previously it was set to eReady. 2017-03-27 20:31:03 +00:00
Richard Barry
ad5659e93d Housekeeping check-in, no code changes. 2017-03-08 22:19:14 +00:00
Richard Barry
b9fe24962e Add additional memory barriers into ARM GCC asm code to ensure no re-ordering across asm code as optimisers get more aggressive. 2017-03-07 04:06:10 +00:00
Richard Barry
c3acc441ac Introduce vTaskInternalSetTimeOutState() which does not have a critical section, and add a critical section to the public version of the same. 2017-02-24 02:16:54 +00:00
Richard Barry
8d041c8e21 Update version number in preparation for maintenance release. 2017-01-22 05:28:13 +00:00
Richard Barry
992a3c8c71 Update BSP source files for UltraScale Cortex-A53 and Cortex-R5 and Microblaze to the 2016.4 versions.
Correct alignment issue in GCC Cortex-R port that was preventing full floating point usage in interrupts (other ports will be updated likewise).
Update the UltraScale R5 demo to test the GCC Cortex-A9 port layer modification mentioned on the line above.
2017-01-19 04:11:21 +00:00
Richard Barry
6ffaa6f018 Correct alignment issue in GCC and RVDS Cortex-A9 port that was preventing full floating point usage in interrupts (other ports will be updated likewise).
Update the Zynq demo to test the GCC Cortex-A9 port layer modification mentioned on the line above.
2017-01-18 18:33:48 +00:00
Richard Barry
d67dcf9c74 Enhanced priority dis-inheritance functionality in the case where a task that caused another task to inherit its priority times out before obtain a mutex.
Added test code to GenQTest to test the new priority dis-inheritance functionality.
Allow the default names given to the Idle and Timer tasks to be overwridden by definitions in FreeRTOSConfig.h.
2017-01-16 03:58:51 +00:00
Richard Barry
ca9edf3531 Increase the priority of the Windows threads used by the FreeRTOS Windows port, and, because the threads have high priority and run on the same core, prevent the port running on single core hosts so as to avoid locking up the host. 2017-01-04 04:48:22 +00:00
Richard Barry
225f13bac2 Update TaskNotify.c to test the condition where a direct to task notification is sent to a suspended task.
Introduce configSTACK_DEPTH_TYPE so the application writer change the type used to specify a stack size from uint16_t to whatever they like.  Defaults to uint16_t if not defined.
Introduce configINITIAL_TICK_COUNT to allow users to start the tick count at something other than 0.  Used for testing, but overflows can be better tested by setting configUSE_16_BIT_TICKS to 1.
Split xQueueGenericReceive() into xQueueReceive(), xQueuePeek() and xQueueSemaphoreTake() as the first step in refactoring xQueueGenericReceive().
Add Cortex-M3 port layer for Code Composer Studio - previously there was only a Cortex-M4F port.
Introduce configPRE_SUPPRESS_TICKS_AND_SLEEP_PROCESSING() to allow applications to prevent portSUPPRESS_TICKS_AND_SLEEP() being called.  Previously the portPRE_SLEEP_PROCESSING() macro could only be used to abort entry into sleep time after clocks had been re-programmed for the distant wake time.
2016-11-25 21:07:56 +00:00
Richard Barry
7cce089e40 Add support for statically allocated memory protected tasks - previously only dynamically allocated tasks could be memory protected. 2016-09-20 13:54:28 +00:00
Richard Barry
5c75e5a38a Correct the definition of StaticTask_t and add additional configASSERT() statements to catch future errors. 2016-09-14 08:21:24 +00:00
Richard Barry
40201bc253 Introduce configRECORD_STACK_HIGH_ADDRESS, which when set will result in both limits of the stack being saved in the TCB to allow enhanced debug capabilities.
Introduce configINCLUDE_FREERTOS_TASK_C_ADDITIONS_H, which allows a user provided header file to be included at the bottom of the tasks.c source file, which can add user functions and access file scope data.
Replace global on/off switches used for lint errors with save/restore switches.
2016-09-04 15:46:34 +00:00
Richard Barry
f11912c5de Clean up lint errors. 2016-08-16 13:44:30 +00:00
Richard Barry
75ffac21d7 Changes to core code and port layer:
+ Add configASSERT() into ARM Cortex-M ports to check the number of priority
      bit settings.
    + Clear the 'control' register before starting ARM Cortex-M4F ports in case
      the FPU is used before the scheduler is started.  This just saves a few
      bytes on the main stack as it prevents space being left for a later save
      of FPU registers.
    + Added xSemaphoreGetMutexHolderFromISR().
    + Corrected use of portNVIC_PENDSVSET to portNVIC_PENDSVSET_BIT in MPU ports.
2016-08-16 11:38:58 +00:00
Richard Barry
bdbf347c22 Remove clrex instruction from Cortex-M ports again as it is implicit in interrupt entry. 2016-06-28 10:39:25 +00:00
Richard Barry
c296e2cff8 Improvements to the Cortex-M ports:
- Clear the SysTick current value register before starting the SysTick (only required if something uses SysTick before starting the scheduler).
- Ensure atomic operations are thread safe by executing clrex in the context switch.
2016-06-27 13:13:05 +00:00
Richard Barry
2bd7884ace Prepare for V9.0.0 release:
+ Change version number from V9.0.0rc2 to V9.0.0.
2016-05-20 18:05:46 +00:00
Richard Barry
0063b29cdf Prepare for V9.0.0 release.
+ Set flash wait states on MSP432 demos.
+ Remove use of obsolete IO library in PIC32 demos.
+ Remove obsolete item left on stack of first task to run in the Cortex-M0 ports.
+ Correct IA32 GCC vPortExitCritical() implementation when configMAX_API_CALL_INTERRUPT_PRIORITY == portMAX_PRIORITY.
2016-05-19 13:28:12 +00:00
Richard Barry
e10647f9c0 Increase the test coverage of the GCC MPU demo that runs in the Keil simulator.
Add an MPU demo that uses the Keil simulator that also uses the Keil compiler.
Correct a few version numbers for files recently added to the repository.
2016-05-18 19:51:14 +00:00