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fix: arch: riscv: trap: {get, set}_reg are shifted with wrong offset
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@ -110,16 +110,16 @@ impl TrapContextOps for TrapContext {
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}
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fn get_reg(&self, index: usize) -> usize {
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// x10 ~ x17: Function arguments
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// x9(a0) ~ x16(a7): Function arguments
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assert!(index < 8, "TrapContext get_reg index out of range");
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self.gprs[index + 10]
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self.gprs[index + 9]
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}
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fn set_reg(&mut self, index: usize, value: usize) {
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// x10 ~ x17: Function arguments
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// x10 ~ x11: Function return values
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// x9(a0) ~ x16(a7): Function arguments
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// x9(a0) ~ x10(a1): Function return values
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assert!(index < 8, "TrapContext set_reg index out of range");
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self.gprs[index + 10] = value;
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self.gprs[index + 9] = value;
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}
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}
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