init
This commit is contained in:
commit
c3e5c51e57
12
.gitignore
vendored
Normal file
12
.gitignore
vendored
Normal file
@ -0,0 +1,12 @@
|
||||
*/*/config.old
|
||||
*/*/rootfs_config.old
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||||
build/
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||||
images/linux/
|
||||
pre-built/linux/
|
||||
.petalinux/*
|
||||
!.petalinux/metadata
|
||||
*.o
|
||||
*.jou
|
||||
*.log
|
||||
/components/plnx_workspace
|
||||
/components/yocto
|
||||
7
.petalinux/metadata
Normal file
7
.petalinux/metadata
Normal file
@ -0,0 +1,7 @@
|
||||
PETALINUX_VER=2022.2
|
||||
VALIDATE_HW_CHKSUM=1
|
||||
HARDWARE_PATH=/home/vivado/project/SoC.xsa
|
||||
HDF_EXT=xsa
|
||||
HARDWARE_CHECKSUM=e45b9019426cf2395b370dbd28044ffb
|
||||
YOCTO_SDK=85e32bd84b2647e640a2e565ef06077a
|
||||
RFSCONFIG_CHKSUM=b46c51379f90d101cd485ab49ceb7458
|
||||
11
config.project
Normal file
11
config.project
Normal file
@ -0,0 +1,11 @@
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||||
#
|
||||
# Automatically generated file; DO NOT EDIT.
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||||
# PetaLinux SDK Project Configuration
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||||
#
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||||
CONFIG_PROJECT_ADDITIONAL_COMPONENTS_SEARCH_PATH=""
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||||
|
||||
#
|
||||
# Subsystems of the project
|
||||
#
|
||||
CONFIG_PROJECT_SUBSYSTEM_LINUX_INSTANCE_LINUX=y
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||||
CONFIG_PROJECT_SUBSYSTEMS=y
|
||||
7
project-spec/attributes
Normal file
7
project-spec/attributes
Normal file
@ -0,0 +1,7 @@
|
||||
#Virtual Providers
|
||||
|
||||
|
||||
|
||||
#defconfigs
|
||||
|
||||
UBOOT_DEFAULT_DEFCONFIG="xilinx_zynq_virt_defconfig"
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||||
22
project-spec/configs/busybox/inetd.conf
Normal file
22
project-spec/configs/busybox/inetd.conf
Normal file
@ -0,0 +1,22 @@
|
||||
#/etc/inetd.conf: see inetd(8) for further informations.
|
||||
#
|
||||
# Internet server configuration database
|
||||
#
|
||||
# If you want to disable an entry so it isn't touched during
|
||||
# package updates just comment it out with a single '#' character.
|
||||
#
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||||
# <service_name> <sock_type> <proto> <flags> <user> <server_path> <args>
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||||
#
|
||||
#:INTERNAL: Internal services
|
||||
#echo stream tcp nowait root internal
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||||
#echo dgram udp wait root internal
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||||
#chargen stream tcp nowait root internal
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||||
#chargen dgram udp wait root internal
|
||||
#discard stream tcp nowait root internal
|
||||
#discard dgram udp wait root internal
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||||
#daytime stream tcp nowait root internal
|
||||
#daytime dgram udp wait root internal
|
||||
#time stream tcp nowait root internal
|
||||
#time dgram udp wait root internal
|
||||
telnet stream tcp nowait root telnetd telnetd -i
|
||||
ftp stream tcp nowait root ftpd ftpd -w
|
||||
267
project-spec/configs/config
Normal file
267
project-spec/configs/config
Normal file
@ -0,0 +1,267 @@
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||||
#
|
||||
# Automatically generated file; DO NOT EDIT.
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||||
# misc/config System Configuration
|
||||
#
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||||
CONFIG_SUBSYSTEM_TYPE_LINUX=y
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||||
CONFIG_SYSTEM_ZYNQ=y
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||||
|
||||
#
|
||||
# Linux Components Selection
|
||||
#
|
||||
CONFIG_SUBSYSTEM_COMPONENT_DEVICE__TREE_NAME_DEVICE__TREE__GENERATOR=y
|
||||
CONFIG_SUBSYSTEM_COMPONENT_BOOTLOADER_AUTO_FSBL=y
|
||||
CONFIG_SUBSYSTEM_COMPONENT_BOOTLOADER_NAME_ZYNQ_FSBL=y
|
||||
CONFIG_SUBSYSTEM_COMPONENT_BOOTLOADER_AUTO_PS_INIT=y
|
||||
CONFIG_SUBSYSTEM_COMPONENT_U__BOOT_NAME_U__BOOT__XLNX=y
|
||||
# CONFIG_SUBSYSTEM_COMPONENT_U__BOOT_NAME_REMOTE is not set
|
||||
# CONFIG_SUBSYSTEM_COMPONENT_U__BOOT_NAME_EXT__LOCAL__SRC is not set
|
||||
# CONFIG_SUBSYSTEM_COMPONENT_LINUX__KERNEL_NAME_LINUX__XLNX is not set
|
||||
# CONFIG_SUBSYSTEM_COMPONENT_LINUX__KERNEL_NAME_REMOTE is not set
|
||||
CONFIG_SUBSYSTEM_COMPONENT_LINUX__KERNEL_NAME_EXT__LOCAL__SRC=y
|
||||
|
||||
#
|
||||
# External linux-kernel local source settings
|
||||
#
|
||||
CONFIG_SUBSYSTEM_COMPONENT_LINUX__KERNEL_NAME_EXT_LOCAL_SRC_PATH="/home/vivado/project/linux-xlnx/"
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||||
CONFIG_SUBSYSTEM_COMPONENT_LINUX__KERNEL_LIC_FILES_CHKSUM_LOCAL__SRC=""
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||||
|
||||
#
|
||||
# Auto Config Settings
|
||||
#
|
||||
CONFIG_SUBSYSTEM_AUTOCONFIG_DEVICE__TREE=y
|
||||
# CONFIG_SUBSYSTEM_DEVICE_TREE_MANUAL_INCLUDE is not set
|
||||
CONFIG_SUBSYSTEM_HARDWARE_AUTO=y
|
||||
CONFIG_SUBSYSTEM_PROCESSOR0_IP_NAME="ps7_cortexa9_0"
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||||
CONFIG_SUBSYSTEM_PROCESSOR_ps7_cortexa9_0_SELECT=y
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||||
CONFIG_SUBSYSTEM_ARCH_ARM=y
|
||||
|
||||
#
|
||||
# Memory Settings
|
||||
#
|
||||
CONFIG_SUBSYSTEM_MEMORY_PS7_DDR_0_BANKLESS_SELECT=y
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||||
# CONFIG_SUBSYSTEM_MEMORY_MANUAL_SELECT is not set
|
||||
CONFIG_SUBSYSTEM_MEMORY_PS7_DDR_0_BANKLESS_BASEADDR=0x0
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||||
CONFIG_SUBSYSTEM_MEMORY_PS7_DDR_0_BANKLESS_SIZE=0x40000000
|
||||
CONFIG_SUBSYSTEM_MEMORY_PS7_DDR_0_BANKLESS_KERNEL_BASEADDR=0x0
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||||
CONFIG_SUBSYSTEM_MEMORY_PS7_DDR_0_BANKLESS_U__BOOT_TEXTBASE_OFFSET=0x400000
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||||
CONFIG_SUBSYSTEM_MEMORY_IP_NAME="PS7_DDR_0"
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||||
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||||
#
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||||
# Serial Settings
|
||||
#
|
||||
CONFIG_SUBSYSTEM_FSBL_SERIAL_PS7_UART_0_SELECT=y
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||||
# CONFIG_SUBSYSTEM_FSBL_SERIAL_MANUAL_SELECT is not set
|
||||
CONFIG_SUBSYSTEM_SERIAL_PS7_UART_0_SELECT=y
|
||||
# CONFIG_SUBSYSTEM_SERIAL_MANUAL_SELECT is not set
|
||||
# CONFIG_SUBSYSTEM_SERIAL_PS7_UART_0_BAUDRATE_600 is not set
|
||||
# CONFIG_SUBSYSTEM_SERIAL_PS7_UART_0_BAUDRATE_9600 is not set
|
||||
# CONFIG_SUBSYSTEM_SERIAL_PS7_UART_0_BAUDRATE_28800 is not set
|
||||
CONFIG_SUBSYSTEM_SERIAL_PS7_UART_0_BAUDRATE_115200=y
|
||||
# CONFIG_SUBSYSTEM_SERIAL_PS7_UART_0_BAUDRATE_230400 is not set
|
||||
# CONFIG_SUBSYSTEM_SERIAL_PS7_UART_0_BAUDRATE_460800 is not set
|
||||
# CONFIG_SUBSYSTEM_SERIAL_PS7_UART_0_BAUDRATE_921600 is not set
|
||||
CONFIG_SUBSYSTEM_SERIAL_FSBL_IP_NAME="ps7_uart_0"
|
||||
CONFIG_SUBSYSTEM_SERIAL_IP_NAME="ps7_uart_0"
|
||||
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||||
#
|
||||
# Ethernet Settings
|
||||
#
|
||||
CONFIG_SUBSYSTEM_ETHERNET_PS7_ETHERNET_0_SELECT=y
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||||
# CONFIG_SUBSYSTEM_ETHERNET_MANUAL_SELECT is not set
|
||||
# CONFIG_SUBSYSTEM_ETHERNET_PS7_ETHERNET_0_MAC_AUTO is not set
|
||||
CONFIG_SUBSYSTEM_ETHERNET_PS7_ETHERNET_0_MAC="00:0a:35:00:1e:53"
|
||||
CONFIG_SUBSYSTEM_ETHERNET_PS7_ETHERNET_0_USE_DHCP=y
|
||||
|
||||
#
|
||||
# Flash Settings
|
||||
#
|
||||
CONFIG_SUBSYSTEM_FLASH_PS7_QSPI_0_BANKLESS_SELECT=y
|
||||
# CONFIG_SUBSYSTEM_FLASH_MANUAL_SELECT is not set
|
||||
# CONFIG_SUBSYSTEM_FLASH__ADVANCED_AUTOCONFIG is not set
|
||||
|
||||
#
|
||||
# partition 0
|
||||
#
|
||||
CONFIG_SUBSYSTEM_FLASH_PS7_QSPI_0_BANKLESS_PART0_NAME="qspi-boot"
|
||||
CONFIG_SUBSYSTEM_FLASH_PS7_QSPI_0_BANKLESS_PART0_SIZE=0x500000
|
||||
|
||||
#
|
||||
# partition 1
|
||||
#
|
||||
CONFIG_SUBSYSTEM_FLASH_PS7_QSPI_0_BANKLESS_PART1_NAME="qspi-kernel"
|
||||
CONFIG_SUBSYSTEM_FLASH_PS7_QSPI_0_BANKLESS_PART1_SIZE=0xA80000
|
||||
|
||||
#
|
||||
# partition 2
|
||||
#
|
||||
CONFIG_SUBSYSTEM_FLASH_PS7_QSPI_0_BANKLESS_PART2_NAME="qspi-bootenv"
|
||||
CONFIG_SUBSYSTEM_FLASH_PS7_QSPI_0_BANKLESS_PART2_SIZE=0x20000
|
||||
|
||||
#
|
||||
# partition 3
|
||||
#
|
||||
CONFIG_SUBSYSTEM_FLASH_PS7_QSPI_0_BANKLESS_PART3_NAME=""
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||||
CONFIG_SUBSYSTEM_FLASH_IP_NAME="ps7_qspi_0"
|
||||
|
||||
#
|
||||
# SD/SDIO Settings
|
||||
#
|
||||
CONFIG_SUBSYSTEM_PRIMARY_SD_PS7_SD_0_SELECT=y
|
||||
# CONFIG_SUBSYSTEM_PRIMARY_SD_PS7_SD_1_SELECT is not set
|
||||
# CONFIG_SUBSYSTEM_PRIMARY_SD_MANUAL_SELECT is not set
|
||||
CONFIG_SUBSYSTEM_SD_PS7_SD_0_SELECT=y
|
||||
CONFIG_SUBSYSTEM_SD_PS7_SD_1_SELECT=y
|
||||
|
||||
#
|
||||
# RTC Settings
|
||||
#
|
||||
CONFIG_SUBSYSTEM_RTC_MANUAL_SELECT=y
|
||||
CONFIG_SUBSYSTEM_I2C_PS7_I2C_0_SELECT=y
|
||||
CONFIG_SUBSYSTEM_I2C_PS7_I2C_1_SELECT=y
|
||||
CONFIG_SUBSYSTEM_USB_PS7_USB_0_SELECT=y
|
||||
CONFIG_SUBSYSTEM_ENDIAN_LITTLE=y
|
||||
|
||||
#
|
||||
# DTG Settings
|
||||
#
|
||||
CONFIG_SUBSYSTEM_MACHINE_NAME="template"
|
||||
CONFIG_SUBSYSTEM_EXTRA_DT_FILES=""
|
||||
|
||||
#
|
||||
# Kernel Bootargs
|
||||
#
|
||||
CONFIG_SUBSYSTEM_BOOTARGS_AUTO=y
|
||||
CONFIG_SUBSYSTEM_BOOTARGS_EARLYPRINTK=y
|
||||
CONFIG_SUBSYSTEM_BOOTARGS_GENERATED="console=ttyPS0,115200 earlycon root=/dev/mmcblk0p2 rw rootwait"
|
||||
CONFIG_SUBSYSTEM_EXTRA_BOOTARGS=""
|
||||
CONFIG_SUBSYSTEM_DEVICETREE_COMPILER_FLAGS="-@"
|
||||
# CONFIG_SUBSYSTEM_DTB_OVERLAY is not set
|
||||
# CONFIG_SUBSYSTEM_REMOVE_PL_DTB is not set
|
||||
# CONFIG_SUBSYSTEM_ENABLE_NO_ALIAS is not set
|
||||
# CONFIG_SUBSYSTEM_ENABLE_DT_VERBOSE is not set
|
||||
|
||||
#
|
||||
# FSBL Configuration
|
||||
#
|
||||
CONFIG_SUBSYSTEM_FSBL_BSPCOMPILER_FLAGS=""
|
||||
CONFIG_SUBSYSTEM_FSBL_COMPILER_EXTRA_FLAGS=""
|
||||
|
||||
#
|
||||
# FPGA Manager
|
||||
#
|
||||
# CONFIG_SUBSYSTEM_FPGA_MANAGER is not set
|
||||
|
||||
#
|
||||
# u-boot Configuration
|
||||
#
|
||||
CONFIG_SUBSYSTEM_UBOOT_CONFIG_TARGET="xilinx_zynq_virt_defconfig"
|
||||
|
||||
#
|
||||
# u-boot script configuration
|
||||
#
|
||||
CONFIG_SUBSYSTEM_UBOOT_APPEND_BASEADDR=y
|
||||
CONFIG_SUBSYSTEM_UBOOT_PRE_BOOTENV=""
|
||||
|
||||
#
|
||||
# JTAG/DDR image offsets
|
||||
#
|
||||
CONFIG_SUBSYSTEM_UBOOT_DEVICETREE_OFFSET=0x100000
|
||||
CONFIG_SUBSYSTEM_UBOOT_KERNEL_OFFSET=0x200000
|
||||
CONFIG_SUBSYSTEM_UBOOT_RAMDISK_IMAGE_OFFSET=0x4000000
|
||||
CONFIG_SUBSYSTEM_UBOOT_FIT_IMAGE_OFFSET=0x10000000
|
||||
|
||||
#
|
||||
# QSPI/OSPI image offsets
|
||||
#
|
||||
CONFIG_SUBSYSTEM_UBOOT_QSPI_KERNEL_OFFSET=0xA00000
|
||||
CONFIG_SUBSYSTEM_UBOOT_QSPI_KERNEL_SIZE=0x600000
|
||||
CONFIG_SUBSYSTEM_UBOOT_QSPI_RAMDISK_OFFSET=0x1000000
|
||||
CONFIG_SUBSYSTEM_UBOOT_QSPI_RAMDISK_SIZE=0xF80000
|
||||
CONFIG_SUBSYSTEM_UBOOT_QSPI_FIT_IMAGE_OFFSET=0xA80000
|
||||
CONFIG_SUBSYSTEM_UBOOT_QSPI_FIT_IMAGE_SIZE=0x1500000
|
||||
|
||||
#
|
||||
# NAND image offsets
|
||||
#
|
||||
CONFIG_SUBSYSTEM_UBOOT_NAND_KERNEL_OFFSET=0x1000000
|
||||
CONFIG_SUBSYSTEM_UBOOT_NAND_KERNEL_SIZE=0x3200000
|
||||
CONFIG_SUBSYSTEM_UBOOT_NAND_RAMDISK_OFFSET=0x4600000
|
||||
CONFIG_SUBSYSTEM_UBOOT_NAND_RAMDISK_SIZE=0x3200000
|
||||
CONFIG_SUBSYSTEM_UBOOT_NAND_FIT_IMAGE_OFFSET=0x1080000
|
||||
CONFIG_SUBSYSTEM_UBOOT_NAND_FIT_IMAGE_SIZE=0x6400000
|
||||
CONFIG_SUBSYSTEM_UBOOT_KERNEL_IMAGE="uImage"
|
||||
CONFIG_SUBSYSTEM_UBOOT_FIT_IMAGE="image.ub"
|
||||
# CONFIG_SUBSYSTEM_UBOOT_EXT_DTB is not set
|
||||
|
||||
#
|
||||
# Linux Configuration
|
||||
#
|
||||
CONFIG_SUBSYSTEM_LINUX_CONFIG_TARGET=""
|
||||
|
||||
#
|
||||
# Image Packaging Configuration
|
||||
#
|
||||
# CONFIG_SUBSYSTEM_ROOTFS_INITRAMFS is not set
|
||||
# CONFIG_SUBSYSTEM_ROOTFS_INITRD is not set
|
||||
# CONFIG_SUBSYSTEM_ROOTFS_JFFS2 is not set
|
||||
# CONFIG_SUBSYSTEM_ROOTFS_UBIFS is not set
|
||||
# CONFIG_SUBSYSTEM_ROOTFS_NFS is not set
|
||||
CONFIG_SUBSYSTEM_ROOTFS_EXT4=y
|
||||
# CONFIG_SUBSYSTEM_ROOTFS_OTHER is not set
|
||||
CONFIG_SUBSYSTEM_SDROOT_DEV="/dev/mmcblk0p2"
|
||||
CONFIG_SUBSYSTEM_UIMAGE_NAME="image.ub"
|
||||
CONFIG_SUBSYSTEM_RFS_FORMATS="cpio cpio.gz cpio.gz.u-boot ext4 tar.gz jffs2"
|
||||
CONFIG_SUBSYSTEM_DTB_PADDING_SIZE=0x1000
|
||||
CONFIG_SUBSYSTEM_COPY_TO_TFTPBOOT=y
|
||||
CONFIG_SUBSYSTEM_TFTPBOOT_DIR="/tftpboot"
|
||||
|
||||
#
|
||||
# Firmware Version Configuration
|
||||
#
|
||||
CONFIG_SUBSYSTEM_HOSTNAME="TinySoC"
|
||||
CONFIG_SUBSYSTEM_PRODUCT="TinySoC"
|
||||
CONFIG_SUBSYSTEM_FW_VERSION="1.00"
|
||||
|
||||
#
|
||||
# Yocto Settings
|
||||
#
|
||||
CONFIG_YOCTO_MACHINE_NAME="zynq-generic"
|
||||
|
||||
#
|
||||
# TMPDIR Location
|
||||
#
|
||||
CONFIG_TMP_DIR_LOCATION="${PROOT}/build/tmp"
|
||||
|
||||
#
|
||||
# Devtool Workspace Location
|
||||
#
|
||||
CONFIG_DEVTOOL_WORKSPACE_LOCATION="${PROOT}/components/yocto/workspace"
|
||||
|
||||
#
|
||||
# Parallel thread execution
|
||||
#
|
||||
CONFIG_YOCTO_BB_NUMBER_THREADS=""
|
||||
CONFIG_YOCTO_PARALLEL_MAKE=""
|
||||
|
||||
#
|
||||
# Add pre-mirror url
|
||||
#
|
||||
CONFIG_PRE_MIRROR_URL="http://petalinux.xilinx.com/sswreleases/rel-v${PETALINUX_MAJOR_VER}/downloads"
|
||||
|
||||
#
|
||||
# Local sstate feeds settings
|
||||
#
|
||||
CONFIG_YOCTO_LOCAL_SSTATE_FEEDS_URL=""
|
||||
CONFIG_YOCTO_NETWORK_SSTATE_FEEDS=y
|
||||
|
||||
#
|
||||
# Network sstate feeds URL
|
||||
#
|
||||
CONFIG_YOCTO_NETWORK_SSTATE_FEEDS_URL="http://petalinux.xilinx.com/sswreleases/rel-v${PETALINUX_MAJOR_VER}/arm/sstate-cache"
|
||||
# CONFIG_YOCTO_BB_NO_NETWORK is not set
|
||||
# CONFIG_YOCTO_BUILDTOOLS_EXTENDED is not set
|
||||
|
||||
#
|
||||
# User Layers
|
||||
#
|
||||
CONFIG_USER_LAYER_0=""
|
||||
31
project-spec/configs/init-ifupdown/interfaces
Normal file
31
project-spec/configs/init-ifupdown/interfaces
Normal file
@ -0,0 +1,31 @@
|
||||
# /etc/network/interfaces -- configuration file for ifup(8), ifdown(8)
|
||||
|
||||
# The loopback interface
|
||||
auto lo
|
||||
iface lo inet loopback
|
||||
|
||||
# Wireless interfaces
|
||||
iface wlan0 inet dhcp
|
||||
wireless_mode managed
|
||||
wireless_essid any
|
||||
wpa-driver wext
|
||||
wpa-conf /etc/wpa_supplicant.conf
|
||||
|
||||
iface atml0 inet dhcp
|
||||
|
||||
# Wired or wireless interfaces
|
||||
auto eth0
|
||||
iface eth0 inet dhcp
|
||||
iface eth1 inet dhcp
|
||||
|
||||
# Ethernet/RNDIS gadget (g_ether)
|
||||
# ... or on host side, usbnet and random hwaddr
|
||||
iface usb0 inet static
|
||||
address 192.168.7.2
|
||||
netmask 255.255.255.0
|
||||
network 192.168.7.0
|
||||
gateway 192.168.7.1
|
||||
|
||||
# Bluetooth networking
|
||||
iface bnep0 inet dhcp
|
||||
|
||||
3904
project-spec/configs/rootfs_config
Normal file
3904
project-spec/configs/rootfs_config
Normal file
File diff suppressed because it is too large
Load Diff
13
project-spec/configs/systemd-conf/wired.network
Normal file
13
project-spec/configs/systemd-conf/wired.network
Normal file
@ -0,0 +1,13 @@
|
||||
[Match]
|
||||
Type=ether
|
||||
Name=!veth*
|
||||
KernelCommandLine=!nfsroot
|
||||
KernelCommandLine=!ip
|
||||
|
||||
[Network]
|
||||
DHCP=yes
|
||||
|
||||
[DHCP]
|
||||
UseMTU=yes
|
||||
RouteMetric=10
|
||||
ClientIdentifier=mac
|
||||
BIN
project-spec/hw-description/SoC.bit
Normal file
BIN
project-spec/hw-description/SoC.bit
Normal file
Binary file not shown.
1
project-spec/hw-description/metadata
Normal file
1
project-spec/hw-description/metadata
Normal file
@ -0,0 +1 @@
|
||||
HARDWARE_SOURCE=
|
||||
12343
project-spec/hw-description/ps7_init.c
Normal file
12343
project-spec/hw-description/ps7_init.c
Normal file
File diff suppressed because it is too large
Load Diff
117
project-spec/hw-description/ps7_init.h
Normal file
117
project-spec/hw-description/ps7_init.h
Normal file
@ -0,0 +1,117 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright (C) 2010-2020 Xilinx, Inc. All rights reserved.
|
||||
* SPDX-License-Identifier: MIT
|
||||
******************************************************************************/
|
||||
/****************************************************************************/
|
||||
/**
|
||||
*
|
||||
* @file ps7_init.h
|
||||
*
|
||||
* This file can be included in FSBL code
|
||||
* to get prototype of ps7_init() function
|
||||
* and error codes
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
|
||||
//typedef unsigned int u32;
|
||||
|
||||
|
||||
/** do we need to make this name more unique ? **/
|
||||
//extern u32 ps7_init_data[];
|
||||
extern unsigned long * ps7_ddr_init_data;
|
||||
extern unsigned long * ps7_mio_init_data;
|
||||
extern unsigned long * ps7_pll_init_data;
|
||||
extern unsigned long * ps7_clock_init_data;
|
||||
extern unsigned long * ps7_peripherals_init_data;
|
||||
|
||||
|
||||
|
||||
#define OPCODE_EXIT 0U
|
||||
#define OPCODE_CLEAR 1U
|
||||
#define OPCODE_WRITE 2U
|
||||
#define OPCODE_MASKWRITE 3U
|
||||
#define OPCODE_MASKPOLL 4U
|
||||
#define OPCODE_MASKDELAY 5U
|
||||
#define NEW_PS7_ERR_CODE 1
|
||||
|
||||
/* Encode number of arguments in last nibble */
|
||||
#define EMIT_EXIT() ( (OPCODE_EXIT << 4 ) | 0 )
|
||||
#define EMIT_CLEAR(addr) ( (OPCODE_CLEAR << 4 ) | 1 ) , addr
|
||||
#define EMIT_WRITE(addr,val) ( (OPCODE_WRITE << 4 ) | 2 ) , addr, val
|
||||
#define EMIT_MASKWRITE(addr,mask,val) ( (OPCODE_MASKWRITE << 4 ) | 3 ) , addr, mask, val
|
||||
#define EMIT_MASKPOLL(addr,mask) ( (OPCODE_MASKPOLL << 4 ) | 2 ) , addr, mask
|
||||
#define EMIT_MASKDELAY(addr,mask) ( (OPCODE_MASKDELAY << 4 ) | 2 ) , addr, mask
|
||||
|
||||
/* Returns codes of PS7_Init */
|
||||
#define PS7_INIT_SUCCESS (0) // 0 is success in good old C
|
||||
#define PS7_INIT_CORRUPT (1) // 1 the data is corrupted, and slcr reg are in corrupted state now
|
||||
#define PS7_INIT_TIMEOUT (2) // 2 when a poll operation timed out
|
||||
#define PS7_POLL_FAILED_DDR_INIT (3) // 3 when a poll operation timed out for ddr init
|
||||
#define PS7_POLL_FAILED_DMA (4) // 4 when a poll operation timed out for dma done bit
|
||||
#define PS7_POLL_FAILED_PLL (5) // 5 when a poll operation timed out for pll sequence init
|
||||
|
||||
|
||||
/* Silicon Versions */
|
||||
#define PCW_SILICON_VERSION_1 0
|
||||
#define PCW_SILICON_VERSION_2 1
|
||||
#define PCW_SILICON_VERSION_3 2
|
||||
|
||||
/* This flag to be used by FSBL to check whether ps7_post_config() proc exixts */
|
||||
#define PS7_POST_CONFIG
|
||||
|
||||
/* Freq of all peripherals */
|
||||
|
||||
#define APU_FREQ 766666687
|
||||
#define DDR_FREQ 533333374
|
||||
#define DCI_FREQ 10158730
|
||||
#define QSPI_FREQ 200000000
|
||||
#define SMC_FREQ 10000000
|
||||
#define ENET0_FREQ 125000000
|
||||
#define ENET1_FREQ 10000000
|
||||
#define USB0_FREQ 60000000
|
||||
#define USB1_FREQ 60000000
|
||||
#define SDIO_FREQ 100000000
|
||||
#define UART_FREQ 100000000
|
||||
#define SPI_FREQ 10000000
|
||||
#define I2C_FREQ 127777779
|
||||
#define WDT_FREQ 127777786
|
||||
#define TTC_FREQ 50000000
|
||||
#define CAN_FREQ 10000000
|
||||
#define PCAP_FREQ 200000000
|
||||
#define TPIU_FREQ 200000000
|
||||
#define FPGA0_FREQ 100000000
|
||||
#define FPGA1_FREQ 10000000
|
||||
#define FPGA2_FREQ 10000000
|
||||
#define FPGA3_FREQ 10000000
|
||||
|
||||
|
||||
/* For delay calculation using global registers*/
|
||||
#define SCU_GLOBAL_TIMER_COUNT_L32 0xF8F00200
|
||||
#define SCU_GLOBAL_TIMER_COUNT_U32 0xF8F00204
|
||||
#define SCU_GLOBAL_TIMER_CONTROL 0xF8F00208
|
||||
#define SCU_GLOBAL_TIMER_AUTO_INC 0xF8F00218
|
||||
|
||||
int ps7_config( unsigned long*);
|
||||
int ps7_init();
|
||||
int ps7_post_config();
|
||||
int ps7_debug();
|
||||
char* getPS7MessageInfo(unsigned key);
|
||||
|
||||
void perf_start_clock(void);
|
||||
void perf_disable_clock(void);
|
||||
void perf_reset_clock(void);
|
||||
void perf_reset_and_start_timer();
|
||||
int get_number_of_cycles_for_delay(unsigned int delay);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
139986
project-spec/hw-description/ps7_init.html
Normal file
139986
project-spec/hw-description/ps7_init.html
Normal file
File diff suppressed because it is too large
Load Diff
835
project-spec/hw-description/ps7_init.tcl
Normal file
835
project-spec/hw-description/ps7_init.tcl
Normal file
@ -0,0 +1,835 @@
|
||||
proc ps7_pll_init_data_3_0 {} {
|
||||
mwr -force 0XF8000008 0x0000DF0D
|
||||
mask_write 0XF8000110 0x003FFFF0 0x000FA3C0
|
||||
mask_write 0XF8000100 0x0007F000 0x0002E000
|
||||
mask_write 0XF8000100 0x00000010 0x00000010
|
||||
mask_write 0XF8000100 0x00000001 0x00000001
|
||||
mask_write 0XF8000100 0x00000001 0x00000000
|
||||
mask_poll 0XF800010C 0x00000001
|
||||
mask_write 0XF8000100 0x00000010 0x00000000
|
||||
mask_write 0XF8000120 0x1F003F30 0x1F000200
|
||||
mask_write 0XF8000114 0x003FFFF0 0x0012C220
|
||||
mask_write 0XF8000104 0x0007F000 0x00020000
|
||||
mask_write 0XF8000104 0x00000010 0x00000010
|
||||
mask_write 0XF8000104 0x00000001 0x00000001
|
||||
mask_write 0XF8000104 0x00000001 0x00000000
|
||||
mask_poll 0XF800010C 0x00000002
|
||||
mask_write 0XF8000104 0x00000010 0x00000000
|
||||
mask_write 0XF8000124 0xFFF00003 0x0C200003
|
||||
mask_write 0XF8000118 0x003FFFF0 0x001452C0
|
||||
mask_write 0XF8000108 0x0007F000 0x0001E000
|
||||
mask_write 0XF8000108 0x00000010 0x00000010
|
||||
mask_write 0XF8000108 0x00000001 0x00000001
|
||||
mask_write 0XF8000108 0x00000001 0x00000000
|
||||
mask_poll 0XF800010C 0x00000004
|
||||
mask_write 0XF8000108 0x00000010 0x00000000
|
||||
mwr -force 0XF8000004 0x0000767B
|
||||
}
|
||||
proc ps7_clock_init_data_3_0 {} {
|
||||
mwr -force 0XF8000008 0x0000DF0D
|
||||
mask_write 0XF8000128 0x03F03F01 0x00700F01
|
||||
mask_write 0XF8000138 0x00000011 0x00000001
|
||||
mask_write 0XF8000140 0x03F03F71 0x00100801
|
||||
mask_write 0XF800014C 0x00003F31 0x00000501
|
||||
mask_write 0XF8000150 0x00003F33 0x00000A03
|
||||
mask_write 0XF8000154 0x00003F33 0x00000A01
|
||||
mask_write 0XF8000168 0x00003F31 0x00000501
|
||||
mask_write 0XF8000170 0x03F03F30 0x00200500
|
||||
mask_write 0XF80001C4 0x00000001 0x00000001
|
||||
mask_write 0XF800012C 0x01FFCCCD 0x01DC0C4D
|
||||
mwr -force 0XF8000004 0x0000767B
|
||||
}
|
||||
proc ps7_ddr_init_data_3_0 {} {
|
||||
mask_write 0XF8006000 0x0001FFFF 0x00000080
|
||||
mask_write 0XF8006004 0x0007FFFF 0x00001082
|
||||
mask_write 0XF8006008 0x03FFFFFF 0x03C0780F
|
||||
mask_write 0XF800600C 0x03FFFFFF 0x02001001
|
||||
mask_write 0XF8006010 0x03FFFFFF 0x00014001
|
||||
mask_write 0XF8006014 0x001FFFFF 0x0004285B
|
||||
mask_write 0XF8006018 0xF7FFFFFF 0x44E458D3
|
||||
mask_write 0XF800601C 0xFFFFFFFF 0x7282BCE5
|
||||
mask_write 0XF8006020 0x7FDFFFFC 0x270872D0
|
||||
mask_write 0XF8006024 0x0FFFFFC3 0x00000000
|
||||
mask_write 0XF8006028 0x00003FFF 0x00002007
|
||||
mask_write 0XF800602C 0xFFFFFFFF 0x00000008
|
||||
mask_write 0XF8006030 0xFFFFFFFF 0x00040B30
|
||||
mask_write 0XF8006034 0x13FF3FFF 0x000116D4
|
||||
mask_write 0XF8006038 0x00000003 0x00000000
|
||||
mask_write 0XF800603C 0x000FFFFF 0x00000777
|
||||
mask_write 0XF8006040 0xFFFFFFFF 0xFFF00000
|
||||
mask_write 0XF8006044 0x0FFFFFFF 0x0F666666
|
||||
mask_write 0XF8006048 0x0003F03F 0x0003C008
|
||||
mask_write 0XF8006050 0xFF0F8FFF 0x77010800
|
||||
mask_write 0XF8006058 0x00010000 0x00000000
|
||||
mask_write 0XF800605C 0x0000FFFF 0x00005003
|
||||
mask_write 0XF8006060 0x000017FF 0x0000003E
|
||||
mask_write 0XF8006064 0x00021FE0 0x00020000
|
||||
mask_write 0XF8006068 0x03FFFFFF 0x00284141
|
||||
mask_write 0XF800606C 0x0000FFFF 0x00001610
|
||||
mask_write 0XF8006078 0x03FFFFFF 0x00466111
|
||||
mask_write 0XF800607C 0x000FFFFF 0x00032222
|
||||
mask_write 0XF80060A4 0xFFFFFFFF 0x10200802
|
||||
mask_write 0XF80060A8 0x0FFFFFFF 0x0690CB73
|
||||
mask_write 0XF80060AC 0x000001FF 0x000001FE
|
||||
mask_write 0XF80060B0 0x1FFFFFFF 0x1CFFFFFF
|
||||
mask_write 0XF80060B4 0x00000200 0x00000200
|
||||
mask_write 0XF80060B8 0x01FFFFFF 0x00200066
|
||||
mask_write 0XF80060C4 0x00000003 0x00000000
|
||||
mask_write 0XF80060C8 0x000000FF 0x00000000
|
||||
mask_write 0XF80060DC 0x00000001 0x00000000
|
||||
mask_write 0XF80060F0 0x0000FFFF 0x00000000
|
||||
mask_write 0XF80060F4 0x0000000F 0x00000008
|
||||
mask_write 0XF8006114 0x000000FF 0x00000000
|
||||
mask_write 0XF8006118 0x7FFFFFCF 0x40000001
|
||||
mask_write 0XF800611C 0x7FFFFFCF 0x40000001
|
||||
mask_write 0XF8006120 0x7FFFFFCF 0x40000001
|
||||
mask_write 0XF8006124 0x7FFFFFCF 0x40000001
|
||||
mask_write 0XF800612C 0x000FFFFF 0x00029000
|
||||
mask_write 0XF8006130 0x000FFFFF 0x00029000
|
||||
mask_write 0XF8006134 0x000FFFFF 0x00029000
|
||||
mask_write 0XF8006138 0x000FFFFF 0x00029000
|
||||
mask_write 0XF8006140 0x000FFFFF 0x00000035
|
||||
mask_write 0XF8006144 0x000FFFFF 0x00000035
|
||||
mask_write 0XF8006148 0x000FFFFF 0x00000035
|
||||
mask_write 0XF800614C 0x000FFFFF 0x00000035
|
||||
mask_write 0XF8006154 0x000FFFFF 0x00000080
|
||||
mask_write 0XF8006158 0x000FFFFF 0x00000080
|
||||
mask_write 0XF800615C 0x000FFFFF 0x00000080
|
||||
mask_write 0XF8006160 0x000FFFFF 0x00000080
|
||||
mask_write 0XF8006168 0x001FFFFF 0x000000F9
|
||||
mask_write 0XF800616C 0x001FFFFF 0x000000F9
|
||||
mask_write 0XF8006170 0x001FFFFF 0x000000F9
|
||||
mask_write 0XF8006174 0x001FFFFF 0x000000F9
|
||||
mask_write 0XF800617C 0x000FFFFF 0x000000C0
|
||||
mask_write 0XF8006180 0x000FFFFF 0x000000C0
|
||||
mask_write 0XF8006184 0x000FFFFF 0x000000C0
|
||||
mask_write 0XF8006188 0x000FFFFF 0x000000C0
|
||||
mask_write 0XF8006190 0x6FFFFEFE 0x00040080
|
||||
mask_write 0XF8006194 0x000FFFFF 0x0001FC82
|
||||
mask_write 0XF8006204 0xFFFFFFFF 0x00000000
|
||||
mask_write 0XF8006208 0x000703FF 0x000003FF
|
||||
mask_write 0XF800620C 0x000703FF 0x000003FF
|
||||
mask_write 0XF8006210 0x000703FF 0x000003FF
|
||||
mask_write 0XF8006214 0x000703FF 0x000003FF
|
||||
mask_write 0XF8006218 0x000F03FF 0x000003FF
|
||||
mask_write 0XF800621C 0x000F03FF 0x000003FF
|
||||
mask_write 0XF8006220 0x000F03FF 0x000003FF
|
||||
mask_write 0XF8006224 0x000F03FF 0x000003FF
|
||||
mask_write 0XF80062A8 0x00000FF5 0x00000000
|
||||
mask_write 0XF80062AC 0xFFFFFFFF 0x00000000
|
||||
mask_write 0XF80062B0 0x003FFFFF 0x00005125
|
||||
mask_write 0XF80062B4 0x0003FFFF 0x000012A8
|
||||
mask_poll 0XF8000B74 0x00002000
|
||||
mask_write 0XF8006000 0x0001FFFF 0x00000081
|
||||
mask_poll 0XF8006054 0x00000007
|
||||
}
|
||||
proc ps7_mio_init_data_3_0 {} {
|
||||
mwr -force 0XF8000008 0x0000DF0D
|
||||
mask_write 0XF8000B40 0x00000FFF 0x00000600
|
||||
mask_write 0XF8000B44 0x00000FFF 0x00000600
|
||||
mask_write 0XF8000B48 0x00000FFF 0x00000672
|
||||
mask_write 0XF8000B4C 0x00000FFF 0x00000672
|
||||
mask_write 0XF8000B50 0x00000FFF 0x00000674
|
||||
mask_write 0XF8000B54 0x00000FFF 0x00000674
|
||||
mask_write 0XF8000B58 0x00000FFF 0x00000600
|
||||
mask_write 0XF8000B5C 0xFFFFFFFF 0x0018C61C
|
||||
mask_write 0XF8000B60 0xFFFFFFFF 0x00F9861C
|
||||
mask_write 0XF8000B64 0xFFFFFFFF 0x00F9861C
|
||||
mask_write 0XF8000B68 0xFFFFFFFF 0x00F9861C
|
||||
mask_write 0XF8000B6C 0x00007FFF 0x00000260
|
||||
mask_write 0XF8000B70 0x00000001 0x00000001
|
||||
mask_write 0XF8000B70 0x00000021 0x00000020
|
||||
mask_write 0XF8000B70 0x07FEFFFF 0x00000823
|
||||
mask_write 0XF8000700 0x00003FFF 0x00001600
|
||||
mask_write 0XF8000704 0x00003FFF 0x00001602
|
||||
mask_write 0XF8000708 0x00003FFF 0x00000602
|
||||
mask_write 0XF800070C 0x00003FFF 0x00000602
|
||||
mask_write 0XF8000710 0x00003FFF 0x00000602
|
||||
mask_write 0XF8000714 0x00003FFF 0x00000602
|
||||
mask_write 0XF8000718 0x00003FFF 0x00000602
|
||||
mask_write 0XF800071C 0x00003FFF 0x00000600
|
||||
mask_write 0XF8000720 0x00003FFF 0x00000600
|
||||
mask_write 0XF8000724 0x00003FFF 0x00001600
|
||||
mask_write 0XF8000728 0x00003F01 0x00001601
|
||||
mask_write 0XF800072C 0x00003FFF 0x00001600
|
||||
mask_write 0XF8000730 0x00003FFF 0x00001600
|
||||
mask_write 0XF8000734 0x00003FFF 0x00001600
|
||||
mask_write 0XF8000738 0x00003FFF 0x000016E1
|
||||
mask_write 0XF800073C 0x00003FFF 0x000016E0
|
||||
mask_write 0XF8000740 0x00003FFF 0x00001202
|
||||
mask_write 0XF8000744 0x00003FFF 0x00001202
|
||||
mask_write 0XF8000748 0x00003FFF 0x00001202
|
||||
mask_write 0XF800074C 0x00003FFF 0x00001202
|
||||
mask_write 0XF8000750 0x00003FFF 0x00001202
|
||||
mask_write 0XF8000754 0x00003FFF 0x00001202
|
||||
mask_write 0XF8000758 0x00003FFF 0x00001203
|
||||
mask_write 0XF800075C 0x00003FFF 0x00001203
|
||||
mask_write 0XF8000760 0x00003FFF 0x00001203
|
||||
mask_write 0XF8000764 0x00003FFF 0x00001203
|
||||
mask_write 0XF8000768 0x00003FFF 0x00001203
|
||||
mask_write 0XF800076C 0x00003FFF 0x00001203
|
||||
mask_write 0XF8000770 0x00003FFF 0x00001204
|
||||
mask_write 0XF8000774 0x00003FFF 0x00001205
|
||||
mask_write 0XF8000778 0x00003FFF 0x00001204
|
||||
mask_write 0XF800077C 0x00003FFF 0x00001205
|
||||
mask_write 0XF8000780 0x00003FFF 0x00001204
|
||||
mask_write 0XF8000784 0x00003FFF 0x00001204
|
||||
mask_write 0XF8000788 0x00003FFF 0x00001204
|
||||
mask_write 0XF800078C 0x00003FFF 0x00001204
|
||||
mask_write 0XF8000790 0x00003FFF 0x00001205
|
||||
mask_write 0XF8000794 0x00003FFF 0x00001204
|
||||
mask_write 0XF8000798 0x00003FFF 0x00001204
|
||||
mask_write 0XF800079C 0x00003FFF 0x00001204
|
||||
mask_write 0XF80007A0 0x00003FFF 0x00001280
|
||||
mask_write 0XF80007A4 0x00003FFF 0x00001280
|
||||
mask_write 0XF80007A8 0x00003FFF 0x00001280
|
||||
mask_write 0XF80007AC 0x00003FFF 0x00001280
|
||||
mask_write 0XF80007B0 0x00003FFF 0x00001280
|
||||
mask_write 0XF80007B4 0x00003FFF 0x00001280
|
||||
mask_write 0XF80007B8 0x00003FFF 0x00001280
|
||||
mask_write 0XF80007BC 0x00003FFF 0x00001280
|
||||
mask_write 0XF80007C0 0x00003FFF 0x00001280
|
||||
mask_write 0XF80007C4 0x00003FFF 0x00001280
|
||||
mask_write 0XF80007C8 0x00003FFF 0x00001280
|
||||
mask_write 0XF80007CC 0x00003FFF 0x00001280
|
||||
mask_write 0XF80007D0 0x00003FFF 0x00001280
|
||||
mask_write 0XF80007D4 0x00003FFF 0x00001280
|
||||
mask_write 0XF8000830 0x003F003F 0x000A0037
|
||||
mask_write 0XF8000834 0x003F003F 0x003A0039
|
||||
mwr -force 0XF8000004 0x0000767B
|
||||
}
|
||||
proc ps7_peripherals_init_data_3_0 {} {
|
||||
mwr -force 0XF8000008 0x0000DF0D
|
||||
mask_write 0XF8000B48 0x00000180 0x00000180
|
||||
mask_write 0XF8000B4C 0x00000180 0x00000180
|
||||
mask_write 0XF8000B50 0x00000180 0x00000180
|
||||
mask_write 0XF8000B54 0x00000180 0x00000180
|
||||
mwr -force 0XF8000004 0x0000767B
|
||||
mask_write 0XE0000034 0x000000FF 0x00000006
|
||||
mask_write 0XE0000018 0x0000FFFF 0x0000007C
|
||||
mask_write 0XE0000000 0x000001FF 0x00000017
|
||||
mask_write 0XE0000004 0x000003FF 0x00000020
|
||||
mask_write 0XE000D000 0x00080000 0x00080000
|
||||
mask_write 0XF8007000 0x20000000 0x00000000
|
||||
mask_write 0XE000A204 0xFFFFFFFF 0x00000200
|
||||
mask_write 0XE000A000 0xFFFFFFFF 0xFDFF0200
|
||||
mask_write 0XE000A208 0xFFFFFFFF 0x00000200
|
||||
mask_write 0XE000A000 0xFFFFFFFF 0xFDFF0000
|
||||
mask_delay 0XF8F00200 1
|
||||
mask_write 0XE000A000 0xFFFFFFFF 0xFDFF0200
|
||||
}
|
||||
proc ps7_post_config_3_0 {} {
|
||||
mwr -force 0XF8000008 0x0000DF0D
|
||||
mask_write 0XF8000900 0x0000000F 0x0000000F
|
||||
mask_write 0XF8000240 0xFFFFFFFF 0x00000000
|
||||
mwr -force 0XF8000004 0x0000767B
|
||||
}
|
||||
proc ps7_debug_3_0 {} {
|
||||
mwr -force 0XF8898FB0 0xC5ACCE55
|
||||
mwr -force 0XF8899FB0 0xC5ACCE55
|
||||
mwr -force 0XF8809FB0 0xC5ACCE55
|
||||
}
|
||||
proc ps7_pll_init_data_2_0 {} {
|
||||
mwr -force 0XF8000008 0x0000DF0D
|
||||
mask_write 0XF8000110 0x003FFFF0 0x000FA3C0
|
||||
mask_write 0XF8000100 0x0007F000 0x0002E000
|
||||
mask_write 0XF8000100 0x00000010 0x00000010
|
||||
mask_write 0XF8000100 0x00000001 0x00000001
|
||||
mask_write 0XF8000100 0x00000001 0x00000000
|
||||
mask_poll 0XF800010C 0x00000001
|
||||
mask_write 0XF8000100 0x00000010 0x00000000
|
||||
mask_write 0XF8000120 0x1F003F30 0x1F000200
|
||||
mask_write 0XF8000114 0x003FFFF0 0x0012C220
|
||||
mask_write 0XF8000104 0x0007F000 0x00020000
|
||||
mask_write 0XF8000104 0x00000010 0x00000010
|
||||
mask_write 0XF8000104 0x00000001 0x00000001
|
||||
mask_write 0XF8000104 0x00000001 0x00000000
|
||||
mask_poll 0XF800010C 0x00000002
|
||||
mask_write 0XF8000104 0x00000010 0x00000000
|
||||
mask_write 0XF8000124 0xFFF00003 0x0C200003
|
||||
mask_write 0XF8000118 0x003FFFF0 0x001452C0
|
||||
mask_write 0XF8000108 0x0007F000 0x0001E000
|
||||
mask_write 0XF8000108 0x00000010 0x00000010
|
||||
mask_write 0XF8000108 0x00000001 0x00000001
|
||||
mask_write 0XF8000108 0x00000001 0x00000000
|
||||
mask_poll 0XF800010C 0x00000004
|
||||
mask_write 0XF8000108 0x00000010 0x00000000
|
||||
mwr -force 0XF8000004 0x0000767B
|
||||
}
|
||||
proc ps7_clock_init_data_2_0 {} {
|
||||
mwr -force 0XF8000008 0x0000DF0D
|
||||
mask_write 0XF8000128 0x03F03F01 0x00700F01
|
||||
mask_write 0XF8000138 0x00000011 0x00000001
|
||||
mask_write 0XF8000140 0x03F03F71 0x00100801
|
||||
mask_write 0XF800014C 0x00003F31 0x00000501
|
||||
mask_write 0XF8000150 0x00003F33 0x00000A03
|
||||
mask_write 0XF8000154 0x00003F33 0x00000A01
|
||||
mask_write 0XF8000168 0x00003F31 0x00000501
|
||||
mask_write 0XF8000170 0x03F03F30 0x00200500
|
||||
mask_write 0XF80001C4 0x00000001 0x00000001
|
||||
mask_write 0XF800012C 0x01FFCCCD 0x01DC0C4D
|
||||
mwr -force 0XF8000004 0x0000767B
|
||||
}
|
||||
proc ps7_ddr_init_data_2_0 {} {
|
||||
mask_write 0XF8006000 0x0001FFFF 0x00000080
|
||||
mask_write 0XF8006004 0x1FFFFFFF 0x00081082
|
||||
mask_write 0XF8006008 0x03FFFFFF 0x03C0780F
|
||||
mask_write 0XF800600C 0x03FFFFFF 0x02001001
|
||||
mask_write 0XF8006010 0x03FFFFFF 0x00014001
|
||||
mask_write 0XF8006014 0x001FFFFF 0x0004285B
|
||||
mask_write 0XF8006018 0xF7FFFFFF 0x44E458D3
|
||||
mask_write 0XF800601C 0xFFFFFFFF 0x7282BCE5
|
||||
mask_write 0XF8006020 0xFFFFFFFC 0x272872D0
|
||||
mask_write 0XF8006024 0x0FFFFFFF 0x0000003C
|
||||
mask_write 0XF8006028 0x00003FFF 0x00002007
|
||||
mask_write 0XF800602C 0xFFFFFFFF 0x00000008
|
||||
mask_write 0XF8006030 0xFFFFFFFF 0x00040B30
|
||||
mask_write 0XF8006034 0x13FF3FFF 0x000116D4
|
||||
mask_write 0XF8006038 0x00001FC3 0x00000000
|
||||
mask_write 0XF800603C 0x000FFFFF 0x00000777
|
||||
mask_write 0XF8006040 0xFFFFFFFF 0xFFF00000
|
||||
mask_write 0XF8006044 0x0FFFFFFF 0x0F666666
|
||||
mask_write 0XF8006048 0x3FFFFFFF 0x0003C248
|
||||
mask_write 0XF8006050 0xFF0F8FFF 0x77010800
|
||||
mask_write 0XF8006058 0x0001FFFF 0x00000101
|
||||
mask_write 0XF800605C 0x0000FFFF 0x00005003
|
||||
mask_write 0XF8006060 0x000017FF 0x0000003E
|
||||
mask_write 0XF8006064 0x00021FE0 0x00020000
|
||||
mask_write 0XF8006068 0x03FFFFFF 0x00284141
|
||||
mask_write 0XF800606C 0x0000FFFF 0x00001610
|
||||
mask_write 0XF8006078 0x03FFFFFF 0x00466111
|
||||
mask_write 0XF800607C 0x000FFFFF 0x00032222
|
||||
mask_write 0XF80060A0 0x00FFFFFF 0x00008000
|
||||
mask_write 0XF80060A4 0xFFFFFFFF 0x10200802
|
||||
mask_write 0XF80060A8 0x0FFFFFFF 0x0690CB73
|
||||
mask_write 0XF80060AC 0x000001FF 0x000001FE
|
||||
mask_write 0XF80060B0 0x1FFFFFFF 0x1CFFFFFF
|
||||
mask_write 0XF80060B4 0x000007FF 0x00000200
|
||||
mask_write 0XF80060B8 0x01FFFFFF 0x00200066
|
||||
mask_write 0XF80060C4 0x00000003 0x00000000
|
||||
mask_write 0XF80060C8 0x000000FF 0x00000000
|
||||
mask_write 0XF80060DC 0x00000001 0x00000000
|
||||
mask_write 0XF80060F0 0x0000FFFF 0x00000000
|
||||
mask_write 0XF80060F4 0x0000000F 0x00000008
|
||||
mask_write 0XF8006114 0x000000FF 0x00000000
|
||||
mask_write 0XF8006118 0x7FFFFFFF 0x40000001
|
||||
mask_write 0XF800611C 0x7FFFFFFF 0x40000001
|
||||
mask_write 0XF8006120 0x7FFFFFFF 0x40000001
|
||||
mask_write 0XF8006124 0x7FFFFFFF 0x40000001
|
||||
mask_write 0XF800612C 0x000FFFFF 0x00029000
|
||||
mask_write 0XF8006130 0x000FFFFF 0x00029000
|
||||
mask_write 0XF8006134 0x000FFFFF 0x00029000
|
||||
mask_write 0XF8006138 0x000FFFFF 0x00029000
|
||||
mask_write 0XF8006140 0x000FFFFF 0x00000035
|
||||
mask_write 0XF8006144 0x000FFFFF 0x00000035
|
||||
mask_write 0XF8006148 0x000FFFFF 0x00000035
|
||||
mask_write 0XF800614C 0x000FFFFF 0x00000035
|
||||
mask_write 0XF8006154 0x000FFFFF 0x00000080
|
||||
mask_write 0XF8006158 0x000FFFFF 0x00000080
|
||||
mask_write 0XF800615C 0x000FFFFF 0x00000080
|
||||
mask_write 0XF8006160 0x000FFFFF 0x00000080
|
||||
mask_write 0XF8006168 0x001FFFFF 0x000000F9
|
||||
mask_write 0XF800616C 0x001FFFFF 0x000000F9
|
||||
mask_write 0XF8006170 0x001FFFFF 0x000000F9
|
||||
mask_write 0XF8006174 0x001FFFFF 0x000000F9
|
||||
mask_write 0XF800617C 0x000FFFFF 0x000000C0
|
||||
mask_write 0XF8006180 0x000FFFFF 0x000000C0
|
||||
mask_write 0XF8006184 0x000FFFFF 0x000000C0
|
||||
mask_write 0XF8006188 0x000FFFFF 0x000000C0
|
||||
mask_write 0XF8006190 0xFFFFFFFF 0x10040080
|
||||
mask_write 0XF8006194 0x000FFFFF 0x0001FC82
|
||||
mask_write 0XF8006204 0xFFFFFFFF 0x00000000
|
||||
mask_write 0XF8006208 0x000F03FF 0x000803FF
|
||||
mask_write 0XF800620C 0x000F03FF 0x000803FF
|
||||
mask_write 0XF8006210 0x000F03FF 0x000803FF
|
||||
mask_write 0XF8006214 0x000F03FF 0x000803FF
|
||||
mask_write 0XF8006218 0x000F03FF 0x000003FF
|
||||
mask_write 0XF800621C 0x000F03FF 0x000003FF
|
||||
mask_write 0XF8006220 0x000F03FF 0x000003FF
|
||||
mask_write 0XF8006224 0x000F03FF 0x000003FF
|
||||
mask_write 0XF80062A8 0x00000FF7 0x00000000
|
||||
mask_write 0XF80062AC 0xFFFFFFFF 0x00000000
|
||||
mask_write 0XF80062B0 0x003FFFFF 0x00005125
|
||||
mask_write 0XF80062B4 0x0003FFFF 0x000012A8
|
||||
mask_poll 0XF8000B74 0x00002000
|
||||
mask_write 0XF8006000 0x0001FFFF 0x00000081
|
||||
mask_poll 0XF8006054 0x00000007
|
||||
}
|
||||
proc ps7_mio_init_data_2_0 {} {
|
||||
mwr -force 0XF8000008 0x0000DF0D
|
||||
mask_write 0XF8000B40 0x00000FFF 0x00000600
|
||||
mask_write 0XF8000B44 0x00000FFF 0x00000600
|
||||
mask_write 0XF8000B48 0x00000FFF 0x00000672
|
||||
mask_write 0XF8000B4C 0x00000FFF 0x00000672
|
||||
mask_write 0XF8000B50 0x00000FFF 0x00000674
|
||||
mask_write 0XF8000B54 0x00000FFF 0x00000674
|
||||
mask_write 0XF8000B58 0x00000FFF 0x00000600
|
||||
mask_write 0XF8000B5C 0xFFFFFFFF 0x0018C61C
|
||||
mask_write 0XF8000B60 0xFFFFFFFF 0x00F9861C
|
||||
mask_write 0XF8000B64 0xFFFFFFFF 0x00F9861C
|
||||
mask_write 0XF8000B68 0xFFFFFFFF 0x00F9861C
|
||||
mask_write 0XF8000B6C 0x00007FFF 0x00000260
|
||||
mask_write 0XF8000B70 0x00000021 0x00000021
|
||||
mask_write 0XF8000B70 0x00000021 0x00000020
|
||||
mask_write 0XF8000B70 0x07FFFFFF 0x00000823
|
||||
mask_write 0XF8000700 0x00003FFF 0x00001600
|
||||
mask_write 0XF8000704 0x00003FFF 0x00001602
|
||||
mask_write 0XF8000708 0x00003FFF 0x00000602
|
||||
mask_write 0XF800070C 0x00003FFF 0x00000602
|
||||
mask_write 0XF8000710 0x00003FFF 0x00000602
|
||||
mask_write 0XF8000714 0x00003FFF 0x00000602
|
||||
mask_write 0XF8000718 0x00003FFF 0x00000602
|
||||
mask_write 0XF800071C 0x00003FFF 0x00000600
|
||||
mask_write 0XF8000720 0x00003FFF 0x00000600
|
||||
mask_write 0XF8000724 0x00003FFF 0x00001600
|
||||
mask_write 0XF8000728 0x00003F01 0x00001601
|
||||
mask_write 0XF800072C 0x00003FFF 0x00001600
|
||||
mask_write 0XF8000730 0x00003FFF 0x00001600
|
||||
mask_write 0XF8000734 0x00003FFF 0x00001600
|
||||
mask_write 0XF8000738 0x00003FFF 0x000016E1
|
||||
mask_write 0XF800073C 0x00003FFF 0x000016E0
|
||||
mask_write 0XF8000740 0x00003FFF 0x00001202
|
||||
mask_write 0XF8000744 0x00003FFF 0x00001202
|
||||
mask_write 0XF8000748 0x00003FFF 0x00001202
|
||||
mask_write 0XF800074C 0x00003FFF 0x00001202
|
||||
mask_write 0XF8000750 0x00003FFF 0x00001202
|
||||
mask_write 0XF8000754 0x00003FFF 0x00001202
|
||||
mask_write 0XF8000758 0x00003FFF 0x00001203
|
||||
mask_write 0XF800075C 0x00003FFF 0x00001203
|
||||
mask_write 0XF8000760 0x00003FFF 0x00001203
|
||||
mask_write 0XF8000764 0x00003FFF 0x00001203
|
||||
mask_write 0XF8000768 0x00003FFF 0x00001203
|
||||
mask_write 0XF800076C 0x00003FFF 0x00001203
|
||||
mask_write 0XF8000770 0x00003FFF 0x00001204
|
||||
mask_write 0XF8000774 0x00003FFF 0x00001205
|
||||
mask_write 0XF8000778 0x00003FFF 0x00001204
|
||||
mask_write 0XF800077C 0x00003FFF 0x00001205
|
||||
mask_write 0XF8000780 0x00003FFF 0x00001204
|
||||
mask_write 0XF8000784 0x00003FFF 0x00001204
|
||||
mask_write 0XF8000788 0x00003FFF 0x00001204
|
||||
mask_write 0XF800078C 0x00003FFF 0x00001204
|
||||
mask_write 0XF8000790 0x00003FFF 0x00001205
|
||||
mask_write 0XF8000794 0x00003FFF 0x00001204
|
||||
mask_write 0XF8000798 0x00003FFF 0x00001204
|
||||
mask_write 0XF800079C 0x00003FFF 0x00001204
|
||||
mask_write 0XF80007A0 0x00003FFF 0x00001280
|
||||
mask_write 0XF80007A4 0x00003FFF 0x00001280
|
||||
mask_write 0XF80007A8 0x00003FFF 0x00001280
|
||||
mask_write 0XF80007AC 0x00003FFF 0x00001280
|
||||
mask_write 0XF80007B0 0x00003FFF 0x00001280
|
||||
mask_write 0XF80007B4 0x00003FFF 0x00001280
|
||||
mask_write 0XF80007B8 0x00003FFF 0x00001280
|
||||
mask_write 0XF80007BC 0x00003FFF 0x00001280
|
||||
mask_write 0XF80007C0 0x00003FFF 0x00001280
|
||||
mask_write 0XF80007C4 0x00003FFF 0x00001280
|
||||
mask_write 0XF80007C8 0x00003FFF 0x00001280
|
||||
mask_write 0XF80007CC 0x00003FFF 0x00001280
|
||||
mask_write 0XF80007D0 0x00003FFF 0x00001280
|
||||
mask_write 0XF80007D4 0x00003FFF 0x00001280
|
||||
mask_write 0XF8000830 0x003F003F 0x000A0037
|
||||
mask_write 0XF8000834 0x003F003F 0x003A0039
|
||||
mwr -force 0XF8000004 0x0000767B
|
||||
}
|
||||
proc ps7_peripherals_init_data_2_0 {} {
|
||||
mwr -force 0XF8000008 0x0000DF0D
|
||||
mask_write 0XF8000B48 0x00000180 0x00000180
|
||||
mask_write 0XF8000B4C 0x00000180 0x00000180
|
||||
mask_write 0XF8000B50 0x00000180 0x00000180
|
||||
mask_write 0XF8000B54 0x00000180 0x00000180
|
||||
mwr -force 0XF8000004 0x0000767B
|
||||
mask_write 0XE0000034 0x000000FF 0x00000006
|
||||
mask_write 0XE0000018 0x0000FFFF 0x0000007C
|
||||
mask_write 0XE0000000 0x000001FF 0x00000017
|
||||
mask_write 0XE0000004 0x00000FFF 0x00000020
|
||||
mask_write 0XE000D000 0x00080000 0x00080000
|
||||
mask_write 0XF8007000 0x20000000 0x00000000
|
||||
mask_write 0XE000A204 0xFFFFFFFF 0x00000200
|
||||
mask_write 0XE000A000 0xFFFFFFFF 0xFDFF0200
|
||||
mask_write 0XE000A208 0xFFFFFFFF 0x00000200
|
||||
mask_write 0XE000A000 0xFFFFFFFF 0xFDFF0000
|
||||
mask_delay 0XF8F00200 1
|
||||
mask_write 0XE000A000 0xFFFFFFFF 0xFDFF0200
|
||||
}
|
||||
proc ps7_post_config_2_0 {} {
|
||||
mwr -force 0XF8000008 0x0000DF0D
|
||||
mask_write 0XF8000900 0x0000000F 0x0000000F
|
||||
mask_write 0XF8000240 0xFFFFFFFF 0x00000000
|
||||
mwr -force 0XF8000004 0x0000767B
|
||||
}
|
||||
proc ps7_debug_2_0 {} {
|
||||
mwr -force 0XF8898FB0 0xC5ACCE55
|
||||
mwr -force 0XF8899FB0 0xC5ACCE55
|
||||
mwr -force 0XF8809FB0 0xC5ACCE55
|
||||
}
|
||||
proc ps7_pll_init_data_1_0 {} {
|
||||
mwr -force 0XF8000008 0x0000DF0D
|
||||
mask_write 0XF8000110 0x003FFFF0 0x000FA3C0
|
||||
mask_write 0XF8000100 0x0007F000 0x0002E000
|
||||
mask_write 0XF8000100 0x00000010 0x00000010
|
||||
mask_write 0XF8000100 0x00000001 0x00000001
|
||||
mask_write 0XF8000100 0x00000001 0x00000000
|
||||
mask_poll 0XF800010C 0x00000001
|
||||
mask_write 0XF8000100 0x00000010 0x00000000
|
||||
mask_write 0XF8000120 0x1F003F30 0x1F000200
|
||||
mask_write 0XF8000114 0x003FFFF0 0x0012C220
|
||||
mask_write 0XF8000104 0x0007F000 0x00020000
|
||||
mask_write 0XF8000104 0x00000010 0x00000010
|
||||
mask_write 0XF8000104 0x00000001 0x00000001
|
||||
mask_write 0XF8000104 0x00000001 0x00000000
|
||||
mask_poll 0XF800010C 0x00000002
|
||||
mask_write 0XF8000104 0x00000010 0x00000000
|
||||
mask_write 0XF8000124 0xFFF00003 0x0C200003
|
||||
mask_write 0XF8000118 0x003FFFF0 0x001452C0
|
||||
mask_write 0XF8000108 0x0007F000 0x0001E000
|
||||
mask_write 0XF8000108 0x00000010 0x00000010
|
||||
mask_write 0XF8000108 0x00000001 0x00000001
|
||||
mask_write 0XF8000108 0x00000001 0x00000000
|
||||
mask_poll 0XF800010C 0x00000004
|
||||
mask_write 0XF8000108 0x00000010 0x00000000
|
||||
mwr -force 0XF8000004 0x0000767B
|
||||
}
|
||||
proc ps7_clock_init_data_1_0 {} {
|
||||
mwr -force 0XF8000008 0x0000DF0D
|
||||
mask_write 0XF8000128 0x03F03F01 0x00700F01
|
||||
mask_write 0XF8000138 0x00000011 0x00000001
|
||||
mask_write 0XF8000140 0x03F03F71 0x00100801
|
||||
mask_write 0XF800014C 0x00003F31 0x00000501
|
||||
mask_write 0XF8000150 0x00003F33 0x00000A03
|
||||
mask_write 0XF8000154 0x00003F33 0x00000A01
|
||||
mask_write 0XF8000168 0x00003F31 0x00000501
|
||||
mask_write 0XF8000170 0x03F03F30 0x00200500
|
||||
mask_write 0XF80001C4 0x00000001 0x00000001
|
||||
mask_write 0XF800012C 0x01FFCCCD 0x01DC0C4D
|
||||
mwr -force 0XF8000004 0x0000767B
|
||||
}
|
||||
proc ps7_ddr_init_data_1_0 {} {
|
||||
mask_write 0XF8006000 0x0001FFFF 0x00000080
|
||||
mask_write 0XF8006004 0x1FFFFFFF 0x00081082
|
||||
mask_write 0XF8006008 0x03FFFFFF 0x03C0780F
|
||||
mask_write 0XF800600C 0x03FFFFFF 0x02001001
|
||||
mask_write 0XF8006010 0x03FFFFFF 0x00014001
|
||||
mask_write 0XF8006014 0x001FFFFF 0x0004285B
|
||||
mask_write 0XF8006018 0xF7FFFFFF 0x44E458D3
|
||||
mask_write 0XF800601C 0xFFFFFFFF 0x7282BCE5
|
||||
mask_write 0XF8006020 0xFFFFFFFC 0x272872D0
|
||||
mask_write 0XF8006024 0x0FFFFFFF 0x0000003C
|
||||
mask_write 0XF8006028 0x00003FFF 0x00002007
|
||||
mask_write 0XF800602C 0xFFFFFFFF 0x00000008
|
||||
mask_write 0XF8006030 0xFFFFFFFF 0x00040B30
|
||||
mask_write 0XF8006034 0x13FF3FFF 0x000116D4
|
||||
mask_write 0XF8006038 0x00001FC3 0x00000000
|
||||
mask_write 0XF800603C 0x000FFFFF 0x00000777
|
||||
mask_write 0XF8006040 0xFFFFFFFF 0xFFF00000
|
||||
mask_write 0XF8006044 0x0FFFFFFF 0x0F666666
|
||||
mask_write 0XF8006048 0x3FFFFFFF 0x0003C248
|
||||
mask_write 0XF8006050 0xFF0F8FFF 0x77010800
|
||||
mask_write 0XF8006058 0x0001FFFF 0x00000101
|
||||
mask_write 0XF800605C 0x0000FFFF 0x00005003
|
||||
mask_write 0XF8006060 0x000017FF 0x0000003E
|
||||
mask_write 0XF8006064 0x00021FE0 0x00020000
|
||||
mask_write 0XF8006068 0x03FFFFFF 0x00284141
|
||||
mask_write 0XF800606C 0x0000FFFF 0x00001610
|
||||
mask_write 0XF80060A0 0x00FFFFFF 0x00008000
|
||||
mask_write 0XF80060A4 0xFFFFFFFF 0x10200802
|
||||
mask_write 0XF80060A8 0x0FFFFFFF 0x0690CB73
|
||||
mask_write 0XF80060AC 0x000001FF 0x000001FE
|
||||
mask_write 0XF80060B0 0x1FFFFFFF 0x1CFFFFFF
|
||||
mask_write 0XF80060B4 0x000007FF 0x00000200
|
||||
mask_write 0XF80060B8 0x01FFFFFF 0x00200066
|
||||
mask_write 0XF80060C4 0x00000003 0x00000000
|
||||
mask_write 0XF80060C8 0x000000FF 0x00000000
|
||||
mask_write 0XF80060DC 0x00000001 0x00000000
|
||||
mask_write 0XF80060F0 0x0000FFFF 0x00000000
|
||||
mask_write 0XF80060F4 0x0000000F 0x00000008
|
||||
mask_write 0XF8006114 0x000000FF 0x00000000
|
||||
mask_write 0XF8006118 0x7FFFFFFF 0x40000001
|
||||
mask_write 0XF800611C 0x7FFFFFFF 0x40000001
|
||||
mask_write 0XF8006120 0x7FFFFFFF 0x40000001
|
||||
mask_write 0XF8006124 0x7FFFFFFF 0x40000001
|
||||
mask_write 0XF800612C 0x000FFFFF 0x00029000
|
||||
mask_write 0XF8006130 0x000FFFFF 0x00029000
|
||||
mask_write 0XF8006134 0x000FFFFF 0x00029000
|
||||
mask_write 0XF8006138 0x000FFFFF 0x00029000
|
||||
mask_write 0XF8006140 0x000FFFFF 0x00000035
|
||||
mask_write 0XF8006144 0x000FFFFF 0x00000035
|
||||
mask_write 0XF8006148 0x000FFFFF 0x00000035
|
||||
mask_write 0XF800614C 0x000FFFFF 0x00000035
|
||||
mask_write 0XF8006154 0x000FFFFF 0x00000080
|
||||
mask_write 0XF8006158 0x000FFFFF 0x00000080
|
||||
mask_write 0XF800615C 0x000FFFFF 0x00000080
|
||||
mask_write 0XF8006160 0x000FFFFF 0x00000080
|
||||
mask_write 0XF8006168 0x001FFFFF 0x000000F9
|
||||
mask_write 0XF800616C 0x001FFFFF 0x000000F9
|
||||
mask_write 0XF8006170 0x001FFFFF 0x000000F9
|
||||
mask_write 0XF8006174 0x001FFFFF 0x000000F9
|
||||
mask_write 0XF800617C 0x000FFFFF 0x000000C0
|
||||
mask_write 0XF8006180 0x000FFFFF 0x000000C0
|
||||
mask_write 0XF8006184 0x000FFFFF 0x000000C0
|
||||
mask_write 0XF8006188 0x000FFFFF 0x000000C0
|
||||
mask_write 0XF8006190 0xFFFFFFFF 0x10040080
|
||||
mask_write 0XF8006194 0x000FFFFF 0x0001FC82
|
||||
mask_write 0XF8006204 0xFFFFFFFF 0x00000000
|
||||
mask_write 0XF8006208 0x000F03FF 0x000803FF
|
||||
mask_write 0XF800620C 0x000F03FF 0x000803FF
|
||||
mask_write 0XF8006210 0x000F03FF 0x000803FF
|
||||
mask_write 0XF8006214 0x000F03FF 0x000803FF
|
||||
mask_write 0XF8006218 0x000F03FF 0x000003FF
|
||||
mask_write 0XF800621C 0x000F03FF 0x000003FF
|
||||
mask_write 0XF8006220 0x000F03FF 0x000003FF
|
||||
mask_write 0XF8006224 0x000F03FF 0x000003FF
|
||||
mask_write 0XF80062A8 0x00000FF7 0x00000000
|
||||
mask_write 0XF80062AC 0xFFFFFFFF 0x00000000
|
||||
mask_write 0XF80062B0 0x003FFFFF 0x00005125
|
||||
mask_write 0XF80062B4 0x0003FFFF 0x000012A8
|
||||
mask_poll 0XF8000B74 0x00002000
|
||||
mask_write 0XF8006000 0x0001FFFF 0x00000081
|
||||
mask_poll 0XF8006054 0x00000007
|
||||
}
|
||||
proc ps7_mio_init_data_1_0 {} {
|
||||
mwr -force 0XF8000008 0x0000DF0D
|
||||
mask_write 0XF8000B40 0x00000FFF 0x00000600
|
||||
mask_write 0XF8000B44 0x00000FFF 0x00000600
|
||||
mask_write 0XF8000B48 0x00000FFF 0x00000672
|
||||
mask_write 0XF8000B4C 0x00000FFF 0x00000672
|
||||
mask_write 0XF8000B50 0x00000FFF 0x00000674
|
||||
mask_write 0XF8000B54 0x00000FFF 0x00000674
|
||||
mask_write 0XF8000B58 0x00000FFF 0x00000600
|
||||
mask_write 0XF8000B5C 0xFFFFFFFF 0x0018C61C
|
||||
mask_write 0XF8000B60 0xFFFFFFFF 0x00F9861C
|
||||
mask_write 0XF8000B64 0xFFFFFFFF 0x00F9861C
|
||||
mask_write 0XF8000B68 0xFFFFFFFF 0x00F9861C
|
||||
mask_write 0XF8000B6C 0x000073FF 0x00000260
|
||||
mask_write 0XF8000B70 0x00000021 0x00000021
|
||||
mask_write 0XF8000B70 0x00000021 0x00000020
|
||||
mask_write 0XF8000B70 0x07FFFFFF 0x00000823
|
||||
mask_write 0XF8000700 0x00003FFF 0x00001600
|
||||
mask_write 0XF8000704 0x00003FFF 0x00001602
|
||||
mask_write 0XF8000708 0x00003FFF 0x00000602
|
||||
mask_write 0XF800070C 0x00003FFF 0x00000602
|
||||
mask_write 0XF8000710 0x00003FFF 0x00000602
|
||||
mask_write 0XF8000714 0x00003FFF 0x00000602
|
||||
mask_write 0XF8000718 0x00003FFF 0x00000602
|
||||
mask_write 0XF800071C 0x00003FFF 0x00000600
|
||||
mask_write 0XF8000720 0x00003FFF 0x00000600
|
||||
mask_write 0XF8000724 0x00003FFF 0x00001600
|
||||
mask_write 0XF8000728 0x00003F01 0x00001601
|
||||
mask_write 0XF800072C 0x00003FFF 0x00001600
|
||||
mask_write 0XF8000730 0x00003FFF 0x00001600
|
||||
mask_write 0XF8000734 0x00003FFF 0x00001600
|
||||
mask_write 0XF8000738 0x00003FFF 0x000016E1
|
||||
mask_write 0XF800073C 0x00003FFF 0x000016E0
|
||||
mask_write 0XF8000740 0x00003FFF 0x00001202
|
||||
mask_write 0XF8000744 0x00003FFF 0x00001202
|
||||
mask_write 0XF8000748 0x00003FFF 0x00001202
|
||||
mask_write 0XF800074C 0x00003FFF 0x00001202
|
||||
mask_write 0XF8000750 0x00003FFF 0x00001202
|
||||
mask_write 0XF8000754 0x00003FFF 0x00001202
|
||||
mask_write 0XF8000758 0x00003FFF 0x00001203
|
||||
mask_write 0XF800075C 0x00003FFF 0x00001203
|
||||
mask_write 0XF8000760 0x00003FFF 0x00001203
|
||||
mask_write 0XF8000764 0x00003FFF 0x00001203
|
||||
mask_write 0XF8000768 0x00003FFF 0x00001203
|
||||
mask_write 0XF800076C 0x00003FFF 0x00001203
|
||||
mask_write 0XF8000770 0x00003FFF 0x00001204
|
||||
mask_write 0XF8000774 0x00003FFF 0x00001205
|
||||
mask_write 0XF8000778 0x00003FFF 0x00001204
|
||||
mask_write 0XF800077C 0x00003FFF 0x00001205
|
||||
mask_write 0XF8000780 0x00003FFF 0x00001204
|
||||
mask_write 0XF8000784 0x00003FFF 0x00001204
|
||||
mask_write 0XF8000788 0x00003FFF 0x00001204
|
||||
mask_write 0XF800078C 0x00003FFF 0x00001204
|
||||
mask_write 0XF8000790 0x00003FFF 0x00001205
|
||||
mask_write 0XF8000794 0x00003FFF 0x00001204
|
||||
mask_write 0XF8000798 0x00003FFF 0x00001204
|
||||
mask_write 0XF800079C 0x00003FFF 0x00001204
|
||||
mask_write 0XF80007A0 0x00003FFF 0x00001280
|
||||
mask_write 0XF80007A4 0x00003FFF 0x00001280
|
||||
mask_write 0XF80007A8 0x00003FFF 0x00001280
|
||||
mask_write 0XF80007AC 0x00003FFF 0x00001280
|
||||
mask_write 0XF80007B0 0x00003FFF 0x00001280
|
||||
mask_write 0XF80007B4 0x00003FFF 0x00001280
|
||||
mask_write 0XF80007B8 0x00003FFF 0x00001280
|
||||
mask_write 0XF80007BC 0x00003FFF 0x00001280
|
||||
mask_write 0XF80007C0 0x00003FFF 0x00001280
|
||||
mask_write 0XF80007C4 0x00003FFF 0x00001280
|
||||
mask_write 0XF80007C8 0x00003FFF 0x00001280
|
||||
mask_write 0XF80007CC 0x00003FFF 0x00001280
|
||||
mask_write 0XF80007D0 0x00003FFF 0x00001280
|
||||
mask_write 0XF80007D4 0x00003FFF 0x00001280
|
||||
mask_write 0XF8000830 0x003F003F 0x000A0037
|
||||
mask_write 0XF8000834 0x003F003F 0x003A0039
|
||||
mwr -force 0XF8000004 0x0000767B
|
||||
}
|
||||
proc ps7_peripherals_init_data_1_0 {} {
|
||||
mwr -force 0XF8000008 0x0000DF0D
|
||||
mask_write 0XF8000B48 0x00000180 0x00000180
|
||||
mask_write 0XF8000B4C 0x00000180 0x00000180
|
||||
mask_write 0XF8000B50 0x00000180 0x00000180
|
||||
mask_write 0XF8000B54 0x00000180 0x00000180
|
||||
mwr -force 0XF8000004 0x0000767B
|
||||
mask_write 0XE0000034 0x000000FF 0x00000006
|
||||
mask_write 0XE0000018 0x0000FFFF 0x0000007C
|
||||
mask_write 0XE0000000 0x000001FF 0x00000017
|
||||
mask_write 0XE0000004 0x00000FFF 0x00000020
|
||||
mask_write 0XE000D000 0x00080000 0x00080000
|
||||
mask_write 0XF8007000 0x20000000 0x00000000
|
||||
mask_write 0XE000A204 0xFFFFFFFF 0x00000200
|
||||
mask_write 0XE000A000 0xFFFFFFFF 0xFDFF0200
|
||||
mask_write 0XE000A208 0xFFFFFFFF 0x00000200
|
||||
mask_write 0XE000A000 0xFFFFFFFF 0xFDFF0000
|
||||
mask_delay 0XF8F00200 1
|
||||
mask_write 0XE000A000 0xFFFFFFFF 0xFDFF0200
|
||||
}
|
||||
proc ps7_post_config_1_0 {} {
|
||||
mwr -force 0XF8000008 0x0000DF0D
|
||||
mask_write 0XF8000900 0x0000000F 0x0000000F
|
||||
mask_write 0XF8000240 0xFFFFFFFF 0x00000000
|
||||
mwr -force 0XF8000004 0x0000767B
|
||||
}
|
||||
proc ps7_debug_1_0 {} {
|
||||
mwr -force 0XF8898FB0 0xC5ACCE55
|
||||
mwr -force 0XF8899FB0 0xC5ACCE55
|
||||
mwr -force 0XF8809FB0 0xC5ACCE55
|
||||
}
|
||||
set PCW_SILICON_VER_1_0 "0x0"
|
||||
set PCW_SILICON_VER_2_0 "0x1"
|
||||
set PCW_SILICON_VER_3_0 "0x2"
|
||||
set APU_FREQ 767000000
|
||||
|
||||
|
||||
|
||||
proc mask_poll { addr mask } {
|
||||
set count 1
|
||||
set curval "0x[string range [mrd $addr] end-8 end]"
|
||||
set maskedval [expr {$curval & $mask}]
|
||||
while { $maskedval == 0 } {
|
||||
set curval "0x[string range [mrd $addr] end-8 end]"
|
||||
set maskedval [expr {$curval & $mask}]
|
||||
set count [ expr { $count + 1 } ]
|
||||
if { $count == 100000000 } {
|
||||
puts "Timeout Reached. Mask poll failed at ADDRESS: $addr MASK: $mask"
|
||||
break
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
proc mask_delay { addr val } {
|
||||
set delay [ get_number_of_cycles_for_delay $val ]
|
||||
perf_reset_and_start_timer
|
||||
set curval "0x[string range [mrd $addr] end-8 end]"
|
||||
set maskedval [expr {$curval < $delay}]
|
||||
while { $maskedval == 1 } {
|
||||
set curval "0x[string range [mrd $addr] end-8 end]"
|
||||
set maskedval [expr {$curval < $delay}]
|
||||
}
|
||||
perf_reset_clock
|
||||
}
|
||||
|
||||
proc ps_version { } {
|
||||
set si_ver "0x[string range [mrd 0xF8007080] end-8 end]"
|
||||
set mask_sil_ver "0x[expr {$si_ver >> 28}]"
|
||||
return $mask_sil_ver;
|
||||
}
|
||||
|
||||
proc ps7_post_config {} {
|
||||
set saved_mode [configparams force-mem-accesses]
|
||||
configparams force-mem-accesses 1
|
||||
|
||||
variable PCW_SILICON_VER_1_0
|
||||
variable PCW_SILICON_VER_2_0
|
||||
variable PCW_SILICON_VER_3_0
|
||||
set sil_ver [ps_version]
|
||||
|
||||
if { $sil_ver == $PCW_SILICON_VER_1_0} {
|
||||
ps7_post_config_1_0
|
||||
} elseif { $sil_ver == $PCW_SILICON_VER_2_0 } {
|
||||
ps7_post_config_2_0
|
||||
} else {
|
||||
ps7_post_config_3_0
|
||||
}
|
||||
configparams force-mem-accesses $saved_mode
|
||||
}
|
||||
|
||||
proc ps7_debug {} {
|
||||
variable PCW_SILICON_VER_1_0
|
||||
variable PCW_SILICON_VER_2_0
|
||||
variable PCW_SILICON_VER_3_0
|
||||
set sil_ver [ps_version]
|
||||
|
||||
if { $sil_ver == $PCW_SILICON_VER_1_0} {
|
||||
ps7_debug_1_0
|
||||
} elseif { $sil_ver == $PCW_SILICON_VER_2_0 } {
|
||||
ps7_debug_2_0
|
||||
} else {
|
||||
ps7_debug_3_0
|
||||
}
|
||||
}
|
||||
proc ps7_init {} {
|
||||
variable PCW_SILICON_VER_1_0
|
||||
variable PCW_SILICON_VER_2_0
|
||||
variable PCW_SILICON_VER_3_0
|
||||
set sil_ver [ps_version]
|
||||
if { $sil_ver == $PCW_SILICON_VER_1_0} {
|
||||
ps7_mio_init_data_1_0
|
||||
ps7_pll_init_data_1_0
|
||||
ps7_clock_init_data_1_0
|
||||
ps7_ddr_init_data_1_0
|
||||
ps7_peripherals_init_data_1_0
|
||||
#puts "PCW Silicon Version : 1.0"
|
||||
} elseif { $sil_ver == $PCW_SILICON_VER_2_0 } {
|
||||
ps7_mio_init_data_2_0
|
||||
ps7_pll_init_data_2_0
|
||||
ps7_clock_init_data_2_0
|
||||
ps7_ddr_init_data_2_0
|
||||
ps7_peripherals_init_data_2_0
|
||||
#puts "PCW Silicon Version : 2.0"
|
||||
} else {
|
||||
ps7_mio_init_data_3_0
|
||||
ps7_pll_init_data_3_0
|
||||
ps7_clock_init_data_3_0
|
||||
ps7_ddr_init_data_3_0
|
||||
ps7_peripherals_init_data_3_0
|
||||
#puts "PCW Silicon Version : 3.0"
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
# For delay calculation using global timer
|
||||
|
||||
# start timer
|
||||
proc perf_start_clock { } {
|
||||
|
||||
#writing SCU_GLOBAL_TIMER_CONTROL register
|
||||
|
||||
mask_write 0xF8F00208 0x00000109 0x00000009
|
||||
}
|
||||
|
||||
# stop timer and reset timer count regs
|
||||
proc perf_reset_clock { } {
|
||||
perf_disable_clock
|
||||
mask_write 0xF8F00200 0xFFFFFFFF 0x00000000
|
||||
mask_write 0xF8F00204 0xFFFFFFFF 0x00000000
|
||||
}
|
||||
|
||||
# Compute mask for given delay in miliseconds
|
||||
proc get_number_of_cycles_for_delay { delay } {
|
||||
|
||||
# GTC is always clocked at 1/2 of the CPU frequency (CPU_3x2x)
|
||||
variable APU_FREQ
|
||||
return [ expr ($delay * $APU_FREQ /(2 * 1000))]
|
||||
}
|
||||
|
||||
|
||||
# stop timer
|
||||
proc perf_disable_clock {} {
|
||||
mask_write 0xF8F00208 0xFFFFFFFF 0x00000000
|
||||
}
|
||||
|
||||
proc perf_reset_and_start_timer {} {
|
||||
perf_reset_clock
|
||||
perf_start_clock
|
||||
}
|
||||
|
||||
|
||||
12356
project-spec/hw-description/ps7_init_gpl.c
Normal file
12356
project-spec/hw-description/ps7_init_gpl.c
Normal file
File diff suppressed because it is too large
Load Diff
131
project-spec/hw-description/ps7_init_gpl.h
Normal file
131
project-spec/hw-description/ps7_init_gpl.h
Normal file
@ -0,0 +1,131 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright (C) 2010-2020 <Xilinx Inc.>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, see <http://www.gnu.org/licenses/>
|
||||
*
|
||||
*
|
||||
******************************************************************************/
|
||||
/****************************************************************************/
|
||||
/**
|
||||
*
|
||||
* @file ps7_init_gpl.h
|
||||
*
|
||||
* This file can be included in FSBL code
|
||||
* to get prototype of ps7_init() function
|
||||
* and error codes
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
|
||||
//typedef unsigned int u32;
|
||||
|
||||
|
||||
/** do we need to make this name more unique ? **/
|
||||
//extern u32 ps7_init_data[];
|
||||
extern unsigned long * ps7_ddr_init_data;
|
||||
extern unsigned long * ps7_mio_init_data;
|
||||
extern unsigned long * ps7_pll_init_data;
|
||||
extern unsigned long * ps7_clock_init_data;
|
||||
extern unsigned long * ps7_peripherals_init_data;
|
||||
|
||||
|
||||
|
||||
#define OPCODE_EXIT 0U
|
||||
#define OPCODE_CLEAR 1U
|
||||
#define OPCODE_WRITE 2U
|
||||
#define OPCODE_MASKWRITE 3U
|
||||
#define OPCODE_MASKPOLL 4U
|
||||
#define OPCODE_MASKDELAY 5U
|
||||
#define NEW_PS7_ERR_CODE 1
|
||||
|
||||
/* Encode number of arguments in last nibble */
|
||||
#define EMIT_EXIT() ( (OPCODE_EXIT << 4 ) | 0 )
|
||||
#define EMIT_CLEAR(addr) ( (OPCODE_CLEAR << 4 ) | 1 ) , addr
|
||||
#define EMIT_WRITE(addr,val) ( (OPCODE_WRITE << 4 ) | 2 ) , addr, val
|
||||
#define EMIT_MASKWRITE(addr,mask,val) ( (OPCODE_MASKWRITE << 4 ) | 3 ) , addr, mask, val
|
||||
#define EMIT_MASKPOLL(addr,mask) ( (OPCODE_MASKPOLL << 4 ) | 2 ) , addr, mask
|
||||
#define EMIT_MASKDELAY(addr,mask) ( (OPCODE_MASKDELAY << 4 ) | 2 ) , addr, mask
|
||||
|
||||
/* Returns codes of PS7_Init */
|
||||
#define PS7_INIT_SUCCESS (0) // 0 is success in good old C
|
||||
#define PS7_INIT_CORRUPT (1) // 1 the data is corrupted, and slcr reg are in corrupted state now
|
||||
#define PS7_INIT_TIMEOUT (2) // 2 when a poll operation timed out
|
||||
#define PS7_POLL_FAILED_DDR_INIT (3) // 3 when a poll operation timed out for ddr init
|
||||
#define PS7_POLL_FAILED_DMA (4) // 4 when a poll operation timed out for dma done bit
|
||||
#define PS7_POLL_FAILED_PLL (5) // 5 when a poll operation timed out for pll sequence init
|
||||
|
||||
|
||||
/* Silicon Versions */
|
||||
#define PCW_SILICON_VERSION_1 0
|
||||
#define PCW_SILICON_VERSION_2 1
|
||||
#define PCW_SILICON_VERSION_3 2
|
||||
|
||||
/* This flag to be used by FSBL to check whether ps7_post_config() proc exixts */
|
||||
#define PS7_POST_CONFIG
|
||||
|
||||
/* Freq of all peripherals */
|
||||
|
||||
#define APU_FREQ 766666687
|
||||
#define DDR_FREQ 533333374
|
||||
#define DCI_FREQ 10158730
|
||||
#define QSPI_FREQ 200000000
|
||||
#define SMC_FREQ 10000000
|
||||
#define ENET0_FREQ 125000000
|
||||
#define ENET1_FREQ 10000000
|
||||
#define USB0_FREQ 60000000
|
||||
#define USB1_FREQ 60000000
|
||||
#define SDIO_FREQ 100000000
|
||||
#define UART_FREQ 100000000
|
||||
#define SPI_FREQ 10000000
|
||||
#define I2C_FREQ 127777779
|
||||
#define WDT_FREQ 127777786
|
||||
#define TTC_FREQ 50000000
|
||||
#define CAN_FREQ 10000000
|
||||
#define PCAP_FREQ 200000000
|
||||
#define TPIU_FREQ 200000000
|
||||
#define FPGA0_FREQ 100000000
|
||||
#define FPGA1_FREQ 10000000
|
||||
#define FPGA2_FREQ 10000000
|
||||
#define FPGA3_FREQ 10000000
|
||||
|
||||
|
||||
/* For delay calculation using global registers*/
|
||||
#define SCU_GLOBAL_TIMER_COUNT_L32 0xF8F00200
|
||||
#define SCU_GLOBAL_TIMER_COUNT_U32 0xF8F00204
|
||||
#define SCU_GLOBAL_TIMER_CONTROL 0xF8F00208
|
||||
#define SCU_GLOBAL_TIMER_AUTO_INC 0xF8F00218
|
||||
|
||||
int ps7_config( unsigned long*);
|
||||
int ps7_init();
|
||||
int ps7_post_config();
|
||||
int ps7_debug();
|
||||
char* getPS7MessageInfo(unsigned key);
|
||||
|
||||
void perf_start_clock(void);
|
||||
void perf_disable_clock(void);
|
||||
void perf_reset_clock(void);
|
||||
void perf_reset_and_start_timer();
|
||||
int get_number_of_cycles_for_delay(unsigned int delay);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
BIN
project-spec/hw-description/system.xsa
Normal file
BIN
project-spec/hw-description/system.xsa
Normal file
Binary file not shown.
17
project-spec/meta-user/COPYING.MIT
Normal file
17
project-spec/meta-user/COPYING.MIT
Normal file
@ -0,0 +1,17 @@
|
||||
Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
of this software and associated documentation files (the "Software"), to deal
|
||||
in the Software without restriction, including without limitation the rights
|
||||
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
copies of the Software, and to permit persons to whom the Software is
|
||||
furnished to do so, subject to the following conditions:
|
||||
|
||||
The above copyright notice and this permission notice shall be included in
|
||||
all copies or substantial portions of the Software.
|
||||
|
||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
THE SOFTWARE.
|
||||
64
project-spec/meta-user/README
Normal file
64
project-spec/meta-user/README
Normal file
@ -0,0 +1,64 @@
|
||||
This README file contains information on the contents of the
|
||||
meta-user layer.
|
||||
|
||||
Please see the corresponding sections below for details.
|
||||
|
||||
|
||||
Dependencies
|
||||
============
|
||||
|
||||
This layer depends on:
|
||||
|
||||
URI: git://git.openembedded.org/bitbake
|
||||
branch: master
|
||||
|
||||
URI: git://git.openembedded.org/openembedded-core
|
||||
layers: meta
|
||||
branch: master
|
||||
|
||||
URI: git://git.yoctoproject.org/xxxx
|
||||
layers: xxxx
|
||||
branch: master
|
||||
|
||||
|
||||
Patches
|
||||
=======
|
||||
|
||||
Please submit any patches against the meta-user layer to the
|
||||
xxxx mailing list (xxxx@zzzz.org) and cc: the maintainer:
|
||||
|
||||
Maintainer: XXX YYYYYY <xxx.yyyyyy@zzzzz.com>
|
||||
|
||||
|
||||
Table of Contents
|
||||
=================
|
||||
|
||||
I. Adding the meta-user layer to your build
|
||||
II. Misc
|
||||
|
||||
|
||||
I. Adding the meta-user layer to your build
|
||||
=================================================
|
||||
|
||||
--- replace with specific instructions for the meta-user layer ---
|
||||
|
||||
In order to use this layer, you need to make the build system aware of
|
||||
it.
|
||||
|
||||
Assuming the meta-user layer exists at the top-level of your
|
||||
yocto build tree, you can add it to the build system by adding the
|
||||
location of the meta-user layer to bblayers.conf, along with any
|
||||
other layers needed. e.g.:
|
||||
|
||||
BBLAYERS ?= " \
|
||||
/path/to/yocto/meta \
|
||||
/path/to/yocto/meta-poky \
|
||||
/path/to/yocto/meta-yocto-bsp \
|
||||
/path/to/yocto/meta-meta-user \
|
||||
"
|
||||
|
||||
|
||||
II. Misc
|
||||
========
|
||||
|
||||
--- replace with specific information about the meta-user layer ---
|
||||
16
project-spec/meta-user/conf/layer.conf
Normal file
16
project-spec/meta-user/conf/layer.conf
Normal file
@ -0,0 +1,16 @@
|
||||
# We have a conf and classes directory, add to BBPATH
|
||||
BBPATH .= ":${LAYERDIR}"
|
||||
|
||||
# We have recipes-* directories, add to BBFILES
|
||||
BBFILES += "${LAYERDIR}/recipes-*/*/*.bb \
|
||||
${LAYERDIR}/recipes-*/*/*.bbappend"
|
||||
|
||||
# Define dynamic layers
|
||||
BBFILES_DYNAMIC += " \
|
||||
xilinx-tools:${LAYERDIR}/meta-xilinx-tools/recipes-*/*/*.bbappend \
|
||||
"
|
||||
|
||||
BBFILE_COLLECTIONS += "meta-user"
|
||||
BBFILE_PATTERN_meta-user = "^${LAYERDIR}/"
|
||||
BBFILE_PRIORITY_meta-user = "7"
|
||||
LAYERSERIES_COMPAT_meta-user = "honister"
|
||||
4
project-spec/meta-user/conf/petalinuxbsp.conf
Normal file
4
project-spec/meta-user/conf/petalinuxbsp.conf
Normal file
@ -0,0 +1,4 @@
|
||||
#User Configuration
|
||||
|
||||
#OE_TERMINAL = "tmux"
|
||||
|
||||
5
project-spec/meta-user/conf/user-rootfsconfig
Normal file
5
project-spec/meta-user/conf/user-rootfsconfig
Normal file
@ -0,0 +1,5 @@
|
||||
#Note: Mention Each package in individual line
|
||||
#These packages will get added into rootfs menu entry
|
||||
|
||||
CONFIG_gpio-demo
|
||||
CONFIG_peekpoke
|
||||
@ -0,0 +1,3 @@
|
||||
/include/ "system-conf.dtsi"
|
||||
/ {
|
||||
};
|
||||
@ -0,0 +1,16 @@
|
||||
FILESEXTRAPATHS:prepend := "${THISDIR}/files:${SYSCONFIG_PATH}:"
|
||||
|
||||
SRC_URI:append = " file://config file://system-user.dtsi"
|
||||
|
||||
python () {
|
||||
if d.getVar("CONFIG_DISABLE"):
|
||||
d.setVarFlag("do_configure", "noexec", "1")
|
||||
}
|
||||
export PETALINUX
|
||||
do_configure:append () {
|
||||
script="${PETALINUX}/etc/hsm/scripts/petalinux_hsm_bridge.tcl"
|
||||
data=${PETALINUX}/etc/hsm/data/
|
||||
eval xsct -sdx -nodisp ${script} -c ${WORKDIR}/config \
|
||||
-hdf ${DT_FILES_PATH}/hardware_description.${HDF_EXT} -repo ${S} \
|
||||
-data ${data} -sw ${DT_FILES_PATH} -o ${DT_FILES_PATH} -a "soc_mapping"
|
||||
}
|
||||
@ -0,0 +1,28 @@
|
||||
FILESEXTRAPATHS:prepend := "${THISDIR}/files:${SYSCONFIG_PATH}:"
|
||||
|
||||
SRC_URI:append = " file://config file://system-user.dtsi"
|
||||
DEPENDS:append = "${@' lopper-native' if d.getVar('SYSTEM_DTFILE') != '' else ''}"
|
||||
|
||||
# We need the deployed output
|
||||
PROC_TUNE:versal = "${@'cortexa72' if d.getVar('SYSTEM_DTFILE') != '' else ''}"
|
||||
PROC_TUNE:zynqmp = "${@'cortexa53' if d.getVar('SYSTEM_DTFILE') != '' else ''}"
|
||||
|
||||
python () {
|
||||
if d.getVar("CONFIG_DISABLE"):
|
||||
d.setVarFlag("do_configure", "noexec", "1")
|
||||
}
|
||||
|
||||
export PETALINUX
|
||||
do_configure:append () {
|
||||
if [ ! -z "${SYSTEM_DTFILE}" ]; then
|
||||
user_dtsi="${TOPDIR}/../project-spec/decoupling-dtsi/system-user.dtsi"
|
||||
apu_dts="${TOPDIR}/../project-spec/decoupling-dtsi/${PROC_TUNE}-${SOC_FAMILY}-linux.dts"
|
||||
lopper -f -v --enhanced --permissive -i ${user_dtsi} ${apu_dts} system-default.dtb
|
||||
else
|
||||
script="${PETALINUX}/etc/hsm/scripts/petalinux_hsm_bridge.tcl"
|
||||
data=${PETALINUX}/etc/hsm/data/
|
||||
eval xsct -sdx -nodisp ${script} -c ${WORKDIR}/config \
|
||||
-hdf ${DT_FILES_PATH}/hardware_description.${HDF_EXT} -repo ${S} \
|
||||
-data ${data} -sw ${DT_FILES_PATH} -o ${DT_FILES_PATH} -a "soc_mapping"
|
||||
fi
|
||||
}
|
||||
@ -0,0 +1,4 @@
|
||||
/*Add pl custom nodes for pl.dtsi which is generated from base xsa file.
|
||||
Changes in this file reflects only when enabled the FPGA manager/Device tree overlay.*/
|
||||
/ {
|
||||
};
|
||||
@ -0,0 +1,93 @@
|
||||
/include/ "system-conf.dtsi"
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
/ {
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
gpio-led1 {
|
||||
label = "led1";
|
||||
gpios = <&gpio0 54 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
gpio-led2 {
|
||||
label = "pl_led0";
|
||||
gpios = <&gpio0 55 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
gpio-led3 {
|
||||
label = "pl_led1";
|
||||
gpios = <&gpio0 56 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
gpio-led4 {
|
||||
label = "ps_led0";
|
||||
gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
gpio-led5 {
|
||||
label = "ps_led1";
|
||||
gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
gpio-led6 {
|
||||
label = "led2";
|
||||
gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
keys {
|
||||
compatible = "gpio-keys";
|
||||
autorepeat;
|
||||
gpio-key1 {
|
||||
label = "pl_key1";
|
||||
gpios = <&gpio0 57 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <105>; // Right
|
||||
debounce-interval = <20>; // 20ms
|
||||
};
|
||||
gpio-key2 {
|
||||
label = "pl_key2";
|
||||
gpios = <&gpio0 58 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <106>; // Left
|
||||
debounce-interval = <20>;
|
||||
};
|
||||
gpio-key3 {
|
||||
label = "ps_key1";
|
||||
gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <103>; // Up
|
||||
debounce-interval = <20>;
|
||||
};
|
||||
gpio-key4 {
|
||||
label = "ps_key2";
|
||||
gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <108>; // Down
|
||||
debounce-interval = <20>;
|
||||
};
|
||||
touch-key {
|
||||
label = "touch_key";
|
||||
gpios = <&gpio0 59 GPIO_ACTIVE_HIGH>;
|
||||
linux,code = <28>; // ENTER
|
||||
gpio-key,wakeup;
|
||||
debounce-interval = <20>;
|
||||
};
|
||||
};
|
||||
|
||||
beeper {
|
||||
compatible = "gpio-beeper";
|
||||
gpios = <&gpio0 60 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
clock-frequency = <100000>;
|
||||
eeprom@50 {
|
||||
compatible = "24c64";
|
||||
reg = <0x50>;
|
||||
pagesize = <32>;
|
||||
};
|
||||
rtc@51 {
|
||||
compatible = "nxp,pcf8563";
|
||||
reg = <0x51>;
|
||||
};
|
||||
};
|
||||
|
||||
2
project-spec/meta-user/recipes-bsp/u-boot/files/bsp.cfg
Normal file
2
project-spec/meta-user/recipes-bsp/u-boot/files/bsp.cfg
Normal file
@ -0,0 +1,2 @@
|
||||
CONFIG_SYS_CONFIG_NAME="platform-top"
|
||||
CONFIG_BOOT_SCRIPT_OFFSET=0x9C0000
|
||||
@ -0,0 +1 @@
|
||||
#include <configs/zynq-common.h>
|
||||
@ -0,0 +1,15 @@
|
||||
FILESEXTRAPATHS:prepend := "${THISDIR}/files:"
|
||||
|
||||
SRC_URI:append = " file://platform-top.h file://bsp.cfg"
|
||||
|
||||
do_configure:append () {
|
||||
install ${WORKDIR}/platform-top.h ${S}/include/configs/
|
||||
}
|
||||
|
||||
do_configure:append:microblaze () {
|
||||
if [ "${U_BOOT_AUTO_CONFIG}" = "1" ]; then
|
||||
install ${WORKDIR}/platform-auto.h ${S}/include/configs/
|
||||
install -d ${B}/source/board/xilinx/microblaze-generic/
|
||||
install ${WORKDIR}/config.mk ${B}/source/board/xilinx/microblaze-generic/
|
||||
fi
|
||||
}
|
||||
@ -0,0 +1,16 @@
|
||||
CONFIG_LOCALVERSION="-phosphor-7020"
|
||||
CONFIG_DEFAULT_HOSTNAME="zynq"
|
||||
# CONFIG_SENSORS_PWM_FAN is not set
|
||||
# CONFIG_REGULATOR_PWM is not set
|
||||
# CONFIG_LEDS_PWM is not set
|
||||
# CONFIG_COMMON_CLK_PWM is not set
|
||||
CONFIG_COMMON_CLK_XLNX_CLKWZRD=y
|
||||
CONFIG_PWM=y
|
||||
CONFIG_PWM_SYSFS=y
|
||||
# CONFIG_PWM_DEBUG is not set
|
||||
# CONFIG_PWM_ATMEL_TCB is not set
|
||||
# CONFIG_PWM_DWC is not set
|
||||
# CONFIG_PWM_FSL_FTM is not set
|
||||
# CONFIG_PWM_PCA9685 is not set
|
||||
# CONFIG_PWM_CADENCE is not set
|
||||
CONFIG_PWM_XILINX=y
|
||||
@ -0,0 +1,6 @@
|
||||
FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:"
|
||||
|
||||
SRC_URI:append = " file://bsp.cfg"
|
||||
KERNEL_FEATURES:append = " bsp.cfg"
|
||||
SRC_URI += "file://user_2023-02-14-13-57-00.cfg"
|
||||
|
||||
Loading…
Reference in New Issue
Block a user