update CpU and TLB
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@ -9,10 +9,14 @@ module decoder2 (
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output logic [1:0] ce
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output logic [1:0] ce
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);
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);
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`ifdef ENABLE_CpU
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logic [3:0] CU2;
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logic [3:0] CU2;
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assign CU2 = {CU[3:1], CU[0] | kernel};
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assign CU2 = {CU[3:1], CU[0] | kernel};
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`endif
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always_comb begin
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always_comb begin
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ri = 1'b1;
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ri = 1'b1;
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`ifdef ENABLE_CpU
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ce = instr[27:26];
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ce = instr[27:26];
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cpu = ce != 2'b11
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cpu = ce != 2'b11
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& ~CU2[ce] & ( instr[31:28] == 4'b0100 // COPx
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& ~CU2[ce] & ( instr[31:28] == 4'b0100 // COPx
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@ -21,6 +25,10 @@ module decoder2 (
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| instr[31:28] == 4'b1110 // SWCx
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| instr[31:28] == 4'b1110 // SWCx
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| instr[31:28] == 4'b1111 // SDCx
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| instr[31:28] == 4'b1111 // SDCx
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); // TODO: Cache instruction
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); // TODO: Cache instruction
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`else
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ce = 2'b0;
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cpu = 1'b0;
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`endif
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casez (instr)
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casez (instr)
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32'b00000000000???????????????000000: ri = 1'b0; // SLL
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32'b00000000000???????????????000000: ri = 1'b0; // SLL
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32'b00000000000???????????????000010: ri = 1'b0; // SRL
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32'b00000000000???????????????000010: ri = 1'b0; // SRL
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@ -89,10 +97,12 @@ module decoder2 (
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32'b00111100000?????????????????????: ri = 1'b0; // LUI
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32'b00111100000?????????????????????: ri = 1'b0; // LUI
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32'b01000000000??????????00000000???: ri = 1'b0; // MFC0
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32'b01000000000??????????00000000???: ri = 1'b0; // MFC0
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32'b01000000100??????????00000000???: ri = 1'b0; // MTC0
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32'b01000000100??????????00000000???: ri = 1'b0; // MTC0
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`ifdef ENABLE_TLB
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32'b01000010000000000000000000000001: ri = 1'b0; // TLBR
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32'b01000010000000000000000000000001: ri = 1'b0; // TLBR
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32'b01000010000000000000000000000010: ri = 1'b0; // TLBWI
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32'b01000010000000000000000000000010: ri = 1'b0; // TLBWI
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32'b01000010000000000000000000000110: ri = 1'b0; // TLBWR
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32'b01000010000000000000000000000110: ri = 1'b0; // TLBWR
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32'b01000010000000000000000000001000: ri = 1'b0; // TLBP
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32'b01000010000000000000000000001000: ri = 1'b0; // TLBP
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`endif
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32'b01000010000000000000000000011000: ri = 1'b0; // ERET
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32'b01000010000000000000000000011000: ri = 1'b0; // ERET
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`ifdef ENABLE_MADD
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`ifdef ENABLE_MADD
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32'b011100??????????0000000000000000: ri = 1'b0; // MADD
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32'b011100??????????0000000000000000: ri = 1'b0; // MADD
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