354 lines
9.2 KiB
C
354 lines
9.2 KiB
C
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#include "phy_8720.h"
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#define CHECK_PARAM(expr) ((void)0)
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struct bflb_device_s *emac_dev = NULL;
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static struct bflb_emac_phy_cfg_s *phy_8720_cfg = NULL;
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/**
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* @brief phy 8720 reset
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* @return int
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*
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*/
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int phy_8720_reset(void)
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{
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int timeout = 1000;
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uint16_t regval = PHY_RESET;
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/* pull the PHY from power down mode if it is in */
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if (0 != bflb_emac_phy_reg_read(emac_dev, PHY_SPECIAL_MODES, ®val)) {
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printf("emac phy reg read fail 0x%04x\r\n", regval);
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return -1;
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}
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printf("emac phy reg read 0x%04x\r\n", regval);
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if (PHY_SPECIAL_MODES_MODE_PWRDOWN == (regval & PHY_SPECIAL_MODES_MODE)) {
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if (bflb_emac_phy_reg_write(emac_dev, PHY_SPECIAL_MODES, regval | PHY_SPECIAL_MODES_MODE_ALL) != 0) {
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return -1;
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}
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}
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/* disable energy detect powerdown mode for cable detect, this increase the power by 220mW */
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if (0 != bflb_emac_phy_reg_read(emac_dev, PHY_CTRL_STATUS, ®val)) {
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return -1;
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}
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if (bflb_emac_phy_reg_write(emac_dev, PHY_CTRL_STATUS, regval & (~PHY_CTRL_STATUS_EDPWRDOWN)) != 0) {
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return -1;
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}
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/* do sw reset */
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if (bflb_emac_phy_reg_write(emac_dev, PHY_BCR, PHY_RESET) != 0) {
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return -1;
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}
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for (; timeout; timeout--) {
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if (0 != bflb_emac_phy_reg_read(emac_dev, PHY_BCR, ®val)) {
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return -1;
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}
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if (!(regval & PHY_RESET)) {
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return 0;
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}
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bflb_mtimer_delay_ms(1);
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}
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return -1;
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}
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/**
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* @brief phy 8720 auto negotiate
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* @param cfg phy config
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* @return int
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*
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*/
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int phy_8720_auto_negotiate(struct bflb_emac_phy_cfg_s *cfg)
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{
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uint16_t regval = 0;
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uint16_t phyid1 = 0, phyid2 = 0;
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uint16_t advertise = 0;
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uint16_t lpa = 0;
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uint32_t timeout = 100; //10s,in 100ms
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if (0 != bflb_emac_phy_reg_read(emac_dev, PHY_PHYID1, &phyid1)) {
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printf("read emac phy id 1 error\r\n");
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return -1;
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}
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if (0 != bflb_emac_phy_reg_read(emac_dev, PHY_PHYID2, &phyid2)) {
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printf("read emac phy id 2 error\r\n");
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return -1;
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}
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printf("emac phy id 1 =%08x\r\n", (unsigned int)phyid1);
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printf("emac phy id 2 =%08x\r\n", (unsigned int)phyid2);
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if (cfg->phy_id != (((phyid1 << 16) | phyid2) & 0x000FFFF0)) {
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/* ID error */
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return -1;
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} else {
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cfg->phy_id = (phyid1 << 16) | phyid2;
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}
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if (0 != bflb_emac_phy_reg_read(emac_dev, PHY_BCR, ®val)) {
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return -1;
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}
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regval &= ~PHY_AUTONEGOTIATION;
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regval &= ~(PHY_LOOPBACK | PHY_POWERDOWN);
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regval |= PHY_ISOLATE;
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if (bflb_emac_phy_reg_write(emac_dev, PHY_BCR, regval) != 0) {
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return -1;
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}
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/* set advertisement mode */
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advertise = PHY_ADVERTISE_100BASETXFULL | PHY_ADVERTISE_100BASETXHALF |
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PHY_ADVERTISE_10BASETXFULL | PHY_ADVERTISE_10BASETXHALF |
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PHY_ADVERTISE_8023;
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if (bflb_emac_phy_reg_write(emac_dev, PHY_ADVERTISE, advertise) != 0) {
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return -1;
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}
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bflb_mtimer_delay_ms(16);
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if (0 != bflb_emac_phy_reg_read(emac_dev, PHY_BCR, ®val)) {
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return -1;
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}
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bflb_mtimer_delay_ms(16);
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regval |= (PHY_FULLDUPLEX_100M | PHY_AUTONEGOTIATION);
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if (bflb_emac_phy_reg_write(emac_dev, PHY_BCR, regval) != 0) {
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return -1;
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}
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bflb_mtimer_delay_ms(16);
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regval |= PHY_RESTART_AUTONEGOTIATION;
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regval &= ~PHY_ISOLATE;
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if (bflb_emac_phy_reg_write(emac_dev, PHY_BCR, regval) != 0) {
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return -1;
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}
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bflb_mtimer_delay_ms(100);
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while (1) {
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if (0 != bflb_emac_phy_reg_read(emac_dev, PHY_BSR, ®val)) {
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return -1;
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}
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if (regval & PHY_AUTONEGO_COMPLETE) {
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/* complete */
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break;
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}
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if (!(--timeout)) {
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return -1;
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}
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bflb_mtimer_delay_ms(100);
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}
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bflb_mtimer_delay_ms(100);
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if (0 != bflb_emac_phy_reg_read(emac_dev, PHY_LPA, &lpa)) {
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return -1;
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}
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if (((advertise & lpa) & PHY_ADVERTISE_100BASETXFULL) != 0) {
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/* 100BaseTX and Full Duplex */
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cfg->full_duplex = 1;
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cfg->speed = 100;
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cfg->phy_state = PHY_STATE_READY;
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} else if (((advertise & lpa) & PHY_ADVERTISE_10BASETXFULL) != 0) {
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/* 10BaseT and Full Duplex */
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cfg->full_duplex = 1;
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cfg->speed = 10;
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cfg->phy_state = PHY_STATE_READY;
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} else if (((advertise & lpa) & PHY_ADVERTISE_100BASETXHALF) != 0) {
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/* 100BaseTX and half Duplex */
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cfg->full_duplex = 0;
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cfg->speed = 100;
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cfg->phy_state = PHY_STATE_READY;
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} else if (((advertise & lpa) & PHY_ADVERTISE_10BASETXHALF) != 0) {
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/* 10BaseT and half Duplex */
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cfg->full_duplex = 0;
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cfg->speed = 10;
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cfg->phy_state = PHY_STATE_READY;
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}
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return 0;
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}
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/**
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* @brief phy 8720 link up
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* @param cfg phy config
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* @return int
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*
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*/
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int phy_8720_link_up(struct bflb_emac_phy_cfg_s *cfg)
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{
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uint16_t phy_bsr = 0;
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uint16_t phy_sr = 0;
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bflb_mtimer_delay_ms(16);
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if (0 != bflb_emac_phy_reg_read(emac_dev, PHY_BSR, &phy_bsr)) {
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return -1;
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}
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bflb_mtimer_delay_ms(16);
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if (!(PHY_LINKED_STATUS & phy_bsr)) {
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return 1; /* error */
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}
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bflb_mtimer_delay_ms(16);
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if (0 != bflb_emac_phy_reg_read(emac_dev, PHY_SR, &phy_sr)) {
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return -1;
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}
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if ((phy_bsr & PHY_BSR_100BASETXFULL) && PHY_SR_SPEED_MODE_COMPARE(phy_sr, PHY_SR_SPEED_100BASETXFULL)) {
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/* 100BaseTX and Full Duplex */
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cfg->full_duplex = 1;
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cfg->speed = 100;
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cfg->phy_state = PHY_STATE_UP;
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} else if ((phy_bsr & PHY_BSR_10BASETXFULL) && PHY_SR_SPEED_MODE_COMPARE(phy_sr, PHY_SR_SPEED_10BASETXFULL)) {
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/* 10BaseT and Full Duplex */
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cfg->full_duplex = 1;
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cfg->speed = 10;
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cfg->phy_state = PHY_STATE_UP;
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} else if ((phy_bsr & PHY_BSR_100BASETXHALF) && PHY_SR_SPEED_MODE_COMPARE(phy_sr, PHY_SR_SPEED_100BASETXHALF)) {
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/* 100BaseTX and half Duplex */
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cfg->full_duplex = 0;
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cfg->speed = 100;
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cfg->phy_state = PHY_STATE_UP;
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} else if ((phy_bsr & PHY_BSR_10BASETXHALF) && PHY_SR_SPEED_MODE_COMPARE(phy_sr, PHY_SR_SPEED_10BASETXHALF)) {
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/* 10BaseT and half Duplex */
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cfg->full_duplex = 0;
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cfg->speed = 10;
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cfg->phy_state = PHY_STATE_UP;
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} else {
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/* 10BaseT and half Duplex */
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cfg->full_duplex = -1;
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cfg->speed = -1;
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cfg->phy_state = PHY_STATE_DOWN;
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return -1;
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}
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return 0;
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}
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/**
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* @brief Use energy detector for cable plug in/out detect.
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* @param cfg: phy config
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* @return int
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*
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*/
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int phy_8720_poll_cable_status(struct bflb_emac_phy_cfg_s *cfg)
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{
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uint16_t phy_regval = 0;
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CHECK_PARAM(NULL != phy_8720_cfg);
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if (0 != bflb_emac_phy_reg_read(emac_dev, PHY_CTRL_STATUS, &phy_regval)) {
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return -1;
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}
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phy_8720_cfg->phy_state = (PHY_CTRL_STATUS_ENERGYON & phy_regval) ? PHY_STATE_UP : PHY_STATE_DOWN;
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return !!(PHY_CTRL_STATUS_ENERGYON & phy_regval);
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}
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/**
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* @brief Initialize EMAC PHY 8720 module
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* @param cfg: phy config
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* @return int
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*
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*/
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int phy_8720_init(struct bflb_device_s *emac, struct bflb_emac_phy_cfg_s *cfg)
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{
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uint16_t phyReg;
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CHECK_PARAM(NULL != cfg);
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phy_8720_cfg = cfg;
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emac_dev = emac;
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printf("emac phy addr:0x%04x\r\n", cfg->phy_address);
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// bflb_emac_phy_set_address(emac_dev, cfg->phy_address);
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bflb_emac_feature_control(emac, EMAC_CMD_SET_PHY_ADDRESS, cfg->phy_address);
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if (0 != phy_8720_reset()) {
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return -1;
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}
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if (cfg->auto_negotiation) {
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/*
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uint32_t cnt=0;
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do{
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if(bflb_emac_phy_reg_read(emac_dev, PHY_BSR, &phyReg) != SUCCESS){
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return -1;
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}
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cnt++;
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if(cnt>PHY_LINK_TO){
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return -1;
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}
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}while((phyReg & PHY_LINKED_STATUS) != PHY_LINKED_STATUS);
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*/
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if (0 != phy_8720_auto_negotiate(cfg)) {
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return -1;
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}
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} else {
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if (bflb_emac_phy_reg_read(emac_dev, PHY_BCR, &phyReg) != 0) {
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return -1;
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}
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phyReg &= (~PHY_FULLDUPLEX_100M);
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if (cfg->speed == 10) {
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if (cfg->full_duplex == 1) {
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phyReg |= PHY_FULLDUPLEX_10M;
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} else {
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phyReg |= PHY_HALFDUPLEX_10M;
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}
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} else {
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if (cfg->full_duplex == 1) {
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phyReg |= PHY_FULLDUPLEX_100M;
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} else {
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phyReg |= PHY_HALFDUPLEX_100M;
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}
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}
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if ((bflb_emac_phy_reg_write(emac_dev, PHY_BCR, phyReg)) != 0) {
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return -1;
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}
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}
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// bflb_emac_phy_config_full_duplex(emac_dev, cfg->full_duplex);
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bflb_emac_feature_control(emac, EMAC_CMD_FULL_DUPLEX, cfg->full_duplex);
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return phy_8720_link_up(cfg);
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}
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/**
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* @brief get phy 8720 module status
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* @return emac_phy_status_t @ref emac_phy_status_t enum
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*/
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emac_phy_status_t phy_8720_status_get(void)
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{
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CHECK_PARAM(NULL != phy_8720_cfg);
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if ((100 == phy_8720_cfg->speed) &&
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(phy_8720_cfg->full_duplex) &&
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(PHY_STATE_UP == phy_8720_cfg->phy_state)) {
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return EMAC_PHY_STAT_100MBITS_FULLDUPLEX;
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} else if (PHY_STATE_UP == phy_8720_cfg->phy_state) {
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return EMAC_PHY_STAT_LINK_UP;
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} else {
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return EMAC_PHY_STAT_LINK_DOWN;
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}
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}
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