jzlv
e63cf769fb
[fix][clock] fix mtimer clock div get,fix peripheral clock source and div get,make standard for div with (div+1)
2021-09-28 11:31:22 +08:00
jzlv
3c464a6c37
[fix][examples/pwm] fix pwm div description
2021-09-28 11:31:02 +08:00
jzlv
66ec110725
[refactor][bl702_driver] refactor std and hal common include file, drop some flash api
2021-09-26 13:53:05 +08:00
jzlv
26c22a0e30
[refactor][bl602_driver] refactor std and hal common include file, drop some flash api, add boot2 and sec eng driver
2021-09-26 13:50:46 +08:00
jzlv
867ad6ef05
[feat][bl702_driver] update bl702 driver
2021-08-26 12:26:40 +08:00
jzlv
7105b56150
[feat][bl602_driver] update bl602 driver
2021-08-26 12:26:39 +08:00
jzlv
2d438d8ce0
[feat][wakeup] add gpio wakeup config process
2021-08-07 18:49:49 +08:00
jzlv
92063f0092
[fix][flash] flash auto identify if mid != 0xff
2021-08-05 20:47:27 +08:00
jzlv
1c26e68beb
[refactor] rename NVIC as CPU_Interrupt
2021-08-05 20:43:13 +08:00
qqwang
402092ad49
[feat][examples/boot2_iap] update boot2 iap case
2021-08-05 19:33:29 +08:00
qqwang
0ca17e290f
[feat][pm] add hal power manage driver
2021-08-05 18:24:48 +08:00
qqwang
40b7b2752a
[feat][rtc] add hal rtc driver
2021-08-05 18:11:29 +08:00
qqwang
432b7b469c
[fix][hbn] fix rtc int func name
2021-08-05 18:10:07 +08:00
qqwang
42dab3efea
[fix][i2s] fix i2s fifo config
2021-08-05 18:06:27 +08:00
qqwang
c05ee5a9c8
[feat][power] update hal power and add lowpower level setting
2021-08-05 18:05:24 +08:00
qqwang
7accc39ec6
[feat][pds] add pds gpio_9 wakeup function back
2021-08-05 18:02:55 +08:00
qqwang
d3a4c33b16
[fix][interrupt] fix interrupt vector
2021-08-05 18:00:33 +08:00
qqwang
b95b3c02dd
[feat][gpio] add gpio wakeup fun and delete unused gpio pin
2021-08-05 17:58:06 +08:00
qqwang
93c8f3dd23
[feat][l1c] update flush cache external api
2021-08-05 17:56:16 +08:00
qqwang
34a81fbe16
[feat][uart] add uart de-glitch value setting
2021-08-05 17:52:45 +08:00
qqwang
41def8e82e
[feat][emac] update hal emac phy config
2021-08-05 17:49:04 +08:00
qqwang
078afbd359
[feat][clock] update hal clock
2021-08-05 17:46:42 +08:00
qqwang
5880cebc7f
[feat][flash] update flash driver
2021-08-05 17:42:37 +08:00
qqwang
07924c6222
[refactor][boot2_iap] refactor bl702 hal boot2 iap
2021-08-05 17:37:53 +08:00
qqwang
d32c3358a5
[chore] fix boot2 iap linkscript
2021-08-05 17:32:19 +08:00
qqwang
c0518d0e3e
[chore] fix bl702 ram linkscript
2021-08-05 17:28:59 +08:00
jzlv
1b1acc8510
[fix][clock] fix get system clock function,make fclk become system clock instead of root clock
2021-07-30 19:56:16 +08:00
jzlv
ff131e47a3
[refactor][boot2_iap] add bl702 hal wrapper and cmake flag for boot2
2021-07-26 15:31:46 +08:00
jzlv
1d485a83af
[refactor][flash] delete unused include
2021-07-26 15:07:50 +08:00
jzlv
69f237b25e
[feat][spi] update spi standard write and read poll function
2021-07-26 14:35:21 +08:00
jzlv
75fe79b184
[feat][qdec] add qdec hal driver and demo
2021-07-26 14:19:39 +08:00
jzlv
cbedd52d06
[fix] fix some code bugs
2021-07-26 14:19:39 +08:00
jzlv
291ab32674
[feat][glb] add qdec led gpio_fun type
2021-07-26 14:19:39 +08:00
jzlv
56dca947fe
[feat][adc] add adc irq function
2021-07-26 10:58:25 +08:00
jzlv
cc7e3b5d84
[refactor][usb] refactor usb irq process,add rdy free judging,let usb_dc_ep_write and usb_dc_ep_read become asynchronous
2021-07-26 10:58:25 +08:00
jzlv
d75762358d
[refactor] because of using -DBFLB_USE_HAL_DRIVER,so irq register can be removed
2021-07-26 10:58:24 +08:00
jzlv
1c70b10c6b
[feat][global_irq] add nesting for global irq enable and disable
2021-07-26 10:58:24 +08:00
jzlv
5a869fedd9
[feat][timer] add timer clock config ,refactor hal timer code
2021-07-26 10:56:51 +08:00
jzlv
3f8f00e4df
[fix][examples/adc/boot/i2s] delete unused flag noun in xxx_register
2021-07-17 11:16:33 +08:00
jzlv
5b9495137c
[fix][timer] fix timing that cause inaccurate
2021-07-16 16:19:52 +08:00
jzlv
673ba04e8e
[feat][system] add internal and external flash selection when mcu run
2021-07-16 16:18:53 +08:00
jzlv
147df677b1
[feat][sf] add 2 line flash program support
2021-07-16 16:09:37 +08:00
jzlv
21e2591a25
[refactor][make] enable cpu float default
2021-07-16 16:07:12 +08:00
jzlv
50d130075c
[refactor] delete unused flag noun in device_register
2021-07-16 16:01:55 +08:00
jzlv
8dca249d77
[refactor][board] refactor board directory structure
2021-07-15 10:15:17 +08:00
jzlv
411776be3f
[fix][keyscan] fix keyscan default clk setting and array index warning
2021-07-13 13:57:59 +08:00
jzlv
e5f1ef82c8
[feat][keyscan] add keyscan demo and hal driver
2021-07-12 17:28:53 +08:00
jzlv
3c53f41c13
[fix][timer][flash] add more status judge
2021-07-12 17:28:52 +08:00
jzlv
c5392e44c6
[feat][keyscan] add keyscan gpio func definition and clock config
2021-07-12 17:28:52 +08:00
jzlv
006e4bface
[fix][uart][spi] fix uart and spi device oflag in device control dma
2021-07-12 17:28:52 +08:00
jzlv
98043ff151
[fix][adc] fix adc device channel table for ch6 and ch7
2021-07-12 17:28:52 +08:00
jzlv
2c6382a4e1
[fix][pwm] fix pwm device control definition
2021-07-12 17:28:52 +08:00
jzlv
16517b9f55
[feat][gpio] add gpio hz mode
2021-07-12 17:28:52 +08:00
jzlv
91f7d9bc9f
[fix][flash] rename flash api
2021-07-12 17:28:52 +08:00
pfchen
9a12d1a663
[fix][flash]fix flash demo with new flash erase read write API
2021-07-06 19:09:33 +08:00
jzlv
13b4ba91f9
[feat][bl702_driver] add some api and delete unused api
2021-07-06 16:18:00 +08:00
Jean-François Milants
8990e8c97f
Add missing declarations (Efuse_Ldo11VoutSelTrim_Info_Type and Efuse_TxPower_Info_Type) in bl602_ef_ctrl.h to build with -DCHIP=bl602. These declarations come from https://github.com/bouffalolab/bl_iot_sdk/blob/master/components/bl602/bl602_std/bl602_std/StdDriver/Inc/bl602_ef_ctrl.h .
2021-07-05 16:49:39 +08:00
jzlv
21e87ac8ca
[fix][ld] fix ocram memory size
2021-07-01 19:32:12 +08:00
jzlv
5a811531e9
[fix][drivers] fix hal driver and entry.s bug when main return
2021-07-01 14:20:25 +08:00
qqwang
cec78e1093
[feat][sec] add sec trng driver
2021-06-25 17:39:08 +08:00
qqwang
257890072b
[fix][emac] fix emac init return type
2021-06-25 17:38:08 +08:00
qqwang
20ac794338
[fix][adc] fix adc read channel value at first
2021-06-25 17:37:14 +08:00
jzlv
c9924b3fd7
[style] delete trailing whitespace
2021-06-21 14:47:48 +08:00
pfchen
67a94065c0
[feat]chaneg mtvt into CSR_MTVT to make old compiler build pass
2021-06-20 15:11:23 +08:00
Robert Lipe
c39ba09f3d
Fix build errors in entry.S. allows helloworld to compile and link.
...
1) __riscv_float_abi_single is not in the provided preprocessor namespace.
The default build sets -Werror and has -Warn implicitly. Testing something
that's not defined with an #if is therefore an error.
This is possibly a behavior change. If your builds ever define that AND
set it to 0, this way will fail, but #if defined (foo) + #if foo is akward
and probably not what you intended.
2) "csrw mtvt, t0" is not legal in at least
GNU assembler (GNU Binutils) 2.35
Fortunately, riscv_encoding.h #defines a perfectly lovely value of
$0x307 that's appropriate for the chips AND is compatible with more assemblers.
This appears to be an extension in
GNU assembler (SiFive Binutils 2.32.0-2019.08.0) 2.32
(present in bl_io_sdk, as provided by SiFive)
and that's probably what's in your $PATH, but not relying on vendor
extension in this case is dead easy.
Two distinct problems. No, I'm not making different pull requests.
...this is a lot of words for a two line change. :-)
2021-06-20 13:43:14 +08:00
jzlv
5b18a07200
[fix] fix __riscv_float_abi_single warning
2021-06-20 12:34:58 +08:00
jzlv
d427e7fdda
[style] format files by clang-format
2021-06-20 12:25:46 +08:00
jzlv
bc120c8861
[feat] add bl602 driver and board
2021-06-04 18:15:21 +08:00
jzlv
c2f3072455
[fix] fix hal driver
2021-06-04 18:15:19 +08:00
qqwang
658b0761db
[fix][drivers/bl702_driver] fix hal adc
2021-04-30 10:57:58 +08:00
jzlv
72ccc03bf9
[feat] add XXX_DEV definition
2021-04-27 12:34:29 +08:00
jzlv
a2fca7a36d
first commit
2021-04-13 19:27:30 +08:00
