CloudEdge/bl_mcu_sdk
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[update][board] update peripheral config

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This commit is contained in:
jzlv 2022-02-23 17:05:16 +08:00
parent ffdd9d7053
commit 6b11ba03ef
2 changed files with 7 additions and 7 deletions
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12
bsp/board/bl702/bl706_avb/peripheral_config.h
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@ -94,7 +94,7 @@
.databits = UART_DATA_LEN_8, \
.stopbits = UART_STOP_ONE, \
.parity = UART_PAR_NONE, \
.fifo_threshold = 1, \
.fifo_threshold = 0, \
}
#endif
#endif
@ -108,7 +108,7 @@
.databits = UART_DATA_LEN_8, \
.stopbits = UART_STOP_ONE, \
.parity = UART_PAR_NONE, \
.fifo_threshold = 64, \
.fifo_threshold = 63, \
}
#endif
#endif
@ -124,7 +124,7 @@
.clk_polaraity = SPI_POLARITY_LOW, \
.clk_phase = SPI_PHASE_1EDGE, \
.datasize = SPI_DATASIZE_8BIT, \
.fifo_threshold = 4, \
.fifo_threshold = 3, \
.pin_swap_enable = 1, \
.delitch_cnt = 0, \
}
@ -212,7 +212,7 @@
.channel_num = I2S_FS_CHANNELS_NUM_MONO, \
.frame_size = I2S_FRAME_LEN_16, \
.data_size = I2S_DATA_LEN_16, \
.fifo_threshold = 8, \
.fifo_threshold = 7, \
}
#endif
#endif
@ -249,8 +249,8 @@
.dst_req = DMA_REQUEST_NONE, \
.src_addr_inc = DMA_ADDR_INCREMENT_ENABLE, \
.dst_addr_inc = DMA_ADDR_INCREMENT_ENABLE, \
.src_burst_size = DMA_BURST_1BYTE, \
.dst_burst_size = DMA_BURST_1BYTE, \
.src_burst_size = DMA_BURST_4BYTE, \
.dst_burst_size = DMA_BURST_4BYTE, \
.src_width = DMA_TRANSFER_WIDTH_16BIT, \
.dst_width = DMA_TRANSFER_WIDTH_16BIT, \
}

2
bsp/board/bl702/bl706_avb/pinmux_config.h
View File

@ -91,7 +91,7 @@
// <q> GPIO17 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_ADC//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_QDEC]
// <i> config gpio17 function
#define CONFIG_GPIO17_FUNC GPIO_FUN_UART1_TX
#define CONFIG_GPIO17_FUNC GPIO_FUN_UNUSED
// <q> GPIO18 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_ADC//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC]
// <i> config gpio18 function