Commit Graph

260 Commits

Author SHA1 Message Date
Richard Barry
e2750cd388 Case unused return values for memset and memcpy to void in stream_buffer.c to avoid compiler warnings when the warning level is turned up.
Remove duplicate comment in heap_1.c.
2018-08-29 15:43:41 +00:00
Richard Barry
3a1631fda3 Update copyright date ready for tagging V10.1.0. 2018-08-22 23:23:03 +00:00
Richard Barry
fb9de58f56 Update version numbers in preparation for a new release. 2018-08-21 19:50:48 +00:00
Richard Barry
722ca8fb2b Update demo project for Tensilita - work in progres..
Add support for POSIX style errno - work in progress.
2018-08-21 19:37:04 +00:00
Gaurav Aggarwal
56dc0dd9b4 Merge bug fixes from Cadence 2018-08-07 07:21:07 +00:00
Richard Barry
f6cbf20019 Update RISC-V project to used official port stubs in place of third party port. 2018-07-07 21:54:41 +00:00
Richard Barry
3bfc32d444 Add stubs for official RISC-V RV32 port. 2018-07-07 21:47:31 +00:00
Richard Barry
483f4a8c4b Small change to the directory name in which the RISC-V port is stored. 2018-06-20 21:15:04 +00:00
Richard Barry
3d8d2f3cc8 Add RISCV port layer. 2018-06-20 19:21:18 +00:00
Gaurav Aggarwal
c4b1afc4ef Add Xtensa port
The project file is for Xtensa Xplorer simulator.
Also add tests for one size stream buffer.
2018-06-14 19:43:17 +00:00
Richard Barry
4fbcdbf13b Fix misra violations in queue.c by introducing a union that allows the correct data types to be used in place of void *, then tidy up where the union is used. 2018-06-11 18:51:53 +00:00
Richard Barry
390fb06b49 First pass at updating from MISRA 2004 to MISRA 2012:
Updated pvContainer member of list items to List_t * rather than void * as they are always contained in a list if anywhere.
Made EventGroupHandle_t typesafe pointer to forward referenced struct rather than void pointer.
Made TaskHandle_t typesafe pointer to forward referenced struct, rather than a void pointer.
2018-06-03 22:57:46 +00:00
Richard Barry
5bebf10fa4 Minor updates to comments only. 2018-05-17 17:50:14 +00:00
Richard Barry
aec45f2479 Import the code coverage test additions from the (unpublished) Visual Studio project to the (published) MingW/Eclipse project.
Update the MingW/Eclipse project to add a code coverage build configuration in addition to the existing Debug build configuration.
Update StreamBufferDemo.c so functions are called directly, rather than via configASSERT(), so their code coverage can be measured when configASSERT() is not defined.
In the Win32 port, replace the call to TerminateProcess() in vPortEndScheduler() with exit( 0 ) - which triggers the writing of the code coverage data to the disk.
Fix bug in ucStreamBufferGetStreamBufferType() - which is only used by the Percepio trace tool.
Update the line within vTaskStartScheduler() that was setting xTickCount to 0 to instead set it to configINITIAL_TICK_COUNT.
2018-03-14 15:58:47 +00:00
Richard Barry
f9bef06ec0 Introduce xMessageBufferNextLengthBytes() and tests for the same.
Add call to traceTASK_SWITCHED_IN() in vTaskStartScheduler() so trace tools can see the first task to run.
2018-03-04 19:25:14 +00:00
Richard Barry
7ddb8b342d Microblaze port: Place critical section around XIntc_Enable() to protect read/modify/write operation performed inside the library. 2018-01-30 17:42:12 +00:00
Richard Barry
13651934be Roll up the minor changes checked into svn since V10.0.0 into new V10.0.1 ready for release. 2017-12-18 22:54:18 +00:00
Richard Barry
cfc268814a Update to MIT licensed FreeRTOS V10.0.0 - see https://www.freertos.org/History.txt 2017-11-29 16:53:26 +00:00
Richard Barry
037abdddf2 Update TriCore port to work with latest GCC compiler. 2017-08-09 16:57:35 +00:00
Richard Barry
6eea3d8d4b Correct long time mis-spelled portINITIAL_EXEC_RETURN to portINITIAL_EXC_RETURN 2017-05-30 00:36:09 +00:00
Richard Barry
b080f13543 Add more "memory" clobbers into the MPU ports to make them robust to more aggressive optimisation in newer GCC version. 2017-04-10 01:58:01 +00:00
Richard Barry
0f85ead175 Add more "memory" clobbers into asm code of GCC/ARM_CRx_No_GIC port to make it robust with higher optimisation in newer versions of GCC. 2017-04-10 01:01:11 +00:00
Richard Barry
0a7a0a79d6 Updates to prevent warnings when compiled with LLVM. 2017-04-10 00:26:22 +00:00
Richard Barry
8ca40d80a9 Ensure the PIC32 interrupt stack is 8 byte aligned for all values of configISR_STACK_SIZE. 2017-04-09 20:13:48 +00:00
Richard Barry
464c2660ad Updates to the Cortex-M tickless idle code to reduce clock slippage.
Updates to prevent the vTaskSwitchContext() function being removed from GCC builds when link time optimisation is used.
2017-03-28 03:13:48 +00:00
Richard Barry
ad5659e93d Housekeeping check-in, no code changes. 2017-03-08 22:19:14 +00:00
Richard Barry
b9fe24962e Add additional memory barriers into ARM GCC asm code to ensure no re-ordering across asm code as optimisers get more aggressive. 2017-03-07 04:06:10 +00:00
Richard Barry
c3acc441ac Introduce vTaskInternalSetTimeOutState() which does not have a critical section, and add a critical section to the public version of the same. 2017-02-24 02:16:54 +00:00
Richard Barry
8d041c8e21 Update version number in preparation for maintenance release. 2017-01-22 05:28:13 +00:00
Richard Barry
992a3c8c71 Update BSP source files for UltraScale Cortex-A53 and Cortex-R5 and Microblaze to the 2016.4 versions.
Correct alignment issue in GCC Cortex-R port that was preventing full floating point usage in interrupts (other ports will be updated likewise).
Update the UltraScale R5 demo to test the GCC Cortex-A9 port layer modification mentioned on the line above.
2017-01-19 04:11:21 +00:00
Richard Barry
6ffaa6f018 Correct alignment issue in GCC and RVDS Cortex-A9 port that was preventing full floating point usage in interrupts (other ports will be updated likewise).
Update the Zynq demo to test the GCC Cortex-A9 port layer modification mentioned on the line above.
2017-01-18 18:33:48 +00:00
Richard Barry
ca9edf3531 Increase the priority of the Windows threads used by the FreeRTOS Windows port, and, because the threads have high priority and run on the same core, prevent the port running on single core hosts so as to avoid locking up the host. 2017-01-04 04:48:22 +00:00
Richard Barry
225f13bac2 Update TaskNotify.c to test the condition where a direct to task notification is sent to a suspended task.
Introduce configSTACK_DEPTH_TYPE so the application writer change the type used to specify a stack size from uint16_t to whatever they like.  Defaults to uint16_t if not defined.
Introduce configINITIAL_TICK_COUNT to allow users to start the tick count at something other than 0.  Used for testing, but overflows can be better tested by setting configUSE_16_BIT_TICKS to 1.
Split xQueueGenericReceive() into xQueueReceive(), xQueuePeek() and xQueueSemaphoreTake() as the first step in refactoring xQueueGenericReceive().
Add Cortex-M3 port layer for Code Composer Studio - previously there was only a Cortex-M4F port.
Introduce configPRE_SUPPRESS_TICKS_AND_SLEEP_PROCESSING() to allow applications to prevent portSUPPRESS_TICKS_AND_SLEEP() being called.  Previously the portPRE_SLEEP_PROCESSING() macro could only be used to abort entry into sleep time after clocks had been re-programmed for the distant wake time.
2016-11-25 21:07:56 +00:00
Richard Barry
7cce089e40 Add support for statically allocated memory protected tasks - previously only dynamically allocated tasks could be memory protected. 2016-09-20 13:54:28 +00:00
Richard Barry
75ffac21d7 Changes to core code and port layer:
+ Add configASSERT() into ARM Cortex-M ports to check the number of priority
      bit settings.
    + Clear the 'control' register before starting ARM Cortex-M4F ports in case
      the FPU is used before the scheduler is started.  This just saves a few
      bytes on the main stack as it prevents space being left for a later save
      of FPU registers.
    + Added xSemaphoreGetMutexHolderFromISR().
    + Corrected use of portNVIC_PENDSVSET to portNVIC_PENDSVSET_BIT in MPU ports.
2016-08-16 11:38:58 +00:00
Richard Barry
bdbf347c22 Remove clrex instruction from Cortex-M ports again as it is implicit in interrupt entry. 2016-06-28 10:39:25 +00:00
Richard Barry
c296e2cff8 Improvements to the Cortex-M ports:
- Clear the SysTick current value register before starting the SysTick (only required if something uses SysTick before starting the scheduler).
- Ensure atomic operations are thread safe by executing clrex in the context switch.
2016-06-27 13:13:05 +00:00
Richard Barry
2bd7884ace Prepare for V9.0.0 release:
+ Change version number from V9.0.0rc2 to V9.0.0.
2016-05-20 18:05:46 +00:00
Richard Barry
0063b29cdf Prepare for V9.0.0 release.
+ Set flash wait states on MSP432 demos.
+ Remove use of obsolete IO library in PIC32 demos.
+ Remove obsolete item left on stack of first task to run in the Cortex-M0 ports.
+ Correct IA32 GCC vPortExitCritical() implementation when configMAX_API_CALL_INTERRUPT_PRIORITY == portMAX_PRIORITY.
2016-05-19 13:28:12 +00:00
Richard Barry
e10647f9c0 Increase the test coverage of the GCC MPU demo that runs in the Keil simulator.
Add an MPU demo that uses the Keil simulator that also uses the Keil compiler.
Correct a few version numbers for files recently added to the repository.
2016-05-18 19:51:14 +00:00
Richard Barry
ee9cd40b6d Add GCC ARM Cortex-M4F MPU port.
Add RVDS ARM Cortex-M4F MPU port.
Increase the size of each buffer allocated to pbufs in the Microblaze lwIP demo to prevent pbufs chaining.
Use _start as the top of the stack for each Microblaze task, rather than NULL, as NULL was causing the Xilinx SDK to try and unwind the stack too far.
2016-05-18 10:41:28 +00:00
Richard Barry
fedb98c5f6 Recreated MicroBlaze example using Vivado 2016.1 - the Microblaze project is still a work in progress - not yet fully functional. 2016-05-10 14:05:22 +00:00
Richard Barry
324127837c Update some more standard demos for use on 64-bit architectures.
Update the Xilinx Ultrascale+ Cortex-A53 (64-bit) and Cortex-R5 (32-bit) demos to use version 2016.1 of the SDK.
2016-05-06 12:40:27 +00:00
Richard Barry
0721cf102a Completely re-generate the Zynq 7000 demo using the 2016.1 SDK tools.
Introduce configUSE_TASK_FPU_SUPPORT into the GCC Cortex-A9 port to allow tasks to have an FPU context by default.
Add MikroC Cortex-M4F port.
2016-04-25 17:24:54 +00:00
Richard Barry
0b5906d404 Remove obsolete MPU demos.
Separate the MPU wrappers into their own file so they can be used from future MPU ports.
2016-04-25 12:03:47 +00:00
Richard Barry
afd4b432f6 Improve coverage of the MPU API in the new MPU demo, fixing typos in the MPU port layer as they are found. 2016-04-24 18:33:16 +00:00
Richard Barry
345819d550 Update the GCC Cortex-A9 port to introduce a version of the IRQ handler that saves the FPU registers. 2016-04-23 10:53:57 +00:00
Richard Barry
ac67c39be9 Update the MPU port so it supports all the public functions found in V9.0.0rc2. 2016-04-20 15:42:34 +00:00
Richard Barry
057b38ad23 Updates to support FreeRTOS MPU in FreeRTOS V9.0.0 - including a GCC project that runs in the Keil simulator to allow development and testing. 2016-04-18 10:49:24 +00:00
Richard Barry
255145bde1 xTaskGetTaskHandle() changed to xTaskGetHandle().
Tidy up CEC1302 demo.
Ensure bit 0 of the task address is clear when setting up stack of initial Cortex-M3/4/7 stacks (for strict compliance, although not practically necessary).
vTaskGetTaskInfo() changed to vTaskGetInfo() - with a macro added for backward compatibility.
2016-04-15 11:48:07 +00:00