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Author SHA1 Message Date
Richard Barry
208cc18a90 Ensure data cannot be sent to a TCP socket if the socket is in the process of closing. 
Correct definition of StaticTask_t in the case that portUSE_MPU_WRAPPERS is set to 1.
prvTaskCheckFreeStackSpace() now returns configSTACK_DEPTH_TYPE to allow return values greater than max uint16_t value if required.
xStreamBufferSend() and xStreamBufferReceive() no longer clear task notification bits - clearing was unnecessary as only the task notification state is used.
 2018-01-30 17:39:14 +00:00
Richard Barry
0fe82b4d91 Correct out of date comment in tasks.c. 
Fix typo in comment in queue.h.
 2017-12-28 20:20:26 +00:00
Richard Barry
13651934be Roll up the minor changes checked into svn since V10.0.0 into new V10.0.1 ready for release. 2017-12-18 22:54:18 +00:00
Richard Barry
f998c8119a Update license information text files for the CLI, TCP and UDP products to be correct for V10. 2017-12-13 17:00:13 +00:00
Richard Barry
0d903cf2d6 FreeRTOS+TCP: Added ipconfigSOCKET_HAS_USER_WAKE_CALLBACK configuration option so the user can specify a callback to execute when data arrives. 
FreeRTOS+TCP: Improve print output when using WinPCap to assist in selecting the correct network interface.
FreeRTOS kernel: Fix extern "C" { in stream_buffer.h.
FreeRTOS kernel: Correct tskKERNEL_VERSION_NUMBER and tskKERNEL_VERSION_MAJOR constants for V10.
Ensure the currently executing task is printed correctly in vTaskList().
 2017-12-12 17:47:56 +00:00
Richard Barry
cfc268814a Update to MIT licensed FreeRTOS V10.0.0 - see https://www.freertos.org/History.txt 2017-11-29 16:53:26 +00:00
Richard Barry
e42a701e99 Add missing +TCP code. 2017-08-17 12:26:43 +00:00
Richard Barry
77e95538dc Added +TCP code to main repo. 2017-08-17 12:18:14 +00:00
Richard Barry
037abdddf2 Update TriCore port to work with latest GCC compiler. 2017-08-09 16:57:35 +00:00
Richard Barry
b6f2402f3f Update trace recorder source to fix some compile time warnings. 2017-06-01 14:16:16 +00:00
Richard Barry
2307bc9dfa Add MSVC .vs directory to keep the IDE's windows layout. 2017-06-01 14:15:24 +00:00
Richard Barry
6eea3d8d4b Correct long time mis-spelled portINITIAL_EXEC_RETURN to portINITIAL_EXC_RETURN 2017-05-30 00:36:09 +00:00
Richard Barry
3f74cd483b Update linker script so main stack starts on 8-byte alignment. 2017-05-30 00:17:14 +00:00
Richard Barry
6b8eb1e936 Update IAR project for MSP432 to IAR version 8.11. 2017-05-30 00:03:31 +00:00
Richard Barry
2887612f27 FreeRTOS.h changes to go with the last tasks.c checkin. 2017-05-29 23:08:34 +00:00
Richard Barry
b5d8be2209 Remove obsolete code from prvCheckTasksWaitingTermination(). 2017-05-29 22:55:09 +00:00
Richard Barry
533b533820 Fix typo in comment that got copied into multiple main.c file.s 2017-05-29 22:06:54 +00:00
Richard Barry
504d9c8bab Update the FreeRTOS_Plus_CLI_with_Trace_Windows_Simulator demo to use the latest FreeRTOS+Trace recorder code. 2017-05-29 22:05:25 +00:00
Richard Barry
35f5990e7a Update the MSVC and MingW demos to use the latest FreeRTOS+Trace recorder library. 2017-05-29 21:45:31 +00:00
Richard Barry
f289bfb388 Update to the latest trace recorder library. 2017-05-29 21:43:07 +00:00
Richard Barry
9f84f353d0 Remove configurations other than 'debug' from the Win32 demo. 2017-05-07 18:22:31 +00:00
Richard Barry
2e89c13c1c Cosmetic changes only. 2017-04-26 00:23:57 +00:00
Richard Barry
a99cd32208 Updated name of CORTEX_MPU_CEC_MEC_17xx_Keil_GCC to CORTEX_MPU_CEC_MEC_17xx_51xx_Keil_GCC. 2017-04-20 05:33:05 +00:00
Richard Barry
59925359ed Added traceQUEUE_CREATE_FAILED() trace macros into the queue create functions. 2017-04-10 01:58:58 +00:00
Richard Barry
b080f13543 Add more "memory" clobbers into the MPU ports to make them robust to more aggressive optimisation in newer GCC version. 2017-04-10 01:58:01 +00:00
Richard Barry
0f85ead175 Add more "memory" clobbers into asm code of GCC/ARM_CRx_No_GIC port to make it robust with higher optimisation in newer versions of GCC. 2017-04-10 01:01:11 +00:00
Richard Barry
0a7a0a79d6 Updates to prevent warnings when compiled with LLVM. 2017-04-10 00:26:22 +00:00
Richard Barry
8ca40d80a9 Ensure the PIC32 interrupt stack is 8 byte aligned for all values of configISR_STACK_SIZE. 2017-04-09 20:13:48 +00:00
Richard Barry
96db5a3600 PIC32MZ project using later MPLAB X tools. 2017-04-09 19:35:32 +00:00
Richard Barry
ffb228e448 Change name of the CEC and MEC directory to CORTEX_CEC_MEC_17xx_51xx_Keil_GCC as it is also applicable to the MEC5105 part. 2017-04-04 20:21:40 +00:00
Richard Barry
7fc04bfebe Change name of the CEC and MEC directory to CORTEX_MPU_CEC_MEC_17xx_51xx_Keil_GCC as it is also applicable to the MEC5105 part. 2017-04-04 20:16:37 +00:00
Richard Barry
464c2660ad Updates to the Cortex-M tickless idle code to reduce clock slippage. 
Updates to prevent the vTaskSwitchContext() function being removed from GCC builds when link time optimisation is used.
 2017-03-28 03:13:48 +00:00
Richard Barry
7ee26c1b5e Enable button interrupts in the MSP432 demos in order to test code paths when an MCU exits low power mode for a reason other than a tick interrupt. 2017-03-28 03:12:20 +00:00
Richard Barry
aa810cb926 Ensure vTaskGetInfo() sets the sate of the currently running task to eRunning - previously it was set to eReady. 2017-03-27 20:31:03 +00:00
Richard Barry
3b2bbcb56a Maintenance on MSP432 demo. 2017-03-09 02:13:40 +00:00
Richard Barry
ad5659e93d Housekeeping check-in, no code changes. 2017-03-08 22:19:14 +00:00
Richard Barry
34b194150e Add CEC and MEC 17xx demo that is completely statically allocated. NOT FULLY TESTED YET. 2017-03-08 18:38:02 +00:00
Richard Barry
b9fe24962e Add additional memory barriers into ARM GCC asm code to ensure no re-ordering across asm code as optimisers get more aggressive. 2017-03-07 04:06:10 +00:00
Richard Barry
c3acc441ac Introduce vTaskInternalSetTimeOutState() which does not have a critical section, and add a critical section to the public version of the same. 2017-02-24 02:16:54 +00:00
Richard Barry
9b213e8c34 Add SimpleLink CC3220SF demo. 2017-02-24 02:12:27 +00:00
Richard Barry
67def3c14b Update Reliance Edge fail safe file system to the latest version. 2017-01-24 00:20:35 +00:00
Richard Barry
8d041c8e21 Update version number in preparation for maintenance release. 2017-01-22 05:28:13 +00:00
Richard Barry
979e41c9da Update UltraScale R5 hardware definition and BSP for 2016.4 SDK tools. 2017-01-21 21:59:25 +00:00
Richard Barry
ff55eb920c Update Zynq MPSoC hardware definition and BSP files to be those shipped with the 2016.4 SDK. 2017-01-19 16:33:13 +00:00
Richard Barry
992a3c8c71 Update BSP source files for UltraScale Cortex-A53 and Cortex-R5 and Microblaze to the 2016.4 versions. 
Correct alignment issue in GCC Cortex-R port that was preventing full floating point usage in interrupts (other ports will be updated likewise).
Update the UltraScale R5 demo to test the GCC Cortex-A9 port layer modification mentioned on the line above.
 2017-01-19 04:11:21 +00:00
Richard Barry
6ffaa6f018 Correct alignment issue in GCC and RVDS Cortex-A9 port that was preventing full floating point usage in interrupts (other ports will be updated likewise). 
Update the Zynq demo to test the GCC Cortex-A9 port layer modification mentioned on the line above.
 2017-01-18 18:33:48 +00:00
Richard Barry
d67dcf9c74 Enhanced priority dis-inheritance functionality in the case where a task that caused another task to inherit its priority times out before obtain a mutex. 
Added test code to GenQTest to test the new priority dis-inheritance functionality.
Allow the default names given to the Idle and Timer tasks to be overwridden by definitions in FreeRTOSConfig.h.
 2017-01-16 03:58:51 +00:00
Richard Barry
883541bc8e Rename the CORTEX_MPU_MEC17xx_KEIL_GCC directory to CORTEX_MPU_CEC_MEC_Keil_GCC as it is also applicable to the CEC17xx parts. 2017-01-09 21:29:42 +00:00
Richard Barry
c882141175 Change how volatile is used in some of the standard demos to remove compiler warnings in the latest GCC versions. 2017-01-04 05:07:12 +00:00
Richard Barry
ca9edf3531 Increase the priority of the Windows threads used by the FreeRTOS Windows port, and, because the threads have high priority and run on the same core, prevent the port running on single core hosts so as to avoid locking up the host. 2017-01-04 04:48:22 +00:00