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150 Commits

Author SHA1 Message Date
Richard Barry
dcd261bb8b Update the Keil and IAR CM0 port layers to match the changes made to the GCC version. 2013-10-22 11:26:16 +00:00
Richard Barry
41fe693968 Improve how the scheduler is started in the GCC Cortex-M0 port. 2013-10-22 09:50:20 +00:00
Richard Barry
a12ea2d212 Update FreeRTOS version number to V7.5.3 
Update FreeRTOS+CLI version number to V1.0.2
Update FreeRTOS+UDP version number to V1.0.1
 2013-10-14 19:56:47 +00:00
Richard Barry
0c56f5018d Add some defensive programming in the default tickless mode in case the application supplied post tick hook takes a long time to complete. 2013-10-08 12:33:46 +00:00
Richard Barry
aedf7824cb Introduce the prvTaskExitError() function for all ARM_CMn ports. 
Introduce the configTASK_RETURN_ADDRESS macro for the GCC ARM_CMn ports.
Improve time slippage penalty when entering tickless mode is abandoned.
 2013-10-08 11:30:40 +00:00
Richard Barry
eaacbb099a Clear up a few compiler warnings. 
Correct header comments in the UARTCommandConsole.c file used in the SmartFusion2 demo.
Exercise the new xQueueSpacesAvailable() function in the MSVC demo.
Add defaults for the new traceMALLOC and traceFREE trace macros.
Catch tasks trying to exit their functions in the Cortex-M0 ports.
Add additional comments to timers.c in response to a support forum question.
Initialise _impure_ptr prior to the first task being started.
Prior to V7.5.0 a yield pended in the tick hook would have occurred during the same tick interrupt.  Return pdTRUE from xTaskIncrementTick() if a yield is pending to revert to that behaviour.
 2013-10-07 12:06:17 +00:00
Richard Barry
73606369c4 Make Cortex-M0 set/clear interrupt flag from ISR functions nestable. 
Don't reset the stack location when starting the scheduler in Cortex-M0 ports as the vector offset register is not implemented and XMC1000 devices have their application vector address somewhere other than 0x00.
 2013-09-01 19:53:24 +00:00
Richard Barry
2f754d9b0c Add additional critical section to the default tickless implementations. 
Update version number for maintenance release.
 2013-07-24 09:45:17 +00:00
Richard Barry
3cbe0a724d Update version number. 2013-07-23 10:51:45 +00:00
Richard Barry
679a3c670c Update the Cortex-M vPortValidateInterruptPriority() implementation to ensure compatibility with the STM32 standard peripheral library. 2013-07-23 09:44:00 +00:00
Richard Barry
203ae64600 Rename xTaskGetSystemState() uxTaskGetSystemState(). 2013-07-18 14:41:15 +00:00
Richard Barry
7d6758ee1a Minor updates and change version number for V7.5.0 release. 2013-07-17 18:32:57 +00:00
Richard Barry
da0fff63c9 Update Cortex-M MPU version to include new API functions. 2013-07-13 19:37:35 +00:00
Richard Barry
e5d9640863 Update RX ports to only include additional check on the existing IPL (so it is not lowered) if configASSERT() is defined. 2013-07-13 11:31:35 +00:00
Richard Barry
5d902f2b9c Complete additions of portASSERT_IF_INTERRUPT_PRIORITY_INVALID() for all RX compiler ports. 2013-07-11 10:05:06 +00:00
Richard Barry
65704174c9 Add portASSERT_IF_INTERRUPT_PRIORITY_INVALID() implementation to the RX ports that use the Renesas compiler. 
Add portASSERT_IF_INTERRUPT_PRIORITY_INVALID() implementation to the Cortex-A9 ports.
 2013-07-09 17:57:59 +00:00
Richard Barry
c4eef61d39 Added portASSERT_IF_INTERRUPT_PRIORITY_INVALID() implementation to Cortex-M3 and Cortex-M4F ports. 2013-07-04 11:20:28 +00:00
Richard Barry
0c0b54c175 Refine the default tickless idle implementation in the Cortex-M3 port layers. 2013-06-30 10:38:31 +00:00
Richard Barry
a7c47131fa Remove portALIGNMENT_ASSERT_pxCurrentTCB() macro, which serves no purpose. 2013-06-25 13:39:50 +00:00
Richard Barry
62c0ae0926 Update port layers to make better use of the xTaskIncrementTick() return value. 2013-06-08 18:36:25 +00:00
Richard Barry
59a834eb86 Update ports that have their tick configuration in an application callback to use xTaskIncrementTick() in place of vTaskIncrementTick(). 2013-06-07 12:39:56 +00:00
Richard Barry
51d9ee0c1c Add configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS mechanism to the relevant port.c file to allow the user to define functions that will execute in privileged mode. 2013-06-07 09:45:34 +00:00
Richard Barry
15ec6c87f7 Convert mpre ports to use xTaskIncrementTick() in place of vTaskIncrementTick(). 2013-06-06 16:06:48 +00:00
Richard Barry
686d190798 Convert some ports to use xTaskIncrementTick() in place of vTaskIncrementTick(). 
Move DSB instructions to before WFI instructions in line with ARM recommendations.
 2013-06-06 15:46:40 +00:00
Richard Barry
a03b171992 Fix compiler warning in psp_test.c when compiled with ARM compiler. 
Add portYIELD_FROM_ISR() macros to Cortex-M ports.  The new macro just calls the exiting portEND_SWITCHING_ISR() macro.
Remove code from the MSVC port layer that was left over from a previous implementation and become obsolete.
 2013-05-19 09:43:00 +00:00
Richard Barry
fb9662009a Update comments in Atmel Studio CreateProjectDirectoryStructure.bat files to remove references to replace references to Eclipse with references to Atmel Studio. 
Update the tickless idle implementations that use up counters for tick interrupt generate to ensure they remain in low power mode for the desired time instead of one tick less than the desired time.
 2013-05-09 09:56:04 +00:00
Richard Barry
96ceae8edd Update version number ready to release the FAT file system demo. 2013-04-30 21:42:41 +00:00
Richard Barry
f9918345e1 Update version numbers to V7.4.1. 2013-04-18 12:58:17 +00:00
Richard Barry
b7487b8dc2 Update yield code in RX600/GCC port. 2013-04-17 08:23:02 +00:00
Richard Barry
a0056e8fd3 Add RX100 GCC port layer. 2013-04-16 15:58:14 +00:00
Richard Barry
0527099b51 Add barrier instructions to the GCC CM3 ports. 2013-04-16 14:16:30 +00:00
Richard Barry
6d20e2b5cd Add barrier instructions to GCC CM3/4 code. 2013-04-07 19:43:52 +00:00
Richard Barry
a9b8f0ca69 Minor mods common files to fix warnings generated by Renesas compiler. 
Correct the header comments in het.c and het.h (RM48/TMS570 demo) which were corrupt.
Correct version numbers in RX63N Renesas compiler demo.
Ensure stacks set up for tasks in the RX200 port layer end on 8 byte boundaries (was 4, which didn't matter but didn't match the definition).
Replaced unqualified (unsigned) in calls to standard functions with (size_t).
 2013-03-25 16:30:42 +00:00
Richard Barry
a5d0e3f0c1 Prepare for V7.4.0 release. 2013-02-19 18:36:58 +00:00
Richard Barry
902f9e1a58 Update PIC32 demo application to remove reliance on PLIB functions. 
Update the default low power implementation in all the Cortex-M port layers to add a small critical section.
 2013-02-18 16:41:11 +00:00
Richard Barry
b671bf368a Improve QueueSet.c test coverage by reading the queue set from an ISR to force paths through the queue locking and unlocking. 
Add the FreeRTOS+Trace recorder into the Win32 MSVC demo.
Added more functions, including the queue set functions, to the MPU port.
 2013-02-12 10:09:36 +00:00
Richard Barry
b5b518571e remove the additional line added to the MPU port.c as the original code was correct. Instead remove the alignment assert by adding #define portALIGNMENT_ASSERT_pxCurrentTCB ( void ) 
to the portmacor.h file.
 2013-01-31 15:27:00 +00:00
Richard Barry
ac78adae4b Added INCLUDE_xSemaphoreGetMutexHolder() default. 
Changed eTaskStateGet() to eTaskGetState() and added #define to ensure backward compatibility.
Added configEXPECTED_IDLE_TIME_BEFORE_SLEEP definition - was previously hard coded to 2.
Slight change to the default CM3 tickless sleep function to allow the idle time to be set to zero in the pre-sleep processing macro.
Changed stack alignment for the FreeRTOS-MPU port to ensure it didn't trigger the assert() in the generic create function.
 2013-01-31 14:18:03 +00:00
Richard Barry
ba686260ca Make CM3/4 tick configuration a weak function to allow application writers to use an alternative tick source. 2012-10-29 15:56:26 +00:00
Richard Barry
f5c52bdb1d Re-jig some of the new functions to correctly assign them public or private linkage, and remove some functions that were added in but never used. 2012-10-22 16:40:45 +00:00
Richard Barry
f06a945444 Prepare for V7.3.0 release. 2012-10-16 12:17:47 +00:00
Richard Barry
e03ab659f3 Add tickless idle support in Cortex-M ports. 
Change CCS R4 directory name.
 2012-10-16 07:55:40 +00:00
Richard Barry
c403e974ee Update PIC32 port to make use of configUSE_PORT_OPTIMISED_TASK_SELECTION. 
Make small modification in GCC CM3 port when configUSE_PORT_OPTIMISED_TASK_SELECTION is set to 1 to remove compiler warning.
 2012-09-25 18:18:37 +00:00
Richard Barry
87f663a461 Correct #if( configMAX_PRIORITIES >= 32 ) check performed when configUSE_PORT_OPTIMISED_TASK_SELECTION == 1 to instead be #if( configMAX_PRIORITIES > 32 ). 2012-09-24 12:10:08 +00:00
Richard Barry
92f1699055 Added Cortex-M optimised code to the IAR, GCC and Keil Cortex-M port layers. 
Tested and updated a few Cortex-M projects to use configUSE_PORT_OPTIMISED_TASK_SELECTION set to 1.
 2012-09-24 11:01:17 +00:00
Richard Barry
8ef7f03536 Add eTaskStateGet() to FreeRTOS-MPU. 2012-09-23 09:35:53 +00:00
Richard Barry
0c7af1c2d3 Put comments in the code that give a reference to people who think that setting BASE_PRI to zero is the wrong thing to to in an ISR. 2012-08-14 13:04:22 +00:00
Richard Barry
e0bab5981a Prepare for V7.2.0 release. 2012-08-14 12:14:48 +00:00
Richard Barry
73ad4387e2 Remove the remnants of the legacy trace functionality (since replaced with FreeRTOS+Trace). 
Replaced the #error that traps configMAX_SYSCALL_INTERRUPT_PRIORITY being set to 0 with a configASSERT() for GCC Cortex-M3/4 ports as the #error does not work if configMAX_SYSCALL_INTERRUPT_PRIORITY includes any casting.  Not a problem for other compilers as they cannot have casting anyway as that would break the assembly code.
 2012-08-12 17:05:23 +00:00
Richard Barry
f508a5f653 Add FreeRTOS-Plus directory. 2012-08-11 21:34:11 +00:00