Update the Keil and IAR CM0 port layers to match the changes made to the GCC version.
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@ -161,7 +161,7 @@ static void prvTaskExitError( void )
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void vPortSVCHandler( void )
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{
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/* This function is no longer used, but returned for backward
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/* This function is no longer used, but retained for backward
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compatibility. */
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}
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/*-----------------------------------------------------------*/
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@ -1,5 +1,5 @@
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/*
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FreeRTOS V7.5.3 - Copyright (C) 2013 Real Time Engineers Ltd.
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FreeRTOS V7.5.3 - Copyright (C) 2013 Real Time Engineers Ltd.
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All rights reserved
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VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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@ -127,24 +127,9 @@ xPortPendSVHandler:
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/*-----------------------------------------------------------*/
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vPortSVCHandler;
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ldr r3, =pxCurrentTCB /* Restore the context. */
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ldr r1, [r3] /* Get the pxCurrentTCB address. */
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ldr r0, [r1] /* The first item in pxCurrentTCB is the task top of stack. */
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adds r0, r0, #16 /* Move to the high registers. */
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ldmia r0!, {r4-r7} /* Pop the high registers. */
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mov r8, r4
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mov r9, r5
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mov r10, r6
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mov r11, r7
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msr psp, r0 /* Remember the new top of stack for the task. */
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subs r0, r0, #32 /* Go back for the low registers that are not automatically restored. */
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ldmia r0!, {r4-r7} /* Pop low registers. */
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mov r1, r14 /* OR R14 with 0x0d. */
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movs r0, #0x0d
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orrs r1, r0
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bx r1
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/* This function is no longer used, but retained for backward
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compatibility. */
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bx lr
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/*-----------------------------------------------------------*/
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@ -152,9 +137,18 @@ vPortStartFirstTask
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/* The MSP stack is not reset as, unlike on M3/4 parts, there is no vector
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table offset register that can be used to locate the initial stack value.
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Not all M0 parts have the application vector table at address 0. */
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cpsie i /* Globally enable interrupts. */
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svc 0 /* System call to start first task. */
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nop
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ldr r3, =pxCurrentTCB /* Obtain location of pxCurrentTCB. */
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ldr r1, [r3]
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ldr r0, [r1] /* The first item in pxCurrentTCB is the task top of stack. */
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adds r0, #32 /* Discard everything up to r0. */
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msr psp, r0 /* This is now the new top of stack to use in the task. */
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movs r0, #2 /* Switch to the psp stack. */
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msr CONTROL, r0
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pop {r0-r5} /* Pop the registers that are saved automatically. */
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mov lr, r5 /* lr is now in r5. */
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cpsie i /* The first task has its context and interrupts can be enabled. */
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pop {pc} /* Finally, pop the PC to jump to the user defined task code. */
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/*-----------------------------------------------------------*/
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@ -153,43 +153,35 @@ static void prvTaskExitError( void )
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}
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/*-----------------------------------------------------------*/
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__asm void vPortSVCHandler( void )
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void vPortSVCHandler( void )
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{
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extern pxCurrentTCB;
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PRESERVE8
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ldr r3, =pxCurrentTCB /* Obtain location of pxCurrentTCB. */
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ldr r1, [r3]
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ldr r0, [r1] /* The first item in pxCurrentTCB is the task top of stack. */
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adds r0, #16 /* Pop the high registers. */
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ldmia r0!, {r4-r7}
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mov r8, r4
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mov r9, r5
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mov r10, r6
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mov r11, r7
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msr psp, r0 /* Remember the new top of stack for the task. */
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subs r0, #32 /* Go back for the low registers that are not automatically restored. */
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ldmia r0!, {r4-r7} /* Pop low registers. */
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mov r1, r14 /* OR R14 with 0x0d. */
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movs r0, #0x0d
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orrs r1, r0
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bx r1
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ALIGN
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/* This function is no longer used, but retained for backward
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compatibility. */
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}
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/*-----------------------------------------------------------*/
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__asm void prvPortStartFirstTask( void )
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{
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extern pxCurrentTCB;
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PRESERVE8
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/* The MSP stack is not reset as, unlike on M3/4 parts, there is no vector
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table offset register that can be used to locate the initial stack value.
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Not all M0 parts have the application vector table at address 0. */
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cpsie i /* Globally enable interrupts. */
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svc 0 /* System call to start first task. */
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ldr r3, =pxCurrentTCB /* Obtain location of pxCurrentTCB. */
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ldr r1, [r3]
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ldr r0, [r1] /* The first item in pxCurrentTCB is the task top of stack. */
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adds r0, #32 /* Discard everything up to r0. */
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msr psp, r0 /* This is now the new top of stack to use in the task. */
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movs r0, #2 /* Switch to the psp stack. */
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msr CONTROL, r0
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pop {r0-r5} /* Pop the registers that are saved automatically. */
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mov lr, r5 /* lr is now in r5. */
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cpsie i /* The first task has its context and interrupts can be enabled. */
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pop {pc} /* Finally, pop the PC to jump to the user defined task code. */
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ALIGN
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}
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/*-----------------------------------------------------------*/
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