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344 Commits

Author SHA1 Message Date
Richard Barry
f4a1a7d577 Add new port layer for Cortex-A devices without the means to mask interrupt priorities. 2014-07-12 19:21:04 +00:00
Richard Barry
8aa5fa3459 Make the parameters to vPortDefineHeapRegions() const. 
Add additional asserts to the Keil CM3 and CM4F ports (other CM3/4 ports already updated).
Add the additional yield necessitated by the mutex held count to the case when configUSE_QUEUE_SETS is 0.
 2014-07-04 13:17:21 +00:00
Richard Barry
d96dc2adb0 Simply some of the alignment calculations in heap_4.c to match those used in heap_5.c. 
Remove some apparently obsolete code from xTaskPriorityDisinherit() (a task cannot be both blocked and giving bac a mutex at the same time].
Update the new "mutex held count" increment and decrement functions to allow mutexes to be created before the scheduler is started.
 2014-07-03 14:44:37 +00:00
Richard Barry
4b26dc0614 Check in the new memory allocator that allows the heap to span multiple blocks. 2014-07-02 10:19:49 +00:00
Richard Barry
583b144bc3 Default the definition of portASSERT_IF_IN_ISR() to nothing if it is not defined. 
Helper updates to allow a count of the number of mutexes held to be added.
Updates to the CCS Cortex-R4 implementation necessitated by a change in compiler semantics.
Update PIC32MX and MZ ports to assert if a non ISR safe function is called from an ISR.
 2014-06-16 12:51:35 +00:00
Richard Barry
b4659d8872 Add code to assert() if non ISR safe API function is called from ISR in Tasking CM4F ports - plus fix bug where the max syscall interrupt priority was used incorrectly in the Tasking CM4F port. 2014-06-15 09:24:08 +00:00
Richard Barry
113220628f Add code to assert() if non ISR safe API function is called from ISR in IAR and GCC CM3 and CM4F ports - Keil and tasking to follow. 2014-06-14 13:56:25 +00:00
Richard Barry
4723209074 Simplify the assert that checks if a non-ISR safe function is called from an ISR in the GCC Cortex-A9 port. 2014-06-13 14:08:28 +00:00
Richard Barry
8426eba8e7 Added portASSERT_IF_IN_INTERRUPT() macro to the GCC Cortex A9 port layer. 2014-06-12 16:28:56 +00:00
Richard Barry
9efb5c8b2f Check in RL78 GCC port layer now it has been verified with the fixed compiler. 2014-06-05 12:42:49 +00:00
Richard Barry
1130a53ec8 Reverse order of projdefs.h and FreeRTOSConfig.h includes in FreeRTOS.h to allow addition of pdMS_TO_TICKS() macro. 
Update RXv2 GCC port to match RXv2 Renesas port.
 2014-06-04 09:17:14 +00:00
Richard Barry
b215310e63 Add some missing volatiles to __asm statements in the CA9 GCC port. 2014-05-19 13:14:02 +00:00
Richard Barry
0bb794301a Update version number ready for release. 2014-04-24 14:26:36 +00:00
Richard Barry
911e82a909 Add xQueueGetMutexHolder() to MPU functions. 2014-04-24 12:29:40 +00:00
Richard Barry
f25503977e Event Groups: Convert the 'clear bits from ISR' function into a pended function to fix reentrancy issue. 
Event Groups: Ensure the 'wait bits' and 'sync' functions don't return values that still contain some internal control bits.
 2014-04-23 15:23:54 +00:00
Richard Barry
29a08b5e24 Update Cortex-A port layers to ensure the ICCRPR and ICCPMR registers are always accessed as 32-bit values. 2014-03-25 17:12:31 +00:00
Richard Barry
05a0e4379e First pass at RXv2 port layer. 2014-03-07 17:12:06 +00:00
Richard Barry
9bd5e5cf03 Cast away a few unused return types to ensure lint/compilers don't generate warnings when the warning level is high. 2014-02-23 20:01:07 +00:00
Richard Barry
e101e7e437 Update version number to V8.0.0 (without the release candidate number). 2014-02-18 14:01:57 +00:00
Richard Barry
38ae9b76bc Add logic to determine the tick timer source and vector installation into the PIC32MZ port assembly file to allow more efficient interrupt entry. 2014-02-18 10:10:32 +00:00
Richard Barry
0f6b699eef Linting. 2014-02-17 19:41:29 +00:00
Richard Barry
84f4ae9aa0 Make xTaskIsTaskSuspended() a private function as it should only be called from within critical sections. 
Fix issue in and simplify the xTaskRemoveFromUnorderedEventList() function.  The function is new to the V8 release candidates so does not effect official released code.
 2014-02-10 17:02:37 +00:00
Richard Barry
d12ec14160 Add configCLEAR_TICK_INTERRUPT() to the IAR and RVDS Cortex-A9 ports. 
Replace LDMFD with POP instructions in IAR and RVDS Cortex-A9 ports.
Replace branch to address with indirect branch and exchange to address in register in the IAR and RVDS Cortex-A9 ports.
 2014-02-04 17:02:52 +00:00
Richard Barry
f843888e60 Complete GCC/Cortex-A9 port. 2014-02-04 14:49:48 +00:00
Richard Barry
51ea2639a9 vQueueAddToRegistry() now takes a const char * instead of a char *. 
tmrCOMMAND_CHANGE_PERIOD_FROM_ISR constant added for the "FromISR" version of the software timer change period API function.
 2014-01-28 12:32:03 +00:00
Richard Barry
6130fec60e Introduce xTimerPendFunctionCall(). 
Change INCLUDE_xTimerPendFunctionCallFromISR to INCLUDE_xTimerPendFunctionCall
Update event group trace macros to match the new trace recorder code.
Ensure parameter name consistency by renaming any occurrences of xBlockTime and xBlockTimeTicks to xTicksToWait.
Continue work on GCC/RL78 port - still a work in progress.
Adjust how the critical section was used in xQueueAddToSet.
 2014-01-25 17:01:41 +00:00
Richard Barry
b352be2e23 Tidy up GCC Cortex-A port layer - still a work in progress. 2014-01-24 17:09:31 +00:00
Richard Barry
14f895478d Continue work on GCC/Cortex-A port layer. 2014-01-24 13:27:56 +00:00
Richard Barry
d0323e67ae Continue working on GCC/CA_9 port layer - tick interrupt now working but needs tidy up. 2014-01-23 11:51:57 +00:00
Richard Barry
3e430b3801 Carry on working on the Cortex-A/GCC port layer - still a work in progress. 2014-01-22 15:39:58 +00:00
Richard Barry
86023aa5a6 Beginnings of GCC Cortex-A port - not yet completely converted from IAR version. 2014-01-20 17:53:30 +00:00
Richard Barry
d8c135e2dc Add extern 'C' to FreeRTOS.h. 
Remove obsolete extern declaration of vTaskSwitchContext() from the MPX430X IAR portmacro.h (other older portmacro.h header files contain the same declaration).
 2014-01-17 09:45:02 +00:00
Richard Barry
a1b8079df1 Introduce configENABLE_BACKWARD_COMPATIBILITY to allow the #defines that provide backward compatibility with FreeRTOS version prior to V8 to be optionally omitted. 2014-01-13 20:26:47 +00:00
Richard Barry
f01bf9fdc3 Add additional NOP after EINT instruction in MSP430 ports. 2014-01-10 10:38:02 +00:00
Richard Barry
1aaa80fba6 Map portTICK_RATE_MS to portTICK_PERIOD_MS. 2014-01-05 20:40:55 +00:00
Richard Barry
a56d4b998c Minor tidy ups that don't effect code generation, plus: 
When a task is unblocked the need for a context switch is only signalled if the unblocked task has a priority higher than the currently running task, instead of higher than or equal to the priority of the currently running task.
 2014-01-05 20:12:20 +00:00
Richard Barry
a8836b5c43 Change version numbers ready for V8.0.0 release candidate 1 tag. 2013-12-31 20:10:09 +00:00
Richard Barry
2aa19f1a14 Add xEventGroupClearBitsFromISR() and xEventGroupGetBitsFromISR() functions. 
Move some types defines out of generic kernel headers into feature specific headers.
Convert the function prototype dypedefs to the new _t naming.
 2013-12-31 16:45:49 +00:00
Richard Barry
e95b482f56 Minor updates to demo projects to ensure correct building with V8 rc1. 2013-12-30 11:24:34 +00:00
Richard Barry
2b6eb1c5ab Revert some library files back to using standard types as they are not FreeRTOS files. 2013-12-29 14:55:55 +00:00
Richard Barry
3e20aa7d60 Replace standard types with stdint.h types. 
Replace #define types with typedefs.
Rename all typedefs to have a _t extension.
Add #defines to automatically convert old FreeRTOS specific types to their new names (with the _t).
 2013-12-29 14:06:04 +00:00
Richard Barry
b4116a7c7d Change the type used for strings and single characters from signed char to just char. 2013-12-27 12:10:23 +00:00
Richard Barry
c861e3883d Add coverage test markers. 2013-12-23 18:11:15 +00:00
Richard Barry
64ad1c00b5 In process of module testing event_groups.c. 
Introduce xPortRunning variable into Win32 simulator port layer.
Add port optimised task selection macro for the GCC Win32 port layer (the MSVC version has had one for a while).
Ensure the event list item value does not get modified by code in tasks.c (priority inheritance, or priority change) when it is in use by the event group implementation.
 2013-12-23 16:02:03 +00:00
Richard Barry
4b2f9dad42 Force the SysTick clock bit to be set in Cortex-M3 and Cortex-M4F bits if configSYSTICK_CLOCK_HZ is not defined, otherwise leave the bit as it is found as the SysTick may use a divided clock. 2013-12-15 10:27:37 +00:00
Richard Barry
a320d6dffd Update the ucQueueNumber member of the queue structure (used with FreeRTOS+Trace to be an unsigned portBASE_TYPE instead of an unsigned char. 2013-12-14 13:16:05 +00:00
Richard Barry
acad916453 Change the way one thread deletes another in the Windows simulator port (the way one thread deleted itself was already changed in a previous check-in). 
Reset the expected block time variable when a task is suspended or deleted in case the value held in the variables was associated with the task just suspended or deleted.
 2013-12-12 16:07:24 +00:00
Richard Barry
0d1e12522b Update Cortex-M3 and Cortex-M4F ports to allow the SysTick to be clocked at a different speed than the system clock (as is done in the recent STM32L demo. ). 
Add additional asserts and isb instructions into the Cortex-M3 and Cortex-M4F ports.
 2013-12-12 14:07:20 +00:00
Richard Barry
6b3393b4b6 Add trace macros into the event groups implementation. 
Add a task pre-delete hook to allow the insertion of any port specific clean up when a task is deleted.
Increase use of 'const' qualifiers.
Add vPortCloseRunningThread() into the Win32 port layer to attempt to allow Windows threads to be closed more gracefully when a task deletes itself.
 2013-12-12 10:19:07 +00:00
Richard Barry
00ad1a0200 Multiple tidy up, documentation corrections and typo corrections highlighted by Tamas Kleiber's diligent review. 2013-11-28 10:48:33 +00:00
Richard Barry
f54f21b8f6 Add event_groups.c and associated functions in other core files. 
Added xTimerPendCallbackFromISR() to provide a centralised deferred interrupt handling mechanism.
Add xPortGetLowestEverFreeHeapSize() to heap_4.c.
 2013-11-21 21:46:08 +00:00
Richard Barry
fa002f7fdd Final tidy up before V7.6.0 zip file creation. 2013-11-17 15:46:08 +00:00
Richard Barry
0cd79ad81d Change version numbers in preparation for V7.6.0 release. 2013-11-08 11:47:35 +00:00
Richard Barry
b181a3af99 Ensure the definition of prvTaskExitError()does not result in a compiler warning in ports where its use can be overridden (GCC Cortex-M ports). 
Remove duplicate save/restore of r14 in Cortex-M4F ports.
 2013-11-07 16:43:54 +00:00
Richard Barry
30bc6c01a9 Add ehb instructions back into PIC32 port layer (upon advice). 
Add configCLEAR_TICK_TIMER_INTERRUPT into PIC32 port layer to allow the timer configuration to be changed without any edits to the port layer being required.
Add prvTaskExitError() into the PIC32 port layer to trap tasks that attempt to exit from their implementing function.
Provide the ability to trap interrupt stack overflows in the PIC32 port.
Radically improve the timing in the Win32 simulator port layer.
 2013-11-07 14:16:32 +00:00
Richard Barry
dcd261bb8b Update the Keil and IAR CM0 port layers to match the changes made to the GCC version. 2013-10-22 11:26:16 +00:00
Richard Barry
41fe693968 Improve how the scheduler is started in the GCC Cortex-M0 port. 2013-10-22 09:50:20 +00:00
Richard Barry
a12ea2d212 Update FreeRTOS version number to V7.5.3 
Update FreeRTOS+CLI version number to V1.0.2
Update FreeRTOS+UDP version number to V1.0.1
 2013-10-14 19:56:47 +00:00
Richard Barry
94607d83f9 Add workaround to XMC4000 silicon bug to Tasking Cortex-M4F port layer. 2013-10-14 14:03:05 +00:00
Richard Barry
0c56f5018d Add some defensive programming in the default tickless mode in case the application supplied post tick hook takes a long time to complete. 2013-10-08 12:33:46 +00:00
Richard Barry
aedf7824cb Introduce the prvTaskExitError() function for all ARM_CMn ports. 
Introduce the configTASK_RETURN_ADDRESS macro for the GCC ARM_CMn ports.
Improve time slippage penalty when entering tickless mode is abandoned.
 2013-10-08 11:30:40 +00:00
Richard Barry
eaacbb099a Clear up a few compiler warnings. 
Correct header comments in the UARTCommandConsole.c file used in the SmartFusion2 demo.
Exercise the new xQueueSpacesAvailable() function in the MSVC demo.
Add defaults for the new traceMALLOC and traceFREE trace macros.
Catch tasks trying to exit their functions in the Cortex-M0 ports.
Add additional comments to timers.c in response to a support forum question.
Initialise _impure_ptr prior to the first task being started.
Prior to V7.5.0 a yield pended in the tick hook would have occurred during the same tick interrupt.  Return pdTRUE from xTaskIncrementTick() if a yield is pending to revert to that behaviour.
 2013-10-07 12:06:17 +00:00
Richard Barry
7ec4773131 Add traceMALLOC() and traceFREE() macros. 2013-10-04 20:56:45 +00:00
Richard Barry
73606369c4 Make Cortex-M0 set/clear interrupt flag from ISR functions nestable. 
Don't reset the stack location when starting the scheduler in Cortex-M0 ports as the vector offset register is not implemented and XMC1000 devices have their application vector address somewhere other than 0x00.
 2013-09-01 19:53:24 +00:00
Richard Barry
574f5044a6 Starting point for Keil Cortex-M0 port. 2013-08-25 01:01:18 +00:00
Richard Barry
c40370e96a Fix a few typos and remove the "register" keyword. 2013-08-16 13:31:54 +00:00
Richard Barry
2f754d9b0c Add additional critical section to the default tickless implementations. 
Update version number for maintenance release.
 2013-07-24 09:45:17 +00:00
Richard Barry
3cbe0a724d Update version number. 2013-07-23 10:51:45 +00:00
Richard Barry
bb2093cf5d Update the header file included in the PIC32 port_asm.S file to use the header for the latest compiler version. 2013-07-23 09:50:06 +00:00
Richard Barry
679a3c670c Update the Cortex-M vPortValidateInterruptPriority() implementation to ensure compatibility with the STM32 standard peripheral library. 2013-07-23 09:44:00 +00:00
Richard Barry
203ae64600 Rename xTaskGetSystemState() uxTaskGetSystemState(). 2013-07-18 14:41:15 +00:00
Richard Barry
7d6758ee1a Minor updates and change version number for V7.5.0 release. 2013-07-17 18:32:57 +00:00
Richard Barry
7d1292ced2 Linting and MISRA checking 2013-07-15 14:27:15 +00:00
Richard Barry
ce9c3b7413 Variable name change in the PIC32 port layer only. 2013-07-14 13:06:17 +00:00
Richard Barry
da0fff63c9 Update Cortex-M MPU version to include new API functions. 2013-07-13 19:37:35 +00:00
Richard Barry
e5d9640863 Update RX ports to only include additional check on the existing IPL (so it is not lowered) if configASSERT() is defined. 2013-07-13 11:31:35 +00:00
Richard Barry
4b964814de Implement portASSERT_IF_INTERRUPT_PRIORITY_INVALID() for PIC32. 2013-07-12 19:25:21 +00:00
Richard Barry
ad8fa53043 Kernel optimisations. 2013-07-12 11:11:19 +00:00
Richard Barry
5d902f2b9c Complete additions of portASSERT_IF_INTERRUPT_PRIORITY_INVALID() for all RX compiler ports. 2013-07-11 10:05:06 +00:00
Richard Barry
65704174c9 Add portASSERT_IF_INTERRUPT_PRIORITY_INVALID() implementation to the RX ports that use the Renesas compiler. 
Add portASSERT_IF_INTERRUPT_PRIORITY_INVALID() implementation to the Cortex-A9 ports.
 2013-07-09 17:57:59 +00:00
Richard Barry
0f6b0d3a59 Enhance heap_4.c to prevent blocks accidentally being freed twice, or blocks that don't have a valid block link descriptor being freed. 
Update the Cortex-A9 port to include asserts if an ISR safe FreeRTOS function is called from an interrupt that has a higher logical priority than configMAX_SYSCALL_INTERRUPT_PRIORITY (or whatever the CA9 equivalent is called), and also assert if the binary point is not set correctly.
 2013-07-09 12:49:49 +00:00
Richard Barry
c4eef61d39 Added portASSERT_IF_INTERRUPT_PRIORITY_INVALID() implementation to Cortex-M3 and Cortex-M4F ports. 2013-07-04 11:20:28 +00:00
Richard Barry
0c0b54c175 Refine the default tickless idle implementation in the Cortex-M3 port layers. 2013-06-30 10:38:31 +00:00
Richard Barry
a7c47131fa Remove portALIGNMENT_ASSERT_pxCurrentTCB() macro, which serves no purpose. 2013-06-25 13:39:50 +00:00
Richard Barry
6cbbfd2eb5 Slight correction to coding standard in heap_2.c and heap_4.c. 2013-06-25 13:25:08 +00:00
Richard Barry
fb47260e80 Improve efficiency of memory allocation when the memory block is already aligned correctly. 2013-06-25 12:20:29 +00:00
Richard Barry
c3f9e3c5ff Update RVDS port layer to match IAR port layer. 2013-06-20 14:56:40 +00:00
Richard Barry
5013baa2cd RVDS ARM Cortex-A port layer. 2013-06-20 12:47:21 +00:00
Richard Barry
04dafed839 IAR ARM Cortex-A port layer. 2013-06-20 12:20:40 +00:00
Richard Barry
2fd431e971 Modify the GCC/AVR port to make use of the xTaskIncrementTick return value. 
Add pre-processor directives in the dsPIC and PIC24 port layers that allows both port files to be included in the same project.
 2013-06-11 20:15:15 +00:00
Richard Barry
62c0ae0926 Update port layers to make better use of the xTaskIncrementTick() return value. 2013-06-08 18:36:25 +00:00
Richard Barry
59a834eb86 Update ports that have their tick configuration in an application callback to use xTaskIncrementTick() in place of vTaskIncrementTick(). 2013-06-07 12:39:56 +00:00
Richard Barry
c04b074707 Convert the remaining ports to use xTaskIncrementTick() in place of vTaskIncremenTick(). 2013-06-07 12:16:58 +00:00
Richard Barry
2fc9d033c6 Update the PIC32 port to use xTaskIncrementTick() and change the macro used to detect if XC is being used. 2013-06-07 11:15:43 +00:00
Richard Barry
51d9ee0c1c Add configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS mechanism to the relevant port.c file to allow the user to define functions that will execute in privileged mode. 2013-06-07 09:45:34 +00:00
Richard Barry
f904d26957 Convert more ports to use xTaskIncrementTick() in place of vTaskIncrementTick(). 2013-06-06 16:31:15 +00:00
Richard Barry
15ec6c87f7 Convert mpre ports to use xTaskIncrementTick() in place of vTaskIncrementTick(). 2013-06-06 16:06:48 +00:00
Richard Barry
686d190798 Convert some ports to use xTaskIncrementTick() in place of vTaskIncrementTick(). 
Move DSB instructions to before WFI instructions in line with ARM recommendations.
 2013-06-06 15:46:40 +00:00
Richard Barry
06953169ba Update RM48/TMS570 port to use xTaskIncrementTick in place of vTaskIncrementTick. 2013-06-06 13:06:24 +00:00
Richard Barry
a03b171992 Fix compiler warning in psp_test.c when compiled with ARM compiler. 
Add portYIELD_FROM_ISR() macros to Cortex-M ports.  The new macro just calls the exiting portEND_SWITCHING_ISR() macro.
Remove code from the MSVC port layer that was left over from a previous implementation and become obsolete.
 2013-05-19 09:43:00 +00:00
Richard Barry
fb9662009a Update comments in Atmel Studio CreateProjectDirectoryStructure.bat files to remove references to replace references to Eclipse with references to Atmel Studio. 
Update the tickless idle implementations that use up counters for tick interrupt generate to ensure they remain in low power mode for the desired time instead of one tick less than the desired time.
 2013-05-09 09:56:04 +00:00
Richard Barry
96ceae8edd Update version number ready to release the FAT file system demo. 2013-04-30 21:42:41 +00:00
Richard Barry
f9918345e1 Update version numbers to V7.4.1. 2013-04-18 12:58:17 +00:00
Richard Barry
2b41be4cb9 Update yield code in RX200/Renesas compiler port. 2013-04-17 08:55:16 +00:00
Richard Barry
0013028c7a Update yield code in RX600/IAR compiler port. 2013-04-17 08:46:10 +00:00
Richard Barry
4f5f527c73 Update yield code in RX600/Renesas compiler port. 2013-04-17 08:35:20 +00:00
Richard Barry
b7487b8dc2 Update yield code in RX600/GCC port. 2013-04-17 08:23:02 +00:00
Richard Barry
a69933782d Add RX100 Renesas compiler port layer. 2013-04-16 15:59:21 +00:00
Richard Barry
74290b4425 Add RX100 IAR port layer. 2013-04-16 15:58:46 +00:00
Richard Barry
a0056e8fd3 Add RX100 GCC port layer. 2013-04-16 15:58:14 +00:00
Richard Barry
9a15f50b00 Add memory barrier instructions to Tasking CM4F port. 2013-04-16 15:50:17 +00:00
Richard Barry
7132e88685 Add memory barrier instructions to the RVDS CM3 ports. 2013-04-16 15:30:43 +00:00
Richard Barry
895ee2bb3e Add barrier instructions to IAR CM3 ports. 2013-04-16 14:56:49 +00:00
Richard Barry
d135e45676 Replace the read back of the software interrupt register with barrier instructions (CCS/RM48/TMS570). 2013-04-16 14:17:35 +00:00
Richard Barry
0527099b51 Add barrier instructions to the GCC CM3 ports. 2013-04-16 14:16:30 +00:00
Richard Barry
6d20e2b5cd Add barrier instructions to GCC CM3/4 code. 2013-04-07 19:43:52 +00:00
Richard Barry
3762630f27 RL78/IAR port - Allow the end user to define their own tick interrupt configuration by defining configSETUP_TIMER_INTERRUPT(). 2013-03-25 17:00:13 +00:00
Richard Barry
a9b8f0ca69 Minor mods common files to fix warnings generated by Renesas compiler. 
Correct the header comments in het.c and het.h (RM48/TMS570 demo) which were corrupt.
Correct version numbers in RX63N Renesas compiler demo.
Ensure stacks set up for tasks in the RX200 port layer end on 8 byte boundaries (was 4, which didn't matter but didn't match the definition).
Replaced unqualified (unsigned) in calls to standard functions with (size_t).
 2013-03-25 16:30:42 +00:00
Richard Barry
caf1fbc899 Ensure IAR RL port layer works on devices using two different naming conventions for the interval timer registers. 2013-03-18 16:40:47 +00:00
Richard Barry
8c66fdbb8c Updated IAR RL78 port layer. 2013-03-17 16:54:17 +00:00
Richard Barry
17bba16fa6 Added YRDKRL78G14 build configuration to the IAR RL78 demo. 2013-02-24 19:48:26 +00:00
Richard Barry
a5d0e3f0c1 Prepare for V7.4.0 release. 2013-02-19 18:36:58 +00:00
Richard Barry
902f9e1a58 Update PIC32 demo application to remove reliance on PLIB functions. 
Update the default low power implementation in all the Cortex-M port layers to add a small critical section.
 2013-02-18 16:41:11 +00:00
Richard Barry
a7eae6bed3 Added more files to the Rowley and IAR LM3S demos to test building the newer files and queue sets. 
Made queue function prototypes consistent so xQueueHandle parameters are always xQueue, and xQUEUE * parameters pxQueue.
Likewise make the task API using px for pointers to TCBs, and just x for task handles.
Heap_x functions now automatically align the start of the heap without using the portDOUBLE union member.
Queue.c now includes queue.h.
 2013-02-12 17:35:43 +00:00
Richard Barry
b671bf368a Improve QueueSet.c test coverage by reading the queue set from an ISR to force paths through the queue locking and unlocking. 
Add the FreeRTOS+Trace recorder into the Win32 MSVC demo.
Added more functions, including the queue set functions, to the MPU port.
 2013-02-12 10:09:36 +00:00
Richard Barry
b5b518571e remove the additional line added to the MPU port.c as the original code was correct. Instead remove the alignment assert by adding #define portALIGNMENT_ASSERT_pxCurrentTCB ( void ) 
to the portmacor.h file.
 2013-01-31 15:27:00 +00:00
Richard Barry
ac78adae4b Added INCLUDE_xSemaphoreGetMutexHolder() default. 
Changed eTaskStateGet() to eTaskGetState() and added #define to ensure backward compatibility.
Added configEXPECTED_IDLE_TIME_BEFORE_SLEEP definition - was previously hard coded to 2.
Slight change to the default CM3 tickless sleep function to allow the idle time to be set to zero in the pre-sleep processing macro.
Changed stack alignment for the FreeRTOS-MPU port to ensure it didn't trigger the assert() in the generic create function.
 2013-01-31 14:18:03 +00:00
Richard Barry
4e7b460eaf Replace the CLZ function with a CLZ intrinsic in the Cortex-R4 port layer. 
Add EDS support in the PIC24 port layer.
Remove unnecessary EHB instructions from PIC32 port.
In the PIC32 port assembly code, replace the &= code with a single ins instruction.
 2013-01-23 16:06:45 +00:00
Richard Barry
96f93690ce Add warning suppression to IAR header. 2012-10-31 13:30:44 +00:00
Richard Barry
ba686260ca Make CM3/4 tick configuration a weak function to allow application writers to use an alternative tick source. 2012-10-29 15:56:26 +00:00
Richard Barry
9fe5156b53 Work around compiler bug in CCS5 by replacing the _call_swi() function with a #pragma SWI_ALIAS. 2012-10-29 11:38:19 +00:00
Richard Barry
f5c52bdb1d Re-jig some of the new functions to correctly assign them public or private linkage, and remove some functions that were added in but never used. 2012-10-22 16:40:45 +00:00
Richard Barry
f06a945444 Prepare for V7.3.0 release. 2012-10-16 12:17:47 +00:00
Richard Barry
f446f77fd4 Make the timer used for the PIC32 port layer user configurable. 2012-10-16 09:48:45 +00:00
Richard Barry
e03ab659f3 Add tickless idle support in Cortex-M ports. 
Change CCS R4 directory name.
 2012-10-16 07:55:40 +00:00
Richard Barry
c403e974ee Update PIC32 port to make use of configUSE_PORT_OPTIMISED_TASK_SELECTION. 
Make small modification in GCC CM3 port when configUSE_PORT_OPTIMISED_TASK_SELECTION is set to 1 to remove compiler warning.
 2012-09-25 18:18:37 +00:00
Richard Barry
87f663a461 Correct #if( configMAX_PRIORITIES >= 32 ) check performed when configUSE_PORT_OPTIMISED_TASK_SELECTION == 1 to instead be #if( configMAX_PRIORITIES > 32 ). 2012-09-24 12:10:08 +00:00
Richard Barry
92f1699055 Added Cortex-M optimised code to the IAR, GCC and Keil Cortex-M port layers. 
Tested and updated a few Cortex-M projects to use configUSE_PORT_OPTIMISED_TASK_SELECTION set to 1.
 2012-09-24 11:01:17 +00:00
Richard Barry
670d172cfc Introduced configUSE_PORT_OPTIMISED_TASK_SELECTION, and updated the MSVC simulator port as the first implementation. 2012-09-23 14:35:12 +00:00
Richard Barry
8ef7f03536 Add eTaskStateGet() to FreeRTOS-MPU. 2012-09-23 09:35:53 +00:00
Richard Barry
0c7af1c2d3 Put comments in the code that give a reference to people who think that setting BASE_PRI to zero is the wrong thing to to in an ISR. 2012-08-14 13:04:22 +00:00
Richard Barry
e0bab5981a Prepare for V7.2.0 release. 2012-08-14 12:14:48 +00:00
Richard Barry
73ad4387e2 Remove the remnants of the legacy trace functionality (since replaced with FreeRTOS+Trace). 
Replaced the #error that traps configMAX_SYSCALL_INTERRUPT_PRIORITY being set to 0 with a configASSERT() for GCC Cortex-M3/4 ports as the #error does not work if configMAX_SYSCALL_INTERRUPT_PRIORITY includes any casting.  Not a problem for other compilers as they cannot have casting anyway as that would break the assembly code.
 2012-08-12 17:05:23 +00:00
Richard Barry
f508a5f653 Add FreeRTOS-Plus directory. 2012-08-11 21:34:11 +00:00