Commit Graph

11 Commits

Author SHA1 Message Date
Richard Barry
0f85ead175 Add more "memory" clobbers into asm code of GCC/ARM_CRx_No_GIC port to make it robust with higher optimisation in newer versions of GCC. 2017-04-10 01:01:11 +00:00
Richard Barry
8d041c8e21 Update version number in preparation for maintenance release. 2017-01-22 05:28:13 +00:00
Richard Barry
2bd7884ace Prepare for V9.0.0 release:
+ Change version number from V9.0.0rc2 to V9.0.0.
2016-05-20 18:05:46 +00:00
Richard Barry
ac67c39be9 Update the MPU port so it supports all the public functions found in V9.0.0rc2. 2016-04-20 15:42:34 +00:00
Richard Barry
07ac1399ee Update version number to 9.0.0rc2. 2016-03-30 12:20:36 +00:00
Richard Barry
d3ba0aa98d Update version number ready for version 9 release candidate 1. 2016-02-18 17:11:14 +00:00
Richard Barry
825b43a188 Update version number ready for the V8.2.3 release. 2015-10-16 14:57:00 +00:00
Richard Barry
cd42d2c215 Changes in common files:
Add additional asserts into timers.c.

Trivial changes and changes in demo applications:
RX113 IAR project is not building and running.
Make FreeRTOS_SetupInterrupt() and FreeRTOS_ClearInterrupt() weak symbols in the Zynq SDK repository.
Correct typo in the port layer comments that was cut and paste into multiple files.
2015-10-03 18:48:41 +00:00
Richard Barry
f19497c3d6 Simplify and improve GIC-less Cortex-R4 port.
Add final tests into RZ/T demo.
2015-09-12 12:14:58 +00:00
Richard Barry
b9f235846f Common source code:
- Remove configASSERT() if a queue cannot be created, malloc failed hook will be called anyway.

Demo apps:
- RZ/T blinky demo working, but still lots to do to improve the port.
2015-09-11 13:29:40 +00:00
Richard Barry
28d8a27f8f Initial RZ/T port and demo - work in progress, currently only the tick interrupt can be installed. 2015-09-07 17:29:14 +00:00