Commit Graph

199 Commits

Author SHA1 Message Date
Gaurav-Aggarwal-AWS
82be77995e
Heap improvements (#462)
* Heap improvements

This commit makes the following improvements:

1. Add a check to heap_2 to track if a memory block is allocated to the
   application or not. The MSB of the size field is used for this
   purpose. The same check already exists in heap_4 and heap_5. This
   check prevents against double free.

2. Add a new flag configHEAP_CLEAR_MEMORY_ON_FREE to heap_2, heap_4 and
   heap_5. The application writer can set it to 1 in their
   FreeRTOSConfig.h to ensure that a block of memory allocated using
   pvPortMalloc is cleared (i.e. set to zero) when it is freed using
   vPortFree. If left undefined, configHEAP_CLEAR_MEMORY_ON_FREE
   defaults to 0 for backward compatibility. We recommend setting
   configHEAP_CLEAR_MEMORY_ON_FREE to 1 for better security.

3. Add a new API pvPortCalloc to heap_2, heap_4 and heap_5. This API
   has the following signature:
   void * pvPortCalloc( size_t xNum, size_t xSize );
   It allocates memory for an array of xNum objects each of which is of
   xSize and initializes all bytes in the allocated storage to zero. If
   allocation succeeds, it returns a pointer to the lowest byte in the
   allocated memory block. On failure, it returns a null pointer.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-02-24 10:52:10 -08:00
Felipe Torrezan
4539e1c574
Migrated RL78/IAR port to EWRL78v3+ (#461)
Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com>
2022-02-24 10:04:46 -07:00
imi415
38efd2689e
CMake: Move mpu_wrapper to ports library. (#459) 2022-02-22 08:30:09 -07:00
Ming Yue
09a2c0b324
Remove exception loop tags. (#457) 2022-02-17 15:28:04 -08:00
Ming Yue
25d180a09b
Use a dedicated symbol for in-function loop to avoid the weak symbol JAL range error when a strong symbol is defined outside. (#455) 2022-02-15 14:56:13 -08:00
Shubham Kulkarni
4a490d64a5
portable/Xtensa_ESP32: Add SPDX license identifiers (#452)
Co-authored-by: Paul Bartell <pbartell@amazon.com>
2022-02-08 16:28:07 -08:00
Gaurav-Aggarwal-AWS
d5a10e4595
Add alignment for the direct mode handler (#449)
It is still possible to further relax the alignment using linker script
if needed.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-02-08 11:51:25 -08:00
Gaurav-Aggarwal-AWS
cf248aec2d
Add support for 16 MPU regions to GCC Cortex-M33 ports (#448)
* Add support for 16 MPU regions to GCC Cortex-M33 TZ port

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Add support for 16 MPU regions to Cortex-M33 NTZ GCC port

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-02-07 16:51:19 -08:00
swaldhoer
89e4823a49
Update uncrustify configuration to 0.69 (#445)
The configuration was updated using

    uncrustify -c .github/uncrustify.cfg -o .github/uncrustify.cfg --update-config-with-doc

to align with the actually used uncrustify version used, i.e., all
configuration is now explicitly set (and no longer implicit).

The files that are common to all ports ("portable/MemMang*" and
"portable/Common/mpu_wrappers.c" are now also autoformatted.

Co-authored-by: alfred gedeon <28123637+alfred2g@users.noreply.github.com>
2022-01-28 10:48:03 -08:00
Gaurav-Aggarwal-AWS
9efca75d1e
Riscv re-factoring (#444)
* Refactor RISCV port

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Changes to make re-factoring work on ESP32-C3

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Remove alignment and place handlers in separate sections

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Correct section names

This is needed so that the assemblers correctly recognizes functions.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Move mtvec programming to the application

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Refactor mtimer udpate code

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Move critical nesting to port layer

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Respect configTASK_RETURN_ADDRESS

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Formatting changes

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-01-26 17:55:01 -08:00
yhsb2k
cdd406a62f
Add CMake build (#421)
* Add CMake build

Allows to build and link FreeRTOS using CMake build system.
From top-level project it looks like this:

set(FREERTOS_PORT_GCC_ARM_CM4F ON)
set(FREERTOS_CONFIG_FILE_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR} CACHE STRING "")
add_subdirectory(third_party/FreeRTOS-Kernel)

Where FREERTOS_PORT_GCC_ARM_CM4F is FreeRTOS port name.
freertos is target name, which can be used in target_link_libraries()

* Add feature to set custom heap source file

Example how to set it from top-level project:
set(FREERTOS_HEAP ${CMAKE_CURRENT_LIST_DIR}/path_to/my_heap.c CACHE STRING "")

* Set cmake_minimum_required to 3.15

* Fail build when FREERTOS_CONFIG_FILE_DIRECTORY not set

* Rename library to freertos_kernel

* Rework FREERTOS_PORT option to act as combobox

* Use freertos_kernel_port cmake target

* Split port sources multiline

Co-authored-by: Aniruddha Kanhere <60444055+AniruddhaKanhere@users.noreply.github.com>
Co-authored-by: Paul Bartell <pbartell@amazon.com>
2022-01-20 12:35:04 -08:00
Ming Yue
043c2c7ef6
Fix GCC/RX100 function naming error. (#440) 2022-01-13 10:30:26 -08:00
Gaurav-Aggarwal-AWS
8e2dd5b861
Add a Known Issues file in the Third Party folder (#434)
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-01-03 14:26:43 -07:00
Amit Tomar
c13719d2d0
fix alignment exception for ullPortInterruptNesting. (#317)
* fix alignment exception for ullPortInterruptNesting.

While loading (LDR X5, ullPortInterruptNestingConst) the ullPortInterruptNesting
variable, the program control seems to be stuck and there is no abort or stack
trace observed (as there is no exception handler is installed to catch unaligned
access exception).

Program control moves forward, if one just declares this varible to be 2 bytes
aligned but then varible is not updated properly.

One of my colleague, pointed out that issue is due to the fact that
ullPortInterruptNesting must be at 8 bytes aligned address but since
"vApplicationIRQHandler" (that has 4 bytes of address) is sitting between
two 8 bytes aligned addresses that forces ullPortInterruptNesting to be at
4 byte aligned address, causing all sort of mess.

It works on QEMU (on ARM64) as it is, since there is no such check for
unaligned access but on real hardware it is prohibited.

Workaround to this problem is, either we skip 4 byets (using .align 4) after
vApplicationIRQHandler declaration or declare it the end of all declarations.
This commit does the latter one.

Signed-off-by: Amit Singh Tomar <atomar25opensource@gmail.com>

* Update portASM.S

Remove 1 tab = 4 spaces

Co-authored-by: Amit Singh Tomar <atomar25opensource@gmail.com>
Co-authored-by: alfred gedeon <28123637+alfred2g@users.noreply.github.com>
Co-authored-by: Joseph Julicher <jjulicher@mac.com>
2021-12-29 13:53:10 -07:00
Fabian
481c722ef3
RISC-V: No #error on RV64 regarding byte alignment (#367)
Co-authored-by: Joseph Julicher <jjulicher@mac.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2021-12-28 11:52:33 -08:00
leona
81d15dc550
Fix: Interrut Handler Register Function and Exception Process (#41)
Signed-off-by: shiode <shiode@aptpod.co.jp>

Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com>
Co-authored-by: David Chalco <59750547+dachalco@users.noreply.github.com>
Co-authored-by: Joseph Julicher <jjulicher@mac.com>
2021-12-28 10:54:23 -07:00
Gaurav-Aggarwal-AWS
53b9a80b8e
Update third party ports readme (#428)
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-12-21 14:10:06 -08:00
Graham Sanderson
debbd254b6
RP2040 fixes (#424)
* RP2040: malloc needs to be thread safe for FreeRTOS whether both cores are used or not

* RP2040: CMake file had broken left over test code

* RP2040: portIS_FREE_RTOS_CORE() returned an incorrect value prior to scheduler init when the application was compiled without multicore support

* RP2040: Bad initialization code was causing IRQs to get disabled before main() was called when using non static allocation
2021-12-21 11:08:41 -08:00
Gaurav Aggarwal
44fc137428 Add option to disable unprivileged critical sections
This commit introduces a new config
configALLOW_UNPRIVILEGED_CRITICAL_SECTIONS which enables developers to
prevent critical sections from unprivileged tasks. It defaults to 1 for
backward compatibility. Application should set it to 0 to disable
critical sections from unprivileged tasks.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-11-15 15:09:12 -08:00
Gaurav Aggarwal
7a3848753b Change xPortRaisePrivilege and vPortResetPrivilege to macros
This prevents non-kernel code from calling these functions.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-11-15 15:09:12 -08:00
Kevin Thibedeau
cd0b7fc271
Build with -Wmissing-prototypes flags vPortYieldFromISR() in the Posix port. (#409)
There's already a portYIELD_FROM_ISR() macro that calls vPortYield() which wraps the FromISR code.
It doesn't appear that vPortYieldFromISR() is intended to be publicly accessible in this port so
I've marked it as private to silence the warning.

event_create() also got flagged due to missing void in prototype.

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2021-11-08 13:51:25 -08:00
andrewtjs
a432a688ca
bugfix: Initialise stack correctly on dsPIC port (#405)
* Use compiler predefined constants.

Use of MPLAB_DSPIC_PORT is deprecated.
2021-11-01 12:38:37 -07:00
Gaurav-Aggarwal-AWS
06fb777e43
Update comments for the ARM_CA53_64_BIT_SRE port (#403)
Mention that FreeRTOS_IRQ_Handler should not be used for FIQs and the
reason for assuming Group 1 for Interrupt Acknowledge and End Of
Interrupt registers.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-10-16 13:45:03 -07:00
Stephane Viau
68ddb32b55
Handle interrupt acknowledge register in Cortex-A53 SRE port (#392)
Let the FreeRTOS IRQ handler properly store and restore the ICCIAR
register value around the vApplicationIRQHandler() call.

Signed-off-by: Stephane Viau <stephane.viau@oss.nxp.com>

Co-authored-by: Stephane Viau <stephane.viau@oss.nxp.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2021-10-15 09:21:56 -07:00
swaldhoer
a030d0a02b
fix typo (#399) 2021-10-06 15:32:07 -07:00
Qikai
1fb4e847ed
Fix the defect that Heap_1.c may waste first portBYTE_ALIGNMENT bytes of ucHeap[] (#238)
* Fix the defect that Heap_1.c may waste first 8 bytes of ucHeap[]

* Fix the same byte waste issue in heap_2
2021-10-04 11:15:00 -07:00
Shubham Kulkarni
741185f1d0
Xtensa_ESP32: Add definition for portMEMORY_BARRIER (#395)
This fixes crash observed in Amazon FreeRTOS when optimisations are enabled
2021-09-16 14:16:22 -07:00
Gaurav-Aggarwal-AWS
1b86b39940
Remove AVR ports from main repo (#394)
These ports now exist in the
https://github.com/FreeRTOS/FreeRTOS-Kernel-Partner-Supported-Ports repo.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-09-14 19:25:46 -07:00
Gaurav Aggarwal
99a5a5fe82 Fix free secure context for Cortex-M23 ports
Update the branching condition to correctly free secure context when
there is one.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-09-10 16:44:36 -07:00
Gaurav Aggarwal
06ea7275b3 Implement secure stack sealing as per ARM's recommendation
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-09-10 16:44:36 -07:00
Gaurav Aggarwal
61f7560243 Associate secure context with task handle
The secure side context management code now checks that the secure
context being saved or restored belongs to the task being switched-out
or switched-in respectively.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-09-10 16:44:36 -07:00
Gaurav Aggarwal
ccaa0f4d6e Pre-allocate secure-side context structures
This commit improves ARMv8-M security by pre-allocating secure-side task
context structures and changing how tasks reference a secure-side
context structure when calling a secure function. The new configuration
constant secureconfigMAX_SECURE_CONTEXTS sets the number of secure
context structures to pre-allocate. secureconfigMAX_SECURE_CONTEXTS
defaults to 8 if left undefined.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-09-10 16:44:36 -07:00
Gaurav-Aggarwal-AWS
fa0f5c436c
Add freertos_risc_v_chip_specific_extensions.h for 64-bit ports (#385)
* Add freertos_risc_v_chip_specific_extensions.h for 64-bit ports

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-09-01 15:38:07 -07:00
sherryzhang
c290780e34
Update the README to align with TF-Mv1.4.0 in TF-M integration (#384)
Change-Id: I41fc8e18657086e86eacd38ed70f474555739a3c
Signed-off-by: Sherry Zhang <sherry.zhang2@arm.com>
2021-08-26 23:07:58 -07:00
Shubham Kulkarni
6ba8aa63c1
Xtensa_ESP32: Fix build issues when external SPIRAM is enabled (#381)
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2021-08-12 17:46:25 -07:00
Jack Lam
d01801807d
Tidy up the 8051 sdcc port (#376)
* Tidy up the 8051 sdcc port

* Replace tabs with spaces in SDCC Cygnal port.c file.

Co-authored-by: John Lin <shaojun.lin@delonghigroup.com>
Co-authored-by: Paul Bartell <pbartell@amazon.com>
2021-08-12 11:50:52 -07:00
Gaurav-Aggarwal-AWS
85a23127cc
Add ReadMe for third party port contributions (#371)
* Add ReadMe for third party port contributions

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-07-28 10:37:51 -07:00
Kristine Jassmann
b5a9229563
Warning fixes. (#356)
* Use cast to fix warnings.

* Remove all empty definitions of portCLEAN_UP_TCB( pxTCB ) and
  portALLOCATE_SECURE_CONTEXT( ulSecureStackSize ) from ports.
  When these are undefined, the default empty definition is defined
  in FreeRTOS.h.
2021-07-20 12:55:49 -07:00
swaldhoer
46338705bd
Replace two dashes and one whitespace with their corresponding ASCII characters. (#362) 2021-06-30 15:07:55 -07:00
Graham Sanderson
9af72db3ec
Add RP2040 support (#341)
* Add RP2040 support

* remove spurious tab/spaces comments

* add .cmake to ignored kernel checks

* Apply suggestions from code review

Co-authored-by: Paul Bartell <paul.bartell@gmail.com>

* license and end of file newline fixes

* Rename LICENSE.TXT to LICENSE.md

Co-authored-by: Paul Bartell <paul.bartell@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2021-06-30 13:20:54 -07:00
Archit Gupta
4200226708
Move the community/partner supported ports to correct location (#361) 2021-06-29 18:36:49 -07:00
Gaurav-Aggarwal-AWS
4e3bf0f5c0
Add Cortex-A53 port with system register interface for CPU interface access (#357)
The difference between this port and portable/GCC/ARM_CA53_64_BIT is
that this port uses System Register interface to access CPU interface
while the other one uses Memory-mapped interface.

Signed-off-by: Gaurav Aggarwal 
Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com>
2021-06-22 18:51:58 -07:00
RichardBarry
ddc840fd28
Make the type used to hold run-time counter values configurable (#350)
* Introduce configRUN_TIME_COUNTER_TYPE which enables developers to define the type used to hold run time statistic counters.  Defaults to uint32_t for backward compatibility.  #define configRUN_TIME_COUNTER_TYPE to a type (for example, uint64_t) in FreeRTOSConfig.h to override the default.

Introduce ulTaskGetIdleRunTimePercent() to complement the pre-existing ulTaskGetIdleRunTimeCounter().  Whereas the pre-existing function returns the raw run time counter value, the new function returns the percentage of the entire run time consumed by the idle task.  Note the amount of idle time is only a good measure of the slack time in a system if there are no other tasks executing at the idle priority, tickless
idle is not used, and configIDLE_SHOULD_YIELD is set to 0.

* Add ultaskgetidleruntimepercent to lexicon.txt.

* Update History file.
Add the MPU version of ulTaskGetIdleRunTimePercent().

* Update include/FreeRTOS.h to correct comment as per aggarg@ suggestion.
* Fix alignment in mpu_wrappers.h.
Commit changes to mpu_prototypes.h which were missed from the original commit.
2021-06-14 12:17:41 -07:00
Thomas Pedersen
6a84f2c1da
Posix: fix event_wait_timed() (#346)
event_wait_timed() was ignoring a timeout of 1000 ms.
Presumably this is because pthread_cond_timedwait() only
considers tv_nsec less than one second.

Convert the timeout in miliseconds to second and nanosecond
components to fix this.

Co-authored-by: alfred gedeon <28123637+alfred2g@users.noreply.github.com>
2021-06-10 17:15:47 -07:00
Paul Bartell
eec42331b4 Normalize files with mixed line endings (introduced in commit 3a413d1) 2021-06-01 17:55:18 -07:00
Paul Bartell
3f7e75dcd5 Add license header to wait_for_event.c and wait_for_event.h 2021-05-27 19:57:55 -07:00
Paul Bartell
b5e9896ad7 Cleanup license text in Xtensa XCC and Xtensa ESP32 GCC ports.
Add SPXD license identifiers.
2021-05-27 19:57:55 -07:00
Paul Bartell
3a413d1022 Add SPDX-License-Identifier: MIT to MIT licensed files. 2021-05-27 19:57:55 -07:00
Paul Bartell
b286f173e8 Update license text for ports that were previously missed. 2021-05-27 19:57:55 -07:00
Paul Bartell
e31dccae80 Remove "1 tab == 4 spaces!" line from files that still contain it. 2021-05-27 19:57:55 -07:00
Paul Bartell
adfc53368f Update copyright year from 2020 to 2021 2021-05-27 19:57:55 -07:00
Paul Bartell
08dc6f64ee Change kernel revision in each file header from V10.4.3 to <DEVELOPMENT BRANCH> 2021-05-27 19:57:55 -07:00
Joseph Julicher
736f2302ae
deprecating the mcf5235 port (#334) 2021-05-26 16:26:19 -07:00
j4cbo
f37bcd5c14
Wrap macros in do { ... } while( 0 ) (#240) 2021-05-24 14:41:58 -07:00
Evgeny Ermakov
ac2c383bc1
Posix: fix copyright (#250) 2021-04-21 19:08:46 -04:00
Meco Jianting Man
d8770748ff
[kernel & MemMang] use space to replace tab and remove meaningless space in the end of each line (#314)
Signed-off-by: Meco Man <920369182@qq.com>

Co-authored-by: alfred gedeon <28123637+alfred2g@users.noreply.github.com>
2021-04-19 09:58:55 -07:00
carlo-dev-git
75e0c36eb4
Code cleanup (#288)
* Update port.c

* Code cleanup

Misc coding style cleanup and typo fixes

* Fix ASM style

Fix ASM style

* Fix header check

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

Co-authored-by: Carl Lundin <53273776+lundinc2@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2021-04-07 14:19:31 -07:00
Tobias Schulte
cb7bef09f2
Adjust portPOINTER_SIZE_TYPE to correct size (#275)
* Adjust portPOINTER_SIZE_TYPE to correct size

portPOINTER_SIZE_TYPE wasn't yet set correctly to be 16 bit

* Fixed FreeRTOS file header to comply with automatic checks

Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com>
2021-03-19 15:35:21 -07:00
carlo-dev-git
49c38f08de
Update port.c (#283) 2021-03-19 15:22:22 -07:00
David Chalco
578d040659
Add git attributes (#245)
* Add .gitattributes configured to normailze line endings to LF

* replace crlf with lf, per .gitattributes
2021-01-15 12:04:31 -07:00
Thomas Pedersen
23f641850d
Posix: fix build failure (#235)
Fixes: a48f137896 ("Posix Port: Comment and remove unused variables (#230)")

Authored-by: Thomas Pedersen <thomas@adapt-ip.com>
2021-01-08 14:19:15 -08:00
Shubham Kulkarni
ef4c305244
Update ESP32 port to ESP-IDF release v4.2 and add ESP-IDF version check (#231)
* Revert "Reintroduce Espressif's IDF v4.2 changes to ESP32 port (#193)"

This reverts commit 3d4d17178f.

* Update ESP32 port files to work with ESP-IDF v4.2 as well as ESP-IDF v3.3

Add changes required to support ESP32-S2

* portmacro.h: Change return type of vApplicationSleep to void

This fixes build failure when automatic light sleep is enabled

* prevent header checks for files with different licensing

Co-authored-by: David Chalco <david@chalco.io>
2020-12-22 13:00:45 -08:00
sherryzhang
8e99e2d38b
Align the TF-M version of the integration with kernel to version TF-Mv1.2.0 (#228)
Change-Id: I6d5f0732f4cb123df54b9df0b9820ef4dcf70fa4
Signed-off-by: Sherry Zhang <sherry.zhang2@arm.com>
2020-12-15 09:17:20 -08:00
Cobus van Eeden
ec62f69dab [AUTO][RELEASE]: Bump file header version to "10.4.3" 2020-12-14 10:13:39 -08:00
alfred gedeon
a48f137896
Posix Port: Comment and remove unused variables (#230)
* Posix Port: Comment and remove unused variables
* Fix header, replace tabs with spaces
2020-12-13 17:33:45 -08:00
Cobus van Eeden
c7a9a01c94
Improve heap2 bounds checking (#224)
* Improve heap bounds checking in pvPortMalloc
2020-12-07 10:36:27 -08:00
Gaurav-Aggarwal-AWS
b5020cb3d8
Prevent unprivileged task from altering MPU configuration (#227)
This change removes the FreeRTOS System Calls (aka MPU wrappers) for the
following kernel APIs:
- xTaskCreateRestricted
- xTaskCreateRestrictedStatic
- vTaskAllocateMPURegions

A system call allows an unprivileged task to execute a kernel API which
is otherwise accessible to privileged software only. The above 3 APIs
can create a new task with a different MPU configuration or alter the
MPU configuration of an existing task. This an be (mis)used by an
unprivileged task to grant itself access to a region which it does not
have access to.

Removing the system calls for these APIs ensures that an unprivileged
task cannot execute this APIs. If an unprivileged task attempts to
execute any of these API, it will result in a Memory Fault.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-12-07 09:53:22 -08:00
David Chalco
337bca615e [AUTO][RELEASE]: Bump file header version to "10.4.2" 2020-11-10 14:42:58 -08:00
Gaurav-Aggarwal-AWS
ebbe2cf854
Ensure interrupts are enabled at first task start (#214)
Critical sections in FreeRTOS are implemented using the following two
functions:

void vPortEnterCritical( void )
{
    portDISABLE_INTERRUPTS();
    uxCriticalNesting++;
}

void vPortExitCritical( void )
{
    uxCriticalNesting--;

    if( uxCriticalNesting == 0 )
    {
        portENABLE_INTERRUPTS();
    }
}

uxCriticalNesting is initialized to a large value at the start and set
to zero when the scheduler is started (xPortStartScheduler). As a
result, before the scheduler is started, a pair of enter/exit critical
section will leave the interrupts disabled because uxCriticalNesting
will not reach zero in the vPortExitCritical function. This is done to
ensure that the interrupts remain disabled from the time first FreeRTOS
API is called to the time when the scheduler is started. The scheduler
starting code is expected to enure that interrupts are enabled before
the first task starts executing.

Cortex-M33 ports were not enabling interrupts before starting the first
task and as a result, the first task was started with interrupts
disabled. This PR fixes the issue by ensuring that interrupts are
enabled before the first task is started.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-11-05 09:26:56 -08:00
filipgeorge
1431b65110
porthardware.h file update for AVR Mega0 and Dx (#212)
* Added guard for ioavr.h include in AVR Dx porthardware.h file.
* Added guard for ioavr.h include in AVR Mega0 porthardware.h file.
2020-10-27 12:26:52 -07:00
Carl Lundin
6a5784598a
Upstream stack masking fix to GCC ports. (#210)
Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com>
2020-10-27 11:32:09 -07:00
Jon Snow
bdb38d85dc
update interrupt vector names for ATMega32 (#196) 2020-10-26 13:31:15 -07:00
magicse7en
82df39764a
Xtensa: fix the coproc_area incorrect issue (#117)
* Xtensa: fix the coproc_area incorrect issue

foss-xtensa/amazon-freertos#2 mentioned a issue:
1.
In function pxPortInitialiseStack(StackType_t *pxTopOfStack....)
p = (uint32_t *)(((uint32_t) pxTopOfStack - XT_CP_SIZE) & ~0xf);

In function prvInitialiseNewTask (file: task.c)
pxTopOfStack = (pxStack + (ulStackDepth - 1)) & (~portBYTE_ALIGNMENT_MASK)

So the co-processor area is at
p = (uint32_t *)(((uint32_t)((pxStack + (ulStackDepth - 1)) & (~portBYTE_ALIGNMENT_MASK)) - XT_CP_SIZE) & ~0xf);

2.
In function vPortStoreTaskMPUSettings( .... , StackType_t pxBottomOfStack ...)
xMPUSettings->coproc_area = (StackType_t)((((uint32_t)(pxBottomOfStack + usStackDepth - 1)) - XT_CP_SIZE) & ~0xf);

pxBottomOfStack = pxStack

=> xMPUSettings->coproc_area = (StackType_t*)((((uint32_t)(pxStack+ ulStackDepth - 1)) - XT_CP_SIZE ) & ~0xf);

The p is coproc_area that should be equal to xMPUSettings->coproc_area.

For example, assume pxStack is 0xa0000000, ulStackDepth is 0x2000,
portBYTE_ALIGNMENT_MASK is 0x7f, XT_CP_SIZE is 0x100.

The p = (uint32_t)(((uint32_t)((pxStack + (ulStackDepth - 1)) & (~portBYTE_ALIGNMENT_MASK)) - XT_CP_SIZE) & ~0xf)
      = 0xa0001e80
The xMPUSettings->coproc_area = (StackType_t)((((uint32_t)(pxStack+ usStackDepth - 1)) - XT_CP_SIZE ) & ~0xf)
                              = 0xa0001ef0
Obviously, the p is not equal to the xMPUSettings->coproc_area, which will cause context switching error.

Signed-off-by: magicse7en <magicse7en@outlook.com>

* Update port.c

Co-authored-by: Carl Lundin <53273776+lundinc2@users.noreply.github.com>
2020-10-26 11:47:21 -07:00
magicse7en
b9748e50ea
Xtensa: fix stack overlap coproc_area issue (#118)
In function pxPortInitialiseStack of port.c:
	sp = ( StackType_t * ) ( ( ( UBaseType_t ) ( pxTopOfStack + 1 )  - XT_CP_SIZE - XT_STK_FRMSZ ) & ~0xf );
We assume XT_CP_SIZE is 0xE4, XT_STK_FRMSZ is 0xA0, pxTopOfStack is 0xA0000000, sp is 0x9FFFFE80.
From port.c, we know the frame->a1 as below:
	frame->a1 = ( UBaseType_t ) sp + XT_STK_FRMSZ;  /* physical top of stack frame    */
So frame->a1 is 0x9FFFFF20. Therefore the interrupt stack frame range is 0x9FFFFE80 ~ 0x9FFFFF20.

The coproc_area is: p = ( uint32_t * ) ( ( ( uint32_t ) pxTopOfStack - XT_CP_SIZE ) & ~0xf );
So its value is 0x9FFFFF10. Obviously, the interrupt stack frame overlaps the coproc_area.

Co-authored-by: Carl Lundin <53273776+lundinc2@users.noreply.github.com>
2020-10-26 11:07:32 -07:00
RichardBarry
5fb26de019
Recently vTaskDelayUntil() was updated to xTaskDelayUntil() because the function now returns a value. The PR didn't make the same change in the MPU port, or update the constants required to include the xTaskDelayUntil() function in the build. (#199)
This PR:
Changes the INCLUDE_vTaskDelayUntil compile time constant to INCLUDE_xTaskDelayUntil.
Updates FreeRTOS.h to ensure backward compatibility for projects that already have INCLUDE_vTaskDelayUntil defined.
Updates the MPU prototypes, wrapper and implementation to use the updated xTaskDelayUntil() function.

Tests to be checked into the FreeRTOS/FreeRTOS repository after this PR.
2020-10-11 14:04:49 -07:00
Joseph Julicher
6375d52250
matching the preprocessor conditionals for xTaskGetCurrentTaskHandle() (#197) 2020-10-08 18:44:30 -07:00
Carl Lundin
3d4d17178f
Reintroduce Espressif's IDF v4.2 changes to ESP32 port (#193)
* Renamed old port to ESP_IDF_V3

* Update ESP32 port files to support IDF v4.2.

* Add changes required to support ESP32-S2

Co-authored-by: Shubham Kulkarni <shubham.kulkarni@espressif.com>
2020-10-08 11:03:27 -07:00
Reda Maher
77ad717400
Posix: Fix no task switching issue if a task ended its main function (#184)
* Posix: Fix no task switching issue if a task ended

When the main function of a task exits, no task switching happened.
This is because all the remaining tasks are waiting on the condition
variable. The fix is to trigger a task switch and mark the exiting
task as "Dying" to be suspened and exited properly from the scheduler.

* Posix: Assert and stop if the Task function returned

* Posix: just assert if a task returned from its main function

Co-authored-by: alfred gedeon <alfred2g@hotmail.com>
2020-10-05 18:06:51 -07:00
Reda Maher
baeb5af9a4
Posix: Free the allocated memory after deleting a task or ending the scheduler (#181)
* Posix: Free Idle task resources after ending the scheduler

In case of using Posix simulator and ending the scheduler, it does
not free the resources allocated by the idle task. This
causes the memory checkers (Valgrind, Address Sanitizers, ..) to
complain.

* Posix: Free the condition variable memory in the correct place

In case of deleting a task from another task, the deletion happens
immediately and the thread is canceled but the memory allocated by
the task condition variable is not freed. This causes the memory
checkers (Valgrind, Address sanitizers, ..) to complain.

* Posix: End Timer thread and free its resources after ending the scheduler
2020-09-29 14:06:10 -07:00
Gaurav-Aggarwal-AWS
2225bb5620
Fix Stack alignment for Microchip PIC32MX port (#182)
* Fix Stack alignment for Microchip PIC32MX port

The stack of a task was not 8 byte aligned. Adding one more unused space
at the beginning of task stack (before simulated context) ensures that
the stack is 8 byte aligned. The stack (with simulated context) of a
newly created task looks like the following:

                    +------------+
                    | UNUSED     |
                    +------------+
                    | UNUSED     |
                    +------------+
                    | 0xDEADBEEF |
                    +------------+
                    | 0x12345678 |
                ^   +------------+
                |   | CAUSE      | <-- SP After Context Restore
                |   +------------+
                |   | STATUS     |
                |   +------------+
                |   | EPC        |
                |   +------------+
                |   | ra         |
                |   +------------+
                |   | s8         |
                |   +------------+
                |   | t9         |
                |   +------------+
                |   | t8         |
                |   +------------+
                |   | t7         |
                |   +------------+
                |   | t6         |
                |   +------------+
                |   | t5         |
                |   +------------+
                |   | t4         |
                |   +------------+
                |   | t3         |
                |   +------------+
                |   | t2         |
                |   +------------+
                |   | t1         |
                |   +------------+
    Context     |   | t0         |
  (132 bytes)   |   +------------+
                |   | a3         |
                |   +------------+
                |   | a2         |
                |   +------------+
                |   | a1         |
                |   +------------+
                |   | a0         |
                |   +------------+
                |   | v1         |
                |   +------------+
                |   | v0         |
                |   +------------+
                |   | s7         |
                |   +------------+
                |   | s6         |
                |   +------------+
                |   | s5         |
                |   +------------+
                |   | s4         |
                |   +------------+
                |   | s3         |
                |   +------------+
                |   | s2         |
                |   +------------+
                |   | s1         |
                |   +------------+
                |   | s0         |
                |   +------------+
                |   | at         |
                |   +------------+
                |   | HI         |
                |   +------------+
                |   | LO         |
                |   +------------+
                V   |            |
                    +------------+
                    |            | <-- SP After Context Save
                    +------------+

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Update comment

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-09-28 00:16:18 -07:00
NoMaY (a user of Japan.RenesasRulz.com)
c3117b4237
Maintenance: Add readme.txt in each Renesas RX folder to show recommended port (#152)
* Maintenance: Add readme.txt in each Renesas RX folder to show recomended port
* Update readme.txt in each Renesas RX folder regarding to Notes *1 and *2 (both are RX100 port)
2020-09-28 00:09:49 -07:00
alfred gedeon
d428209d01
Fix some broken/redirected URL (#172)
* Style: fix some broken/redirect links

* Fix: atmel url

* Fix microchip typo

* Fix url links

* Fix shortcut link

* Comment: fix line wrapping

* Style: fix line wrapping to 80 chars

* Add now microchip beside Atmel

* Fix link in History

* Add Now Microchip before Atmel link

* Comment: add *
2020-09-21 15:49:55 -07:00
Cobus van Eeden
385e700953
Update History.txt and fix versioning in asm files (#177) 2020-09-18 08:05:13 -07:00
David Chalco
3604527e3b
Update version number to 10.4.1 (#173) 2020-09-17 15:25:15 -07:00
NoMaY (a user of Japan.RenesasRulz.com)
242808132c
Fix broken #warning message in ARM_CMx_MPU/portmacro.h between 10.3.1 and 10.4.0 (#171) 2020-09-15 01:55:55 -07:00
RichardBarry
85768bb3e0
Sets the version number to 10.4.0 in assembly files. The (#166)
assembly files were missed when the other source files had
their version numbers updated.
2020-09-14 09:49:46 -07:00
David Chalco
5dfab0306b
Update version number to 10.4.0 (#153) 2020-09-10 19:49:34 -07:00
alfred gedeon
16bc35c21c
Fix: Comment - xTaskIncrementTick loop - to adhere to demo requirement (#162)
Co-authored-by: Alfred Gedeon <gedeonag@amazon.com>
2020-09-10 14:36:34 -07:00
Joseph Julicher
2f14899ce8
Revert "RISC-V: Add RV32E / FPU support for GCC (#140)" (#163)
This reverts commit 0037a6c574.
2020-09-10 12:46:15 -07:00
Cobus van Eeden
cfb51b3db8
Add url link for Linux Simulator documentation (#161) 2020-09-09 14:35:52 -07:00
Emmanuel Puerto
0037a6c574
RISC-V: Add RV32E / FPU support for GCC (#140)
* Change vPortSetupTimerInterrupt in order to have 64bits access on rv64

* Support RV32E - RISC-V architecture (GCC)

Signed-off-by: Emmanuel Puerto <emmanuel.puerto@sifive.com>

* Support FPU - RISC-V architecture (GCC)

Signed-off-by: Emmanuel Puerto <emmanuel.puerto@sifive.com>

* Fix interrupt managment and FPU initialization
2020-09-09 11:06:16 -07:00
sherryzhang
524e78d58b
Introduce Trusted Firmware M support in Kernel on ARM Cortex M33 (#108)
This port adds the support that FreeRTOS applications can call the secure
    services in Trusted Firmware M(TF-M) via PSA Platform Security
    Architecture(PSA) API based on Arm Cortex-M33 platform with GCC compiler.

    More information:
    PSA - https://www.arm.com/why-arm/architecture/platform-security-architecture
    TF-M - https://git.trustedfirmware.org/trusted-firmware-m.git/

Change-Id: I2e771b66e8d75927abc2505a187a16250d504db2
Signed-off-by: Sherry Zhang <sherry.zhang2@arm.com>
2020-09-09 08:15:50 -07:00
YuguoWH
651289ef04
Synopsys ARC v1 Port: add support to Synopsys ARC v1 series cores (#110)
* Synopsys Port: Adding support to Synopsys ARC v1 series cores
ARC v1 cores include ARC605, ARC610d, and ARC710d

Signed-off-by: Yuguo Zou <yuguo.zou@synopsys.com>

* Synopsys ARC v1 port: run uncrustify to fix code style

Signed-off-by: Yuguo Zou <yuguo.zou@synopsys.com>

* Synopsys port: modify license headers, change copyright only

Signed-off-by: Yuguo Zou <yuguo.zou@synopsys.com>
2020-09-08 08:40:17 -07:00
alfred gedeon
35f0b2ab84
Change the Linux Port to use condition variables instead of Signals (#156)
* Posix port with pthread cond instead of signals
* Comment: replace signal with pthread_cond
Co-authored-by: Alfred Gedeon <gedeonag@amazon.com>
2020-09-07 09:56:28 -07:00
Ming Yue
82fdc1c3ee
Change the header file name into lower case so it can work on GNU/Linux for MinGW cross-compiling. (#144) 2020-08-28 14:59:30 -07:00
alfred gedeon
148c81a7bc
Revert "Fix: Add Parenthesis around if-statement in macro (#138)" (#148)
This reverts commit 45e97bd246.
2020-08-28 14:19:31 -07:00
Ming Yue
58ffcb1a6d
Revert "Fix race condition when tracing is enabled (#95)" (#149)
This reverts commit 61635d5b8b.
2020-08-28 14:17:29 -07:00
Cobus van Eeden
d7fd5a1195
Revert "Fix inaccurate ticks in windows port (#142)" (#143)
This reverts commit d85fd461d9.
2020-08-27 12:06:03 -07:00
Cobus van Eeden
d85fd461d9
Fix inaccurate ticks in windows port (#142) 2020-08-27 10:12:51 -07:00
alfred gedeon
45e97bd246
Fix: Add Parenthesis around if-statement in macro (#138)
Co-authored-by: Alfred Gedeon <gedeonag@amazon.com>
2020-08-26 10:50:35 -07:00