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FreeRTOS-Kernel/FreeRTOS/Source/portable/MPLAB/PIC32MX/ISR_Support.h

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/*
FreeRTOS V7.5.3 - Copyright (C) 2013 Real Time Engineers Ltd.
All rights reserved
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VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that has become a de facto standard. *
* *
* Help yourself get started quickly and support the FreeRTOS *
* project by purchasing a FreeRTOS tutorial book, reference *
* manual, or both from: http://www.FreeRTOS.org/Documentation *
* *
* Thank you! *
* *
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***************************************************************************
This file is part of the FreeRTOS distribution.
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FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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>>! NOTE: The modification to the GPL is included to allow you to distribute
>>! a combined work that includes FreeRTOS without being obliged to provide
>>! the source code for proprietary components outside of the FreeRTOS
>>! kernel.
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FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available from the following
link: http://www.freertos.org/a00114.html
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***************************************************************************
* *
* Having a problem? Start by reading the FAQ "My application does *
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* not run, what could be wrong?" *
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* *
* http://www.FreeRTOS.org/FAQHelp.html *
* *
***************************************************************************
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http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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license and Real Time Engineers Ltd. contact details.
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http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
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mission critical applications that require provable dependability.
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*/
#include "FreeRTOSConfig.h"
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#define portCONTEXT_SIZE 132
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#define portEPC_STACK_LOCATION 124
#define portSTATUS_STACK_LOCATION 128
/******************************************************************/
.macro portSAVE_CONTEXT
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/* Make room for the context. First save the current status so we can
manipulate it, and the cause and EPC registers so we capture their
original values in case of interrupt nesting. */
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mfc0 k0, _CP0_CAUSE
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addiu sp, sp, -portCONTEXT_SIZE
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mfc0 k1, _CP0_STATUS
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/* Also save s6 and s5 so we can use them during this interrupt. Any
nesting interrupts should maintain the values of these registers
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across the ISR. */
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sw s6, 44(sp)
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sw s5, 40(sp)
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sw k1, portSTATUS_STACK_LOCATION(sp)
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/* Enable interrupts above the current priority. */
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srl k0, k0, 0xa
ins k1, k0, 10, 6
ins k1, zero, 1, 4
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/* s5 is used as the frame pointer. */
add s5, zero, sp
/* Check the nesting count value. */
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la k0, uxInterruptNesting
lw s6, (k0)
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/* If the nesting count is 0 then swap to the the system stack, otherwise
the system stack is already being used. */
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bne s6, zero, .+20
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nop
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/* Swap to the system stack. */
la sp, xISRStackTop
lw sp, (sp)
/* Increment and save the nesting count. */
addiu s6, s6, 1
sw s6, 0(k0)
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/* s6 holds the EPC value, this is saved after interrupts are re-enabled. */
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mfc0 s6, _CP0_EPC
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/* Re-enable interrupts. */
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mtc0 k1, _CP0_STATUS
/* Save the context into the space just created. s6 is saved again
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here as it now contains the EPC value. No other s registers need be
saved. */
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sw ra, 120(s5)
sw s8, 116(s5)
sw t9, 112(s5)
sw t8, 108(s5)
sw t7, 104(s5)
sw t6, 100(s5)
sw t5, 96(s5)
sw t4, 92(s5)
sw t3, 88(s5)
sw t2, 84(s5)
sw t1, 80(s5)
sw t0, 76(s5)
sw a3, 72(s5)
sw a2, 68(s5)
sw a1, 64(s5)
sw a0, 60(s5)
sw v1, 56(s5)
sw v0, 52(s5)
sw s6, portEPC_STACK_LOCATION(s5)
sw $1, 16(s5)
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/* s6 is used as a scratch register. */
mfhi s6
sw s6, 12(s5)
mflo s6
sw s6, 8(s5)
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/* Update the task stack pointer value if nesting is zero. */
la s6, uxInterruptNesting
lw s6, (s6)
addiu s6, s6, -1
bne s6, zero, .+20
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nop
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/* Save the stack pointer. */
la s6, uxSavedTaskStackPointer
sw s5, (s6)
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.endm
/******************************************************************/
.macro portRESTORE_CONTEXT
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/* Restore the stack pointer from the TCB. This is only done if the
nesting count is 1. */
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la s6, uxInterruptNesting
lw s6, (s6)
addiu s6, s6, -1
bne s6, zero, .+20
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nop
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la s6, uxSavedTaskStackPointer
lw s5, (s6)
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/* Restore the context. */
lw s6, 8(s5)
mtlo s6
lw s6, 12(s5)
mthi s6
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lw $1, 16(s5)
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/* s6 is loaded as it was used as a scratch register and therefore saved
as part of the interrupt context. */
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lw s6, 44(s5)
lw v0, 52(s5)
lw v1, 56(s5)
lw a0, 60(s5)
lw a1, 64(s5)
lw a2, 68(s5)
lw a3, 72(s5)
lw t0, 76(s5)
lw t1, 80(s5)
lw t2, 84(s5)
lw t3, 88(s5)
lw t4, 92(s5)
lw t5, 96(s5)
lw t6, 100(s5)
lw t7, 104(s5)
lw t8, 108(s5)
lw t9, 112(s5)
lw s8, 116(s5)
lw ra, 120(s5)
/* Protect access to the k registers, and others. */
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di
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/* Decrement the nesting count. */
la k0, uxInterruptNesting
lw k1, (k0)
addiu k1, k1, -1
sw k1, 0(k0)
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lw k0, portSTATUS_STACK_LOCATION(s5)
lw k1, portEPC_STACK_LOCATION(s5)
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/* Leave the stack how we found it. First load sp from s5, then restore
s5 from the stack. */
add sp, zero, s5
lw s5, 40(sp)
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addiu sp, sp, portCONTEXT_SIZE
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mtc0 k0, _CP0_STATUS
mtc0 k1, _CP0_EPC
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eret
nop
.endm