feat: fixup use in kernel

kernel/Cargo.lock

@@ -2,6 +2,16 @@
 # It is not intended for manual editing.
 version = 3
 
+[[package]]
+name = "allocator"
+version = "0.1.0"
+dependencies = [
+ "spin 0.9.8",
+ "static_assertions",
+ "utils",
+ "vspace",
+]
+
 [[package]]
 name = "api"
 version = "0.1.0"
@@ -62,6 +72,7 @@ checksum = "784a4df722dc6267a04af36895398f59d21d07dce47232adf31ec0ff2fa45e67"
 name = "kernel"
 version = "0.1.0"
 dependencies = [
+ "allocator",
  "api",
  "bitflags 2.5.0",
  "cfg-if",
@@ -75,6 +86,8 @@ dependencies = [
  "spin 0.9.8",
  "static_assertions",
  "uart_16550",
+ "utils",
+ "vspace",
 ]
 
 [[package]]
@@ -235,6 +248,22 @@ version = "1.0.12"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "3354b9ac3fae1ff6755cb6db53683adb661634f67557942dea4facebec0fee4b"
 
+[[package]]
+name = "utils"
+version = "0.1.0"
+dependencies = [
+ "vspace",
+]
+
+[[package]]
+name = "vspace"
+version = "0.1.0"
+dependencies = [
+ "bitflags 2.5.0",
+ "num-derive",
+ "num-traits",
+]
+
 [[package]]
 name = "x86"
 version = "0.52.0"

kernel/Cargo.toml

@@ -8,7 +8,7 @@ edition = "2021"
 [features]
 default = ["riscv.board.virt", "log_color"]
 
-legacy = []
+legacy = ["utils/legacy", "vspace/legacy"]
 
 riscv = []
 
@@ -33,9 +33,12 @@ panic = "abort"
 lto = "thin"
 
 [dependencies]
+allocator = { path = "../lib/allocator" }
 api = { path = "../api" }
+utils = { path = "../lib/utils", default-features = false }
+vspace = { path = "../lib/vspace", default-features = false }
 
-bitflags = "2.4"
+bitflags = "2.5"
 cfg-if = "1.0"
 fdt = "0.1"
 lazy_static = { version = "1.4", features = ["spin_no_std"] }

kernel/build.rs

@@ -9,7 +9,7 @@ fn main() {
     const TARGET_LDS: &[TargetConfig] = &[
         TargetConfig {
             target: "riscv64",
-            lds:    "src/arch/riscv/linker.ld",
+            lds:    "src/arch/riscv/linker64.ld",
         },
         TargetConfig {
             target: "riscv32",

kernel/src/arch/mod.rs

@@ -1,7 +1,4 @@
-pub use arch::*;
-
-// Arch Level
 #[cfg(feature = "riscv")]
-#[path = "riscv/mod.rs"]
-#[allow(clippy::module_inception)]
-mod arch;
+mod riscv;
+#[cfg(feature = "riscv")]
+pub use riscv::*;

kernel/src/arch/riscv/entry.rs

@@ -1,9 +1,6 @@
-use super::board::console::init_early_console;
-use super::vspace::utils::setup_kernel_paging;
 use crate::arch::layout::zero_bss;
-use crate::arch::vspace::utils::setup_memory;
-use crate::vspace::allocator::RamBlock;
-use fdt::Fdt;
+use crate::arch::vspace::utils::{setup_kernel_paging, setup_memory};
+use allocator::RamBlock;
 
 #[naked]
 #[no_mangle]

kernel/src/arch/riscv/layout.rs

@@ -1,7 +1,7 @@
-use crate::utils::extern_addr::ExternSymbol;
-use crate::utils::size::KIB;
-use crate::vspace::addr::{AddressOps, PhysAddr, VirtAddr};
 use core::alloc::Layout;
+use utils::extern_addr::ExternSymbol;
+use utils::size::KIB;
+use vspace::addr::{AddressOps, PhysAddr, VirtAddr};
 
 extern "C" {
     pub static KERNEL_START: ExternSymbol;

kernel/src/arch/riscv/mod.rs

@@ -12,6 +12,7 @@ cfg_if! {
 }
 
 // Console: plat/console.rs
+pub use board::console::init_early_console;
 pub use board::console::EarlyConsole;
 
 mod entry;

kernel/src/arch/riscv/vspace/entry.rs

@@ -1,6 +1,7 @@
-use crate::vspace::addr::{AddressOps, PhysAddr};
-use crate::vspace::paging::{EntryOps, MapAttr};
+use super::traits::PhysAddrPaging;
 use bitflags::bitflags;
+use vspace::addr::PhysAddr;
+use vspace::paging::{EntryOps, MapAttr};
 
 bitflags! {
     #[derive(Debug)]
@@ -79,45 +80,6 @@ assert_eq_size!(Entry, u64);
 #[cfg(feature = "riscv.pagetable.sv32")]
 assert_eq_size!(Entry, u32);
 
-#[cfg(feature = "riscv.pagetable.sv32")]
-impl PhysAddr {
-    const PA_PPN_MASK: usize = ((1 << Self::PPN_BITS) - 1) << Self::PG_OFFSET;
-    const PG_OFFSET: usize = 12;
-    const PPN_BITS: usize = 22;
-    const PPN_OFFSET: usize = 10;
-    const PTE_PPN_MASK: usize = ((1 << Self::PPN_BITS) - 1) << Self::PPN_OFFSET;
-}
-
-#[cfg(feature = "riscv.pagetable.sv39")]
-impl PhysAddr {
-    const PA_PPN_MASK: usize = ((1 << Self::PPN_BITS) - 1) << Self::PG_OFFSET;
-    const PG_OFFSET: usize = 12;
-    const PPN_BITS: usize = 44;
-    const PPN_OFFSET: usize = 10;
-    const PTE_PPN_MASK: usize = ((1 << Self::PPN_BITS) - 1) << Self::PPN_OFFSET;
-}
-
-impl PhysAddr {
-    pub fn to_ppn(self) -> usize {
-        (self.as_usize() & Self::PA_PPN_MASK) >> Self::PG_OFFSET
-    }
-
-    fn to_ppn_shifted(self) -> usize {
-        self.to_ppn() << Self::PPN_OFFSET
-    }
-
-    fn from_pte(pte: usize) -> Self {
-        let ppn = (pte & Self::PTE_PPN_MASK) >> Self::PPN_OFFSET;
-        let paddr = ppn << Self::PG_OFFSET;
-        PhysAddr::from(paddr)
-    }
-
-    fn merge_pte(self, pte: usize) -> usize {
-        let ppn = self.to_ppn_shifted();
-        (pte & !Self::PTE_PPN_MASK) | ppn
-    }
-}
-
 #[derive(Clone, Copy, Default)]
 pub struct Entry(usize);
 

kernel/src/arch/riscv/vspace/mod.rs

@@ -1,6 +1,4 @@
 mod entry;
 mod table;
+mod traits;
 pub mod utils;
-
-pub use entry::Entry;
-pub use table::Table;

kernel/src/arch/riscv/vspace/table.rs

@@ -1,63 +1,9 @@
+use super::entry::Entry;
+use super::traits::{TableLevelSize, VirtAddrPaging};
 use crate::arch::layout::{kernel_phys_to_virt, PAGE_SIZE};
-use crate::utils::size::*;
-use crate::vspace::addr::*;
-use crate::vspace::paging::*;
 use num_traits::ToPrimitive;
-
-#[cfg(feature = "riscv.pagetable.sv32")]
-impl VirtAddr {
-    const PG_OFFSET: usize = 12;
-    const VPN_BITS: usize = 10;
-    const VPN_MASK: usize = (1 << Self::VPN_BITS) - 1;
-}
-
-#[cfg(feature = "riscv.pagetable.sv39")]
-impl VirtAddr {
-    const PG_OFFSET: usize = 12;
-    const VPN_BITS: usize = 9;
-    const VPN_MASK: usize = (1 << Self::VPN_BITS) - 1;
-}
-
-impl VirtAddr {
-    fn to_vpn(self, level: TableLevel) -> usize {
-        self.0 >> (Self::PG_OFFSET + Self::VPN_BITS * level.to_usize().unwrap()) & Self::VPN_MASK
-    }
-
-    fn merge_vpn(&self, vpn: usize, size: TableLevel) -> Self {
-        let shift = Self::PG_OFFSET + Self::VPN_BITS * size.to_usize().unwrap();
-        let mask = Self::VPN_MASK << shift;
-        VirtAddr((self.0 & !mask) | ((vpn & Self::VPN_MASK) << shift))
-    }
-
-    fn lower_bits(self, level: usize) -> usize {
-        self.0 & ((1 << (Self::PG_OFFSET + Self::VPN_BITS * (level + 1))) - 1)
-    }
-}
-
-impl TableLevel {
-    pub fn level_size(&self) -> usize {
-        match self {
-            Self::Level0 => 4 * KIB,
-            #[cfg(feature = "riscv.pagetable.sv32")]
-            Self::Level1 => 4 * MIB,
-            #[cfg(not(feature = "riscv.pagetable.sv32"))]
-            Self::Level1 => 2 * MIB,
-            Self::Level2 => 1 * GIB,
-            #[cfg(not(feature = "legacy"))]
-            Self::Level3 => 512 * GIB,
-            #[cfg(not(feature = "legacy"))]
-            Self::Level4 => 256 * TIB,
-        }
-    }
-
-    pub fn align<A: AddressOps>(&self, addr: A) -> A {
-        addr.align_down(self.level_size())
-    }
-
-    pub fn is_aligned<A: AddressOps>(&self, addr: A) -> bool {
-        self.align(addr) == addr
-    }
-}
+use vspace::addr::*;
+use vspace::paging::*;
 
 #[repr(C, align(4096))]
 pub struct Table {
@@ -84,6 +30,17 @@ impl Table {
             table = unsafe { Self::new(kernel_phys_to_virt(entry.addr()).as_usize().into()) };
         }
     }
+
+    pub fn mode() -> riscv::register::satp::Mode {
+        #[cfg(feature = "riscv.pagetable.sv32")]
+        return riscv::register::satp::Mode::Sv32;
+        #[cfg(feature = "riscv.pagetable.sv39")]
+        return riscv::register::satp::Mode::Sv39;
+        #[cfg(feature = "riscv.pagetable.sv48")]
+        return riscv::register::satp::Mode::Sv48;
+        #[cfg(feature = "riscv.pagetable.sv57")]
+        return riscv::register::satp::Mode::Sv57;
+    }
 }
 
 impl TableOps for Table {

kernel/src/arch/riscv/vspace/traits.rs

@@ -0,0 +1,113 @@
+use num_traits::ToPrimitive;
+use utils::size::{GIB, KIB, MIB, TIB};
+use vspace::addr::{AddressOps, PhysAddr, VirtAddr};
+use vspace::paging::TableLevel;
+
+pub trait PhysAddrPaging {
+    const PG_OFFSET: usize;
+    const PPN_BITS: usize;
+    const PPN_OFFSET: usize;
+
+    const PA_PPN_MASK: usize = ((1 << Self::PPN_BITS) - 1) << Self::PG_OFFSET;
+    const PTE_PPN_MASK: usize = ((1 << Self::PPN_BITS) - 1) << Self::PPN_OFFSET;
+
+    fn to_ppn(&self) -> usize
+    where Self: AddressOps {
+        (self.as_usize() & Self::PA_PPN_MASK) >> Self::PG_OFFSET
+    }
+
+    fn to_ppn_shifted(&self) -> usize
+    where Self: PhysAddrPaging + AddressOps {
+        self.to_ppn() << Self::PPN_OFFSET
+    }
+
+    fn from_pte(pte: usize) -> PhysAddr {
+        let ppn = (pte & Self::PTE_PPN_MASK) >> Self::PPN_OFFSET;
+        let paddr = ppn << Self::PG_OFFSET;
+        PhysAddr::from(paddr)
+    }
+
+    fn merge_pte(&self, pte: usize) -> usize
+    where Self: PhysAddrPaging + AddressOps {
+        let ppn = self.to_ppn_shifted();
+        (pte & !Self::PTE_PPN_MASK) | ppn
+    }
+}
+
+#[cfg(feature = "riscv.pagetable.sv32")]
+impl PhysAddrPaging for PhysAddr {
+    const PG_OFFSET: usize = 12;
+    const PPN_BITS: usize = 22;
+    const PPN_OFFSET: usize = 10;
+}
+
+#[cfg(feature = "riscv.pagetable.sv39")]
+impl PhysAddrPaging for PhysAddr {
+    const PG_OFFSET: usize = 12;
+    const PPN_BITS: usize = 44;
+    const PPN_OFFSET: usize = 10;
+}
+
+pub trait VirtAddrPaging {
+    const PG_OFFSET: usize;
+    const VPN_BITS: usize;
+
+    const VPN_MASK: usize = (1 << Self::VPN_BITS) - 1;
+
+    fn to_vpn(&self, level: TableLevel) -> usize
+    where Self: AddressOps {
+        self.as_usize() >> (Self::PG_OFFSET + Self::VPN_BITS * level.to_usize().unwrap())
+            & Self::VPN_MASK
+    }
+
+    fn merge_vpn(&self, vpn: usize, size: TableLevel) -> VirtAddr
+    where Self: AddressOps {
+        let shift = Self::PG_OFFSET + Self::VPN_BITS * size.to_usize().unwrap();
+        let mask = Self::VPN_MASK << shift;
+        VirtAddr((self.as_usize() & !mask) | ((vpn & Self::VPN_MASK) << shift))
+    }
+
+    fn lower_bits(&self, level: usize) -> usize
+    where Self: AddressOps {
+        self.as_usize() & ((1 << (Self::PG_OFFSET + Self::VPN_BITS * (level + 1))) - 1)
+    }
+}
+
+#[cfg(feature = "riscv.pagetable.sv32")]
+impl VirtAddrPaging for VirtAddr {
+    const PG_OFFSET: usize = 12;
+    const VPN_BITS: usize = 10;
+}
+
+#[cfg(feature = "riscv.pagetable.sv39")]
+impl VirtAddrPaging for VirtAddr {
+    const PG_OFFSET: usize = 12;
+    const VPN_BITS: usize = 9;
+}
+
+pub trait TableLevelSize {
+    fn level_size(&self) -> usize;
+    fn align<A: AddressOps>(&self, addr: A) -> A {
+        addr.align_down(self.level_size())
+    }
+    fn is_aligned<A: AddressOps>(&self, addr: A) -> bool {
+        self.align(addr) == addr
+    }
+}
+
+impl TableLevelSize for TableLevel {
+    fn level_size(&self) -> usize {
+        match self {
+            Self::Level0 => 4 * KIB,
+            #[cfg(feature = "riscv.pagetable.sv32")]
+            Self::Level1 => 4 * MIB,
+            #[cfg(not(feature = "riscv.pagetable.sv32"))]
+            Self::Level1 => 2 * MIB,
+            Self::Level2 => 1 * GIB,
+            #[cfg(not(feature = "legacy"))]
+            Self::Level3 => 512 * GIB,
+            #[cfg(not(feature = "legacy"))]
+            Self::Level4 => 256 * TIB,
+        }
+    }
+}

kernel/src/arch/riscv/vspace/utils.rs

@@ -1,11 +1,15 @@
+use super::table::Table;
+use super::traits::{PhysAddrPaging, TableLevelSize};
 use crate::arch::layout::*;
-use crate::utils::size::GIB;
-use crate::vspace::addr::{align_up, AddressOps, PhysAddr, VirtAddr};
-use crate::vspace::allocator::RamBlock;
-use crate::vspace::paging::PageError::{AlreadyMapped, MissingEntry};
-use crate::vspace::paging::{MapAttr, Table, TableLevel, TableOps};
+use allocator::RamBlock;
+use fdt::Fdt;
+use utils::size::GIB;
+use vspace::addr::*;
+use vspace::paging::{MapAttr, PageError::*, TableLevel, TableOps};
+
+pub unsafe fn setup_memory(fdt_addr: usize, mem: &mut RamBlock<8>) {
+    let fdt = unsafe { Fdt::from_ptr(fdt_addr as *const u8).unwrap() };
 
-pub unsafe fn setup_memory<const N: usize>(fdt: &fdt::Fdt, fdt_addr: usize, mem: &mut RamBlock<N>) {
     // Add main memory regions to allocator
     for region in fdt.memory().regions() {
         mem.dealloc(
@@ -46,7 +50,11 @@ pub unsafe fn setup_memory<const N: usize>(fdt: &fdt::Fdt, fdt_addr: usize, mem:
     mem.reserve(fdt_addr, fdt_size);
 }
 
-pub unsafe fn setup_kernel_paging<const N: usize>(allocator: &mut RamBlock<N>) {
+pub unsafe fn setup_kernel_paging(
+    allocator: &mut RamBlock<8>,
+    hart_id: usize,
+    fdt_addr: usize,
+) -> ! {
     let mut alloc = || {
         allocator
             .alloc(PAGE_LAYOUT)
@@ -96,14 +104,40 @@ pub unsafe fn setup_kernel_paging<const N: usize>(allocator: &mut RamBlock<N>) {
 
     // map 4 GiB physical memory
     // TODO: walk fdt to get all memory region?
-    for addr in (0..(3 * GIB - 1 + GIB)).step_by(TableLevel::Level1.level_size()) {
-        let phys_addr = PhysAddr(addr);
-        map(
-            mmap_phys_to_virt(phys_addr),
-            phys_addr,
-            MapAttr::READABLE | MapAttr::WRITABLE,
-            TableLevel::Level1,
-        );
+    {
+        #[cfg(feature = "legacy")]
+        let level = TableLevel::Level1;
+        #[cfg(not(feature = "legacy"))]
+        let level = TableLevel::Level2;
+
+        let addr_end = PhysAddr(3 * GIB - 1 + GIB);
+        let mut phys_addr = PhysAddr(0);
+        let mut map_level = level;
+
+        while phys_addr < addr_end {
+            let ok = map(
+                kernel_phys_to_virt(phys_addr),
+                phys_addr,
+                MapAttr::READABLE | MapAttr::WRITABLE,
+                map_level,
+            );
+
+            if ok || map_level.next().is_none() {
+                // map success or reach the end, move to next region
+                phys_addr += map_level.level_size();
+
+                // check whether we could raise the level
+                if let Some(prv) = map_level.previous()
+                    && prv.is_aligned(phys_addr)
+                {
+                    map_level = prv;
+                }
+                continue;
+            }
+
+            // already mapped, try smaller level
+            map_level = map_level.next().unwrap();
+        }
     }
 
     riscv::register::satp::set(riscv::register::satp::Mode::Sv39, 0, root_pt.to_ppn());

kernel/src/entry.rs

@@ -1,16 +1,19 @@
-use core::cell::Cell;
-use log::{debug, error, info, warn};
-
+use crate::arch::init_early_console;
 use crate::plat::console::{set_console, ConsoleDevice, ConsoleDriver, CONSOLE};
 use crate::plat::lowlevel::{Hardware, LowLevel};
 use crate::plat::timer::{Timer, TimerOps};
 use crate::plat::trap::{Trap, TrapOps};
-use crate::vspace::allocator::RamBlock;
+use allocator::RamBlock;
+use core::cell::Cell;
+use fdt::Fdt;
+use log::{debug, error, info, warn};
 
 #[thread_local]
 pub static HART_ID: Cell<usize> = Cell::new(0);
 
-pub fn rust_main<const N: usize>(hart_id: usize, fdt: fdt::Fdt, mut _allocator: RamBlock<N>) -> ! {
+// NOTE: we will call rust_main through trap (stvec), make sure it is aligned
+#[repr(align(4))]
+pub extern "C" fn rust_main(hart_id: usize, fdt_addr: usize, allocator: &mut RamBlock<8>) -> ! {
     HART_ID.set(hart_id);
 
     info!("Kernel Started");

kernel/src/main.rs

@@ -6,10 +6,10 @@
 #![feature(concat_idents)]
 #![feature(const_mut_refs)]
 #![feature(extern_types)]
+#![feature(fn_align)]
 #![feature(let_chains)]
 #![feature(naked_functions)]
 #![feature(panic_info_message)]
-#![feature(step_trait)]
 #![feature(stmt_expr_attributes)]
 #![feature(thread_local)]
 // Test Infrastructure
@@ -21,9 +21,6 @@
 #[macro_use]
 extern crate static_assertions;
 
-#[macro_use]
-extern crate num_derive;
-
 mod arch;
 mod drivers;
 mod entry;
@@ -31,8 +28,6 @@ mod lang;
 mod logging;
 mod objects;
 mod plat;
-mod utils;
-mod vspace;
 
 // test infrastructure
 #[cfg(test)]

kernel/src/vspace/allocator/mod.rs

@@ -1,7 +0,0 @@
-mod bitmap;
-mod block;
-mod freelist;
-
-pub use bitmap::*;
-pub use block::*;
-pub use freelist::*;

kernel/src/vspace/mod.rs

@@ -1,3 +0,0 @@
-pub mod addr;
-pub mod allocator;
-pub mod paging;

kernel/src/vspace/paging/mod.rs

@@ -1,9 +0,0 @@
-mod entry;
-mod table;
-
-pub use crate::arch::vspace::{Entry, Table};
-pub use entry::*;
-pub use table::*;
-
-assert_impl_all!(Entry: EntryOps);
-assert_impl_all!(Table: TableOps);

lib/allocator/Cargo.lock

@@ -0,0 +1,127 @@
+# This file is automatically @generated by Cargo.
+# It is not intended for manual editing.
+version = 3
+
+[[package]]
+name = "allocator"
+version = "0.1.0"
+dependencies = [
+ "spin",
+ "static_assertions",
+ "utils",
+ "vspace",
+]
+
+[[package]]
+name = "autocfg"
+version = "1.2.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "f1fdabc7756949593fe60f30ec81974b613357de856987752631dea1e3394c80"
+
+[[package]]
+name = "bitflags"
+version = "2.5.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "cf4b9d6a944f767f8e5e0db018570623c85f3d925ac718db4e06d0187adb21c1"
+
+[[package]]
+name = "lock_api"
+version = "0.4.11"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "3c168f8615b12bc01f9c17e2eb0cc07dcae1940121185446edc3744920e8ef45"
+dependencies = [
+ "autocfg",
+ "scopeguard",
+]
+
+[[package]]
+name = "num-derive"
+version = "0.4.2"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "ed3955f1a9c7c0c15e092f9c887db08b1fc683305fdf6eb6684f22555355e202"
+dependencies = [
+ "proc-macro2",
+ "quote",
+ "syn",
+]
+
+[[package]]
+name = "num-traits"
+version = "0.2.18"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "da0df0e5185db44f69b44f26786fe401b6c293d1907744beaa7fa62b2e5a517a"
+dependencies = [
+ "autocfg",
+]
+
+[[package]]
+name = "proc-macro2"
+version = "1.0.79"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "e835ff2298f5721608eb1a980ecaee1aef2c132bf95ecc026a11b7bf3c01c02e"
+dependencies = [
+ "unicode-ident",
+]
+
+[[package]]
+name = "quote"
+version = "1.0.35"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "291ec9ab5efd934aaf503a6466c5d5251535d108ee747472c3977cc5acc868ef"
+dependencies = [
+ "proc-macro2",
+]
+
+[[package]]
+name = "scopeguard"
+version = "1.2.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "94143f37725109f92c262ed2cf5e59bce7498c01bcc1502d7b9afe439a4e9f49"
+
+[[package]]
+name = "spin"
+version = "0.9.8"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "6980e8d7511241f8acf4aebddbb1ff938df5eebe98691418c4468d0b72a96a67"
+dependencies = [
+ "lock_api",
+]
+
+[[package]]
+name = "static_assertions"
+version = "1.1.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "a2eb9349b6444b326872e140eb1cf5e7c522154d69e7a0ffb0fb81c06b37543f"
+
+[[package]]
+name = "syn"
+version = "2.0.58"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "44cfb93f38070beee36b3fef7d4f5a16f27751d94b187b666a5cc5e9b0d30687"
+dependencies = [
+ "proc-macro2",
+ "quote",
+ "unicode-ident",
+]
+
+[[package]]
+name = "unicode-ident"
+version = "1.0.12"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "3354b9ac3fae1ff6755cb6db53683adb661634f67557942dea4facebec0fee4b"
+
+[[package]]
+name = "utils"
+version = "0.1.0"
+dependencies = [
+ "vspace",
+]
+
+[[package]]
+name = "vspace"
+version = "0.1.0"
+dependencies = [
+ "bitflags",
+ "num-derive",
+ "num-traits",
+]

lib/allocator/Cargo.toml

@@ -0,0 +1,11 @@
+[package]
+name = "allocator"
+version = "0.1.0"
+edition = "2021"
+
+[dependencies]
+vspace = { path = "../vspace" }
+utils = { path = "../utils" }
+
+spin = "0.9"
+static_assertions = "1.1"

lib/allocator/src/bitmap.rs

@@ -1,11 +1,9 @@
-use crate::arch::layout::PAGE_SIZE;
-use crate::vspace::addr::{AddressOps, PhysAddr};
 use core::alloc::{GlobalAlloc, Layout};
 use core::ptr::null_mut;
-use log::warn;
 use spin::Mutex;
+use vspace::addr::{AddressOps, PhysAddr};
 
-trait BitmapCfg: Copy + Clone {
+pub trait BitmapCfg: Copy + Clone {
     const CAPACITY: usize;
     const DEFAULT: Self;
 
@@ -14,7 +12,7 @@ trait BitmapCfg: Copy + Clone {
 }
 
 #[derive(Copy, Clone)]
-struct Bitmap32(u32);
+pub struct Bitmap32(u32);
 
 impl BitmapCfg for Bitmap32 {
     const CAPACITY: usize = u32::BITS as usize;
@@ -54,7 +52,7 @@ impl BitmapCfg for Bitmap32 {
 const BITS_PER_LEVEL: usize = 32;
 
 #[derive(Copy, Clone)]
-struct Bitmap<B: BitmapCfg> {
+pub struct Bitmap<B: BitmapCfg> {
     bits: u32, // must not overflow with BITS_PER_LEVEL
     next: [B; BITS_PER_LEVEL],
 }
@@ -117,9 +115,9 @@ impl<B: BitmapCfg> Bitmap<B> {
 }
 
 // 1k pages, consumes (32+1)*32/8 = 132 bytes, allocates 1k * 4KiB = 4MiB memory
-type Bitmap1K = Bitmap<Bitmap32>;
+pub type Bitmap1K = Bitmap<Bitmap32>;
 // 32k pages, consumes (32*(32+1)+1)*32/8 = 4228 bytes, allocates 32k * 4KiB = 128MiB memory
-type Bitmap32K = Bitmap<Bitmap1K>;
+pub type Bitmap32K = Bitmap<Bitmap1K>;
 
 const_assert_eq!(core::mem::size_of::<Bitmap1K>(), (32 + 1) * 32 / 8);
 const_assert_eq!(
@@ -127,21 +125,21 @@ const_assert_eq!(
     (32 * (32 + 1) + 1) * 32 / 8
 );
 
-struct BitmapAllocator<B: BitmapCfg = Bitmap32K> {
-    bitmap: Mutex<B>,
-    base:   PhysAddr,
+pub struct BitmapAllocator<B: BitmapCfg = Bitmap32K> {
+    bitmap:      Mutex<B>,
+    base:        PhysAddr,
+    granularity: usize,
 }
 
 unsafe impl<B: BitmapCfg> GlobalAlloc for BitmapAllocator<B> {
     unsafe fn alloc(&self, layout: Layout) -> *mut u8 {
-        if layout.size() > PAGE_SIZE || layout.align() > PAGE_SIZE {
-            warn!("unsupported layout: {:?}, page size: {}", layout, PAGE_SIZE);
+        if layout.size() > self.granularity || layout.align() > self.granularity {
             return null_mut();
         }
 
         let bit = self.bitmap.lock().alloc_bits();
         if let Some(index) = bit {
-            let addr = self.base + index * PAGE_SIZE;
+            let addr = self.base + index * self.granularity;
             return addr.as_mut_ptr();
         }
 
@@ -149,16 +147,17 @@ unsafe impl<B: BitmapCfg> GlobalAlloc for BitmapAllocator<B> {
     }
 
     unsafe fn dealloc(&self, ptr: *mut u8, _: Layout) {
-        let bit = (PhysAddr::from(ptr) - self.base).as_usize() / PAGE_SIZE;
+        let bit = (PhysAddr::from(ptr) - self.base).as_usize() / self.granularity;
         self.bitmap.lock().dealloc_bits(bit);
     }
 }
 
 impl<B: BitmapCfg> BitmapAllocator<B> {
-    pub fn new(base: PhysAddr) -> Self {
+    pub fn new(base: PhysAddr, granularity: usize) -> Self {
         Self {
             bitmap: Mutex::new(B::DEFAULT),
             base,
+            granularity,
         }
     }
 }
@@ -168,9 +167,8 @@ pub type BitmapAllocator32K = BitmapAllocator<Bitmap32K>;
 #[cfg(test)]
 mod tests {
     use super::*;
-    use crate::arch::layout::PAGE_LAYOUT;
 
-    #[test_case]
+    #[test]
     fn test_bitmap32() {
         let mut bitmap = Bitmap32::DEFAULT;
 
@@ -196,7 +194,7 @@ mod tests {
         assert_eq!(bitmap.alloc_bits(), None);
     }
 
-    #[test_case]
+    #[test]
     fn test_bitmap1k() {
         let mut bitmap = Bitmap1K::DEFAULT;
 
@@ -221,7 +219,7 @@ mod tests {
         assert_eq!(bitmap.alloc_bits(), None);
     }
 
-    #[test_case]
+    #[test]
     fn test_bitmap32k() {
         let mut bitmap = Bitmap32K::DEFAULT;
 
@@ -256,27 +254,29 @@ mod tests {
         assert_eq!(bitmap.alloc_bits(), None);
     }
 
-    #[test_case]
+    #[test]
     fn test_bitmap_allocator() {
-        let allocator = BitmapAllocator32K::new(PhysAddr(0x42));
+        let page_size: usize = 4 * utils::size::KIB;
+        let page_layout = core::alloc::Layout::from_size_align(page_size, page_size).unwrap();
+        let allocator = BitmapAllocator32K::new(PhysAddr(0x42), page_size);
 
         // alloc from empty
         for i in 0..32 {
-            let ptr = unsafe { allocator.alloc(PAGE_LAYOUT) };
-            assert_eq!(PhysAddr::from(ptr).as_usize(), 0x42 + i * PAGE_SIZE);
+            let ptr = unsafe { allocator.alloc(page_layout) };
+            assert_eq!(PhysAddr::from(ptr).as_usize(), 0x42 + i * page_size);
         }
 
         // dealloc
         for i in 0..16 {
             unsafe {
-                allocator.dealloc(PhysAddr(0x42 + i * 2 * PAGE_SIZE).as_mut_ptr(), PAGE_LAYOUT);
+                allocator.dealloc(PhysAddr(0x42 + i * 2 * page_size).as_mut_ptr(), page_layout);
             }
         }
 
         // predictable alloc from dealloc pattern
         for i in 0..16 {
-            let ptr = unsafe { allocator.alloc(PAGE_LAYOUT) };
-            assert_eq!(PhysAddr::from(ptr).as_usize(), 0x42 + i * 2 * PAGE_SIZE);
+            let ptr = unsafe { allocator.alloc(page_layout) };
+            assert_eq!(PhysAddr::from(ptr).as_usize(), 0x42 + i * 2 * page_size);
         }
     }
 }

lib/allocator/src/block.rs

@@ -1,6 +1,6 @@
-use crate::vspace::addr::{AddressOps, PhysAddr};
 use core::alloc::Layout;
 use core::cmp::min;
+use vspace::addr::{AddressOps, PhysAddr};
 
 #[derive(Copy, Clone, Debug)]
 struct Block {
@@ -139,11 +139,16 @@ impl<const N: usize> RamBlock<N> {
     }
 }
 
+impl<const N: usize> Default for RamBlock<N> {
+    fn default() -> Self {
+        Self::new()
+    }
+}
 #[cfg(test)]
 mod tests {
     use super::*;
 
-    #[test_case]
+    #[test]
     fn test_block() {
         let mut blk = RamBlock::<4>::new();
         blk.dealloc(PhysAddr(0), 100);
@@ -185,7 +190,7 @@ mod tests {
         assert_eq!(ptr, None);
     }
 
-    #[test_case]
+    #[test]
     fn test_block_reserve() {
         let mut blk = RamBlock::<4>::new();
         blk.dealloc(PhysAddr(0), 100);

lib/allocator/src/freelist.rs

@@ -1,10 +1,10 @@
 // adapted from https://os.phil-opp.com/allocator-designs/#linked-list-allocator
 
-use crate::utils::then::Then;
-use crate::vspace::addr::{AddressOps, PhysAddr};
 use core::alloc::{GlobalAlloc, Layout};
 use core::fmt::Debug;
 use spin::Mutex;
+use utils::then::Then;
+use vspace::addr::{AddressOps, PhysAddr};
 
 struct ListNode {
     size: usize,
@@ -88,6 +88,8 @@ impl FreeList {
         (size, layout.align())
     }
 
+    /// # Safety
+    /// Caller must assume that all the memory allocated or deallocated is valid (no overflow or double free)
     pub unsafe fn alloc(&mut self, layout: Layout) -> *mut u8 {
         let (size, align) = Self::align_layout(layout);
 
@@ -103,6 +105,8 @@ impl FreeList {
         }
     }
 
+    /// # Safety
+    /// Caller must assume that all the memory allocated or deallocated is valid (no overflow or double free)
     pub unsafe fn dealloc(&mut self, start: PhysAddr, size: usize) {
         assert_eq!(start.align_up(core::mem::align_of::<ListNode>()), start);
         assert!(size >= core::mem::size_of::<ListNode>());
@@ -135,6 +139,12 @@ impl FreeList {
     }
 }
 
+impl Default for FreeList {
+    fn default() -> Self {
+        Self::new()
+    }
+}
+
 impl Debug for FreeList {
     fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
         let mut current = &self.head;
@@ -174,41 +184,43 @@ unsafe impl GlobalAlloc for FreeListAllocator {
 #[cfg(test)]
 mod tests {
     use super::*;
-    use crate::arch::layout::{PAGE_LAYOUT, PAGE_SIZE};
 
-    // TODO: freelist tests are broken since it requires real free memory to work, ignore for now
+    const PAGE_SIZE: usize = 4 * utils::size::KIB;
+    const PAGE_LAYOUT: Layout = unsafe { Layout::from_size_align_unchecked(PAGE_SIZE, PAGE_SIZE) };
 
-    // #[test_case]
+    #[test]
     fn test_freelist() {
-        const BASE: PhysAddr = PhysAddr(0x80300000);
+        let vec: Vec<u8> = vec![0u8; 33 * PAGE_SIZE];
+        let base = PhysAddr::from(vec.as_ptr()).align_up(PAGE_SIZE);
 
-        let allocator = FreeListAllocator::new(BASE, 32 * PAGE_SIZE);
+        let allocator = FreeListAllocator::new(base, 32 * PAGE_SIZE);
         for i in 0..32 {
             let ptr = unsafe { allocator.alloc(PAGE_LAYOUT) };
-            assert_eq!(ptr as usize, (BASE + i * PAGE_SIZE).as_usize());
+            assert_eq!(ptr as usize, (base + i * PAGE_SIZE).as_usize());
         }
 
         let ptr = unsafe { allocator.alloc(PAGE_LAYOUT) };
         assert_eq!(ptr, core::ptr::null_mut());
 
         for i in (0..32).rev() {
-            let ptr = (BASE + i * PAGE_SIZE).as_mut_ptr();
+            let ptr = (base + i * PAGE_SIZE).as_mut_ptr();
             unsafe { allocator.dealloc(ptr, PAGE_LAYOUT) };
         }
 
         let ptr = unsafe { allocator.alloc(PAGE_LAYOUT) };
-        assert_eq!(ptr as usize, BASE.as_usize());
+        assert_eq!(ptr as usize, base.as_usize());
     }
 
-    // #[test_case]
+    #[test]
     fn test_freelist_reserve() {
-        const BASE: PhysAddr = PhysAddr(0x80300000);
+        let vec: Vec<u8> = vec![0u8; 33 * PAGE_SIZE];
+        let base = PhysAddr::from(vec.as_ptr()).align_up(PAGE_SIZE);
 
-        let allocator = FreeListAllocator::new(BASE, 32 * PAGE_SIZE);
+        let allocator = FreeListAllocator::new(base, 32 * PAGE_SIZE);
         allocator
             .list
             .lock()
-            .reserve(BASE + 4 * PAGE_SIZE, 4 * PAGE_SIZE);
+            .reserve(base + 4 * PAGE_SIZE, 4 * PAGE_SIZE);
 
         let mut cnt = 32 - 4;
         loop {
@@ -220,11 +232,11 @@ mod tests {
 
             let ptr = PhysAddr::from(ptr);
             assert!(
-                !(BASE + 4 * PAGE_SIZE <= ptr && ptr < BASE + (4 + 4) * PAGE_SIZE),
+                !(base + 4 * PAGE_SIZE <= ptr && ptr < base + (4 + 4) * PAGE_SIZE),
                 "Bad alloc: returned ptr: {:?}, reserved range: {:?}->{:?}",
                 ptr,
-                BASE + 4 * PAGE_SIZE,
-                BASE + (4 + 4) * PAGE_SIZE
+                base + 4 * PAGE_SIZE,
+                base + (4 + 4) * PAGE_SIZE
             );
 
             cnt -= 1;

lib/allocator/src/lib.rs

@@ -0,0 +1,14 @@
+#![cfg_attr(not(test), no_std)]
+
+#![feature(const_mut_refs)]
+
+#[macro_use]
+extern crate static_assertions;
+
+mod bitmap;
+mod block;
+mod freelist;
+
+pub use bitmap::*;
+pub use block::*;
+pub use freelist::*;

lib/utils/Cargo.lock

@@ -0,0 +1,86 @@
+# This file is automatically @generated by Cargo.
+# It is not intended for manual editing.
+version = 3
+
+[[package]]
+name = "autocfg"
+version = "1.2.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "f1fdabc7756949593fe60f30ec81974b613357de856987752631dea1e3394c80"
+
+[[package]]
+name = "bitflags"
+version = "2.5.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "cf4b9d6a944f767f8e5e0db018570623c85f3d925ac718db4e06d0187adb21c1"
+
+[[package]]
+name = "num-derive"
+version = "0.4.2"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "ed3955f1a9c7c0c15e092f9c887db08b1fc683305fdf6eb6684f22555355e202"
+dependencies = [
+ "proc-macro2",
+ "quote",
+ "syn",
+]
+
+[[package]]
+name = "num-traits"
+version = "0.2.18"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "da0df0e5185db44f69b44f26786fe401b6c293d1907744beaa7fa62b2e5a517a"
+dependencies = [
+ "autocfg",
+]
+
+[[package]]
+name = "proc-macro2"
+version = "1.0.79"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "e835ff2298f5721608eb1a980ecaee1aef2c132bf95ecc026a11b7bf3c01c02e"
+dependencies = [
+ "unicode-ident",
+]
+
+[[package]]
+name = "quote"
+version = "1.0.35"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "291ec9ab5efd934aaf503a6466c5d5251535d108ee747472c3977cc5acc868ef"
+dependencies = [
+ "proc-macro2",
+]
+
+[[package]]
+name = "syn"
+version = "2.0.58"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "44cfb93f38070beee36b3fef7d4f5a16f27751d94b187b666a5cc5e9b0d30687"
+dependencies = [
+ "proc-macro2",
+ "quote",
+ "unicode-ident",
+]
+
+[[package]]
+name = "unicode-ident"
+version = "1.0.12"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "3354b9ac3fae1ff6755cb6db53683adb661634f67557942dea4facebec0fee4b"
+
+[[package]]
+name = "utils"
+version = "0.1.0"
+dependencies = [
+ "vspace",
+]
+
+[[package]]
+name = "vspace"
+version = "0.1.0"
+dependencies = [
+ "bitflags",
+ "num-derive",
+ "num-traits",
+]

lib/utils/Cargo.toml

@@ -0,0 +1,11 @@
+[package]
+name = "utils"
+version = "0.1.0"
+edition = "2021"
+
+[features]
+default = []
+legacy = []
+
+[dependencies]
+vspace = { path = "../vspace" }

lib/utils/src/extern_addr.rs

@@ -1,4 +1,4 @@
-use crate::vspace::addr::{PhysAddr, VirtAddr};
+use vspace::addr::{PhysAddr, VirtAddr};
 
 extern "C" {
     pub type ExternSymbol;

lib/utils/src/lib.rs

@@ -1,3 +1,6 @@
+#![no_std]
+#![feature(extern_types)]
+
 pub mod extern_addr;
 pub mod function_name;
 pub mod size;

lib/utils/src/then.rs

@@ -13,6 +13,7 @@ impl Then for bool {
         }
     }
 
+    #[inline]
     fn some<T, E, F: FnOnce() -> T>(self, f: F, err: E) -> Result<T, E> {
         if self {
             Ok(f())

lib/vspace/Cargo.lock

@@ -0,0 +1,79 @@
+# This file is automatically @generated by Cargo.
+# It is not intended for manual editing.
+version = 3
+
+[[package]]
+name = "autocfg"
+version = "1.2.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "f1fdabc7756949593fe60f30ec81974b613357de856987752631dea1e3394c80"
+
+[[package]]
+name = "bitflags"
+version = "2.5.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "cf4b9d6a944f767f8e5e0db018570623c85f3d925ac718db4e06d0187adb21c1"
+
+[[package]]
+name = "num-derive"
+version = "0.4.2"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "ed3955f1a9c7c0c15e092f9c887db08b1fc683305fdf6eb6684f22555355e202"
+dependencies = [
+ "proc-macro2",
+ "quote",
+ "syn",
+]
+
+[[package]]
+name = "num-traits"
+version = "0.2.18"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "da0df0e5185db44f69b44f26786fe401b6c293d1907744beaa7fa62b2e5a517a"
+dependencies = [
+ "autocfg",
+]
+
+[[package]]
+name = "proc-macro2"
+version = "1.0.79"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "e835ff2298f5721608eb1a980ecaee1aef2c132bf95ecc026a11b7bf3c01c02e"
+dependencies = [
+ "unicode-ident",
+]
+
+[[package]]
+name = "quote"
+version = "1.0.35"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "291ec9ab5efd934aaf503a6466c5d5251535d108ee747472c3977cc5acc868ef"
+dependencies = [
+ "proc-macro2",
+]
+
+[[package]]
+name = "syn"
+version = "2.0.58"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "44cfb93f38070beee36b3fef7d4f5a16f27751d94b187b666a5cc5e9b0d30687"
+dependencies = [
+ "proc-macro2",
+ "quote",
+ "unicode-ident",
+]
+
+[[package]]
+name = "unicode-ident"
+version = "1.0.12"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "3354b9ac3fae1ff6755cb6db53683adb661634f67557942dea4facebec0fee4b"
+
+[[package]]
+name = "vspace"
+version = "0.1.0"
+dependencies = [
+ "bitflags",
+ "num-derive",
+ "num-traits",
+]

lib/vspace/Cargo.toml

@@ -0,0 +1,13 @@
+[package]
+name = "vspace"
+version = "0.1.0"
+edition = "2021"
+
+[features]
+default = []
+legacy = []
+
+[dependencies]
+bitflags = "2.4"
+num-derive = "0.4"
+num-traits = { version = "0.2", default-features = false }

lib/vspace/src/addr.rs

@@ -1,6 +1,6 @@
 use core::fmt::*;
 use core::hash::*;
-use core::iter::Step;
+use core::iter::*;
 use core::num::*;
 use core::ops::*;
 

lib/vspace/src/lib.rs

@@ -0,0 +1,9 @@
+#![cfg_attr(not(test), no_std)]
+#![feature(const_mut_refs)]
+#![feature(step_trait)]
+
+#[macro_use]
+extern crate num_derive;
+
+pub mod addr;
+pub mod paging;

lib/vspace/src/paging/entry.rs

@@ -1,4 +1,4 @@
-use crate::vspace::addr::PhysAddr;
+use crate::addr::PhysAddr;
 use bitflags::bitflags;
 use core::fmt::Debug;
 

lib/vspace/src/paging/mod.rs

@@ -0,0 +1,5 @@
+mod entry;
+mod table;
+
+pub use entry::*;
+pub use table::*;

lib/vspace/src/paging/table.rs

@@ -1,5 +1,5 @@
 use super::{EntryOps, MapAttr};
-use crate::vspace::addr::{PhysAddr, VirtAddr};
+use crate::addr::{PhysAddr, VirtAddr};
 use core::fmt::Debug;
 
 #[derive(Debug, Clone, Copy, PartialEq, PartialOrd, Eq, FromPrimitive, ToPrimitive)]
@@ -25,6 +25,18 @@ impl TableLevel {
             Self::Level4 => Some(Self::Level3),
         }
     }
+
+    pub fn previous(&self) -> Option<Self> {
+        match self {
+            Self::Level0 => Some(Self::Level1),
+            Self::Level1 => Some(Self::Level2),
+            Self::Level2 => Some(Self::Level3),
+            #[cfg(not(feature = "legacy"))]
+            Self::Level3 => Some(Self::Level4),
+            #[cfg(not(feature = "legacy"))]
+            Self::Level4 => None,
+        }
+    }
 }
 
 #[derive(Debug)]
@@ -39,6 +51,8 @@ pub trait TableOps: Debug {
     type Entry: EntryOps;
     const MAX_PAGE_SIZE: TableLevel;
 
+    /// # Safety
+    /// `location` must be a page-aligned virtual address and will not be dropped.
     unsafe fn new(location: VirtAddr) -> &'static mut Self;
 
     fn map(&mut self, from: VirtAddr, to: PhysAddr, attr: MapAttr, level: TableLevel)