diff --git a/kernel/src/arch/riscv/vspace/table.rs b/kernel/src/arch/riscv/vspace/table.rs
index 397c6a8..5579d55 100644
--- a/kernel/src/arch/riscv/vspace/table.rs
+++ b/kernel/src/arch/riscv/vspace/table.rs
@@ -11,6 +11,7 @@ pub struct Table {
}
assert_eq_size!(Table, [u8; PAGE_SIZE]);
+const_assert_eq!(core::mem::size_of::
(), Table::TABLE_SIZE);
impl Table {
fn lookup_mut_internal(&mut self, vaddr: VirtAddr) -> (&mut Entry, TableLevel) {
@@ -46,6 +47,7 @@ impl TableOps for Table {
#[cfg(feature = "riscv.pagetable.sv39")]
const MAX_PAGE_SIZE: TableLevel = TableLevel::Level2;
+ const TABLE_SIZE: usize = PAGE_SIZE;
unsafe fn new(location: VirtAddr) -> &'static mut Self {
assert!(location.is_aligned(PAGE_SIZE));
diff --git a/lib/vspace/src/paging/table.rs b/lib/vspace/src/paging/table.rs
index 45079f9..a19e5bb 100644
--- a/lib/vspace/src/paging/table.rs
+++ b/lib/vspace/src/paging/table.rs
@@ -44,6 +44,7 @@ pub type PageResult = Result;
pub trait TableOps: Debug {
type Entry: EntryOps;
const MAX_PAGE_SIZE: TableLevel;
+ const TABLE_SIZE: usize;
/// # Safety
/// `location` must be a page-aligned virtual address and will not be dropped.