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chore: adjust boot_stack

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This commit is contained in:
Paul Pan 2023-12-17 15:25:54 +08:00
parent 5a11fbd169
commit c7c36e5665
2 changed files with 10 additions and 12 deletions
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14
src/arch/riscv/entry.rs
View File

@ -6,7 +6,7 @@ unsafe extern "C" fn _start(hart_id: usize, device_tree_addr: usize) -> ! {
// no stack here
const STACK_SIZE: usize = 4096 * 16;
#[link_section = ".boot_stack"]
#[link_section = ".bss.boot_stack"]
static mut STACK: [u8; STACK_SIZE] = [0u8; STACK_SIZE];
core::arch::asm!(
@ -20,6 +20,8 @@ unsafe extern "C" fn _start(hart_id: usize, device_tree_addr: usize) -> ! {
}
extern "C" fn pre_main(hart_id: usize, device_tree_addr: usize) -> ! {
// TODO: multiboot
unsafe { zero_bss() }
// TODO: initialize page table
@ -28,16 +30,14 @@ extern "C" fn pre_main(hart_id: usize, device_tree_addr: usize) -> ! {
}
extern "C" {
static mut __bss_start: u8;
static mut __boot_stack_end: u8;
static mut __bss_end: u8;
}
#[inline(always)]
unsafe fn zero_bss() {
let mut cur = &mut __bss_start as *mut u8;
let cur = &mut __boot_stack_end as *mut u8;
let end = &mut __bss_end as *mut u8;
while cur < end {
cur.write_volatile(0);
cur = cur.add(1);
}
core::slice::from_raw_parts_mut(cur, end.offset_from(cur) as usize).fill(0);
}

8
src/arch/riscv/linker.ld
View File

@ -42,14 +42,12 @@ SECTIONS {
__data_end = .;
} > DRAM
.stack : {
. = ALIGN(8);
*(.boot_stack)
} > DRAM
.bss : {
. = ALIGN(8);
__bss_start = .;
*(.bss.boot_stack)
__boot_stack_end = .;
*(.bss .bss.*)
*(.sbss .sbss.*)
__bss_end = .;