From 6eb3a062c1337d8556fb3bbde6023b75a925e077 Mon Sep 17 00:00:00 2001
From: Paul Pan <i@0x7f.app>
Date: Sun, 16 Jun 2024 22:19:23 +0800
Subject: [PATCH] feat: plat: trap: add trait for setting up pc

---
 kernel/src/arch/riscv/trap.rs | 4 ++++
 kernel/src/plat/trap.rs       | 1 +
 2 files changed, 5 insertions(+)

diff --git a/kernel/src/arch/riscv/trap.rs b/kernel/src/arch/riscv/trap.rs
index 78dbf6d..ce6a08a 100644
--- a/kernel/src/arch/riscv/trap.rs
+++ b/kernel/src/arch/riscv/trap.rs
@@ -121,6 +121,10 @@ impl TrapContextOps for TrapContext {
         assert!(index < 8, "TrapContext set_reg index out of range");
         self.gprs[index + 9] = value;
     }
+
+    fn set_pc(&mut self, value: usize) {
+        self.sepc = value;
+    }
 }
 
 #[derive(Debug, Default)]
diff --git a/kernel/src/plat/trap.rs b/kernel/src/plat/trap.rs
index da4458e..3b8d4ec 100644
--- a/kernel/src/plat/trap.rs
+++ b/kernel/src/plat/trap.rs
@@ -16,4 +16,5 @@ pub trait TrapContextOps {
 
     fn get_reg(&self, index: usize) -> usize;
     fn set_reg(&mut self, index: usize, value: usize);
+    fn set_pc(&mut self, value: usize);
 }