From 6bbc889d7f74f92e7947280098dffca4b2f3a7fb Mon Sep 17 00:00:00 2001 From: Paul Pan Date: Fri, 23 Aug 2024 20:45:08 +0800 Subject: [PATCH] chore: kernel/arch/riscv/trap: also log sp --- kernel/Cargo.toml | 2 +- kernel/src/arch/riscv/backtrace.rs | 37 +++++++++++++++++++----------- kernel/src/arch/riscv/trap.rs | 12 ++++++++-- 3 files changed, 34 insertions(+), 17 deletions(-) diff --git a/kernel/Cargo.toml b/kernel/Cargo.toml index 7a2a61d..8fbfb40 100644 --- a/kernel/Cargo.toml +++ b/kernel/Cargo.toml @@ -39,4 +39,4 @@ uart_16550 = "0.3" [target.'cfg(target_arch = "riscv64")'.dependencies] riscv = { version = "0.11", features = ["s-mode"] } -sbi-rt = { version = "0.0" } +sbi-rt = { version = "0.0.3" } diff --git a/kernel/src/arch/riscv/backtrace.rs b/kernel/src/arch/riscv/backtrace.rs index bec0b6b..47c2c18 100644 --- a/kernel/src/arch/riscv/backtrace.rs +++ b/kernel/src/arch/riscv/backtrace.rs @@ -2,19 +2,28 @@ use super::layout::{BSS_END, BSS_START, TEXT_END, TEXT_START}; use crate::plat::backtrace::FrameWalker; use utils::addr::{AddressOps, VirtAddr}; +#[inline] +pub fn read_fp() -> usize { + let fp; + unsafe { core::arch::asm!("mv {}, fp", out(reg) fp) } + fp +} + +#[inline] +pub fn read_sp() -> usize { + let sp; + unsafe { core::arch::asm!("mv {}, sp", out(reg) sp) } + sp +} + +#[inline] +pub fn read_ra() -> usize { + let ra; + unsafe { core::arch::asm!("mv {}, ra", out(reg) ra) } + ra +} + impl FrameWalker { - fn read_fp() -> usize { - let fp; - unsafe { core::arch::asm!("mv {}, fp", out(reg) fp) } - fp - } - - fn read_ra() -> usize { - let ra; - unsafe { core::arch::asm!("mv {}, ra", out(reg) ra) } - ra - } - fn is_valid(&self) -> bool { let fp_valid = unsafe { BSS_START.as_virt_addr() <= self.current_fp && self.current_fp < BSS_END.as_virt_addr() }; let pc_valid = unsafe { TEXT_START.as_virt_addr() <= self.current_pc && self.current_pc < TEXT_END.as_virt_addr() }; @@ -28,8 +37,8 @@ impl FrameWalker { pub fn new() -> Self { // current_{fp, pc} is deliberately missed for printing Self { - current_fp: VirtAddr::from(FrameWalker::read_fp()), - current_pc: VirtAddr::from(FrameWalker::read_ra()), + current_fp: VirtAddr::from(read_fp()), + current_pc: VirtAddr::from(read_ra()), } } } diff --git a/kernel/src/arch/riscv/trap.rs b/kernel/src/arch/riscv/trap.rs index 385dd2e..e4bb207 100644 --- a/kernel/src/arch/riscv/trap.rs +++ b/kernel/src/arch/riscv/trap.rs @@ -1,3 +1,4 @@ +use crate::arch::riscv::backtrace::read_sp; use crate::entry::HART_ID; use crate::objects::*; use crate::plat::console::CONSOLE; @@ -55,12 +56,19 @@ impl TrapContextOps for TrapContext { fn configure_idle_thread(&mut self) { self.sepc = idle_thread as usize; - self.sstatus = (1 << 5) | (1 << 8); // SPIE + SPP + self.sstatus = (1 << 5) // SPIE: enable interrupt in idle thread + | (1 << 8) // SPP: run in kernel mode in idle thread + ; } fn handle_trap(&mut self, from_kernel: bool) { let scause = riscv::register::scause::read(); - trace!("[Trap] cpu@{} scause: {:?}", HART_ID.get(), scause.cause()); + trace!( + "[Trap] cpu@{} scause: {:?} sp: {:#x}", + HART_ID.get(), + scause.cause(), + read_sp() + ); macro_rules! panic_fatal { ($msg:expr) => {