Paul Pan
7b33e4213a
1. add test soft 2. modify verilator (TODO: crossbar need to replace) 3. fix CP0: now CU0 is always 1 4. Controller: cacheop 5. Controller: fix TEN 6. mycpu_top fix CP0_i 7. fix AXI.sv 8. fix AXIReader.sv 9. fix AXIWriter.sv: getting the correct data and length 10. MU: fix cache writeback, fix mem data mux, fix writer address, fix read request
108 lines
5.1 KiB
C
108 lines
5.1 KiB
C
//soc confreg
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#define CONFREG_NULL 0xbfaf8ffc
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#define CONFREG_CR0 0xbfaf8000
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#define CONFREG_CR1 0xbfaf8004
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#define CONFREG_CR2 0xbfaf8008
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#define CONFREG_CR3 0xbfaf800c
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#define CONFREG_CR4 0xbfaf8010
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#define CONFREG_CR5 0xbfaf8014
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#define CONFREG_CR6 0xbfaf8018
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#define CONFREG_CR7 0xbfaf801c
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#define IO_SIMU_ADDR 0xbfafffec
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#define UART_ADDR 0xbfaffff0
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#define SIMU_FLAG_ADDR 0xbfaffff4
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#define OPEN_TRACE_ADDR 0xbfaffff8
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#define NUM_MONITOR_ADDR 0xbfaffffc
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#define LED_ADDR 0xbfaff000
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#define LED_RG0_ADDR 0xbfaff004
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#define LED_RG1_ADDR 0xbfaff008
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#define NUM_ADDR 0xbfaff010
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#define SWITCH_ADDR 0xbfaff020
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#define BTN_KEY_ADDR 0xbfaff024
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#define BTN_STEP_ADDR 0xbfaff028
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#define SW_INTER_ADDR 0xbfaff02c //switch interleave
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#define TIMER_ADDR 0xbfafe000
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#define SOC_LED (* (volatile unsigned *) LED_ADDR )
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#define SOC_LED_RG0 (* (volatile unsigned *) LED_RG0_ADDR )
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#define SOC_LED_RG1 (* (volatile unsigned *) LED_RG1_ADDR )
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#define SOC_NUM (* (volatile unsigned *) NUM_ADDR )
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#define SOC_SWITCHE (* (volatile unsigned *) SWITCH_ADDR )
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#define SOC_BTN_KEY (* (volatile unsigned *) BTN_KEY_ADDR )
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#define SOC_BTN_STEP (* (volatile unsigned *) BTN_STEP_ADDR )
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#define SOC_TIMER (* (volatile unsigned *) TIMER_ADDR )
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//#define disable_trace_cmp *((volatile int *)OPEN_TRACE_ADDR) = 0; \
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// *((volatile int *)CONFREG_NULL ) = 0; \
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// *((volatile int *)CONFREG_NULL ) = 0
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//#define enable_trace_cmp *((volatile int *)OPEN_TRACE_ADDR) = 1; \
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// *((volatile int *)CONFREG_NULL ) = 0; \
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*((volatile int *)CONFREG_NULL ) = 0
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#define trace_cmp_flag (*((volatile int *)OPEN_TRACE_ADDR))
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#define disable_trace_cmp asm volatile( \
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".set noreorder;" \
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"lui $25,0xbfb0\n\t" \
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"sw $0,-0x7004($25)\n\t" \
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"sw $0,-0x7004($25)\n\t" \
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"sw $0,-0x8($25)\n\t" \
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"sw $0,-0x7004($25)\n\t" \
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"sw $0,-0x7004($25)\n\t" \
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"lw $0,-0x7004($25)\n\t" \
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"lw $25,-0x8($25)\n\t" \
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".set reorder" \
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:::"$25" \
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)
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#define disable_trace_cmp_s .set noreorder; \
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lui k1,0xbfb0; \
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sw $0,-0x7004(k1); \
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sw $0,-0x7004(k1); \
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sw $0,-0x8(k1); \
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sw $0,-0x7004(k1); \
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sw $0,-0x7004(k1); \
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lw $0,-0x7004(k1); \
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lw k1,-0x8(k1); \
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.set reorder; \
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#define disable_num_monitor_s .set noreorder; \
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lui k1,0xbfb0; \
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sw $0,-0x7004(k1); \
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sw $0,-0x7004(k1); \
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sw $0,-0x4(k1); \
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sw $0,-0x7004(k1); \
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sw $0,-0x7004(k1); \
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lw $0,-0x7004(k1); \
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lw k1,-0x4(k1); \
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.set reorder; \
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#define enable_trace_cmp asm volatile( \
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".set noreorder;" \
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"lui $25,0xbfb0\n\t" \
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"sw $0,-0x7004($25)\n\t" \
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"sw $0,-0x7004($25)\n\t" \
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"sw $25,-8($25)\n\t" \
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"sw $0,-0x7004($25)\n\t" \
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"sw $0,-0x7004($25)\n\t" \
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"lw $0,-0x7004($25)\n\t" \
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"lw $25,-0x8($25)\n\t" \
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".set reorder" \
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:::"$25" \
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)
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#define enable_trace_cmp_s .set noreorder; \
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lui k1,0xbfb0; \
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sw $0,-0x7004(k1); \
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sw $0,-0x7004(k1); \
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sw k1,-8(k1); \
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sw $0,-0x7004(k1); \
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sw $0,-0x7004(k1); \
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lw $0,-0x7004(k1); \
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lw k1,-0x8(k1); \
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.set reorder; \
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#define write_confreg_cr(num,data) *((volatile int *)(CONFREG_CR0+4*num)) = data
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#define read_confreg_cr(num,data) data=*((volatile int *)(CONFREG_CR0+4*num))
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#define NOP addu zero, zero, zero
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#define LI(reg, imm) \
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li reg, imm
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