module ICData_bram (
    input      [  5:0] addra,
    input              clka,
    input      [255:0] dina,
    output reg [255:0] douta,
    input              wea
);
	reg [255:0] ram [0:63];
	always @(posedge clka) begin
		if(wea) begin
			ram[addra] <= dina;
		end
		douta <= ~wea ? ram[addra] : {8{$random}};
	end

endmodule