|
|
a7793c6741
|
Another big update
1. refactor func test
2. fix CACHE inst
3. CP0 add Context Register
4. fix AXIWriter order
|
2022-08-01 22:01:24 +08:00 |
|
|
|
9ce588757d
|
feat: MU rewrite 1
1. ALU format
2. FIX hazard (MOVN / MOVZ)
3. verilator support
|
2022-07-27 15:07:16 +08:00 |
|
|
|
5f889492c8
|
clean up
|
2021-08-24 11:41:06 +08:00 |
|
|
|
eab17474ff
|
add dev lib
|
2021-08-13 20:40:53 +08:00 |
|
|
|
bc549d8bd4
|
1. tlb control signals
2. exccode rename
3. tlb datapath partial
Co-authored-by: cxy004 <cxy004@qq.com>
Co-authored-by: Hooo1941 <Hooo1941@users.noreply.github.com>
|
2021-08-11 12:58:02 +08:00 |
|
|
|
c75af267af
|
[Cache] ICache Design
|
2021-07-09 23:21:55 +08:00 |
|
|
|
1986765cfe
|
[resource] rename
|
2021-06-18 15:43:51 +08:00 |
|
