cxy004
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8d36e89a21
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2alu linux fix (pmon?)
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2022-08-04 14:48:57 +08:00 |
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cxy004
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5392df67ac
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1. mov change
2. 2alu
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2022-08-03 14:28:07 +08:00 |
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cxy004
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c2fa121f92
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2alu
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2022-08-03 11:17:07 +08:00 |
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9ce588757d
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feat: MU rewrite 1
1. ALU format
2. FIX hazard (MOVN / MOVZ)
3. verilator support
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2022-07-27 15:07:16 +08:00 |
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75a62cfc37
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try add trap
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2021-09-22 13:41:09 +08:00 |
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29c6e16682
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try add MOVZ, MOVN
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2021-09-07 19:24:34 +08:00 |
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f256abd248
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add control signals
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2021-09-02 19:05:23 +08:00 |
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966b7b6223
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add control signals
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2021-08-31 18:30:03 +08:00 |
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0b872c9b7c
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add sync pref as nop
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2021-08-30 13:11:40 +08:00 |
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1f94aebd9d
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update control signals for swl/swr
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2021-08-29 16:47:34 +08:00 |
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54c6794a77
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add LWL and LWR
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2021-08-26 18:32:55 +08:00 |
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1ad35234dc
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txt add tlbwr
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2021-08-26 17:04:09 +08:00 |
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cxy004
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67ccb57eda
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RW & RS0 fix
tools update
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2021-08-18 12:16:28 +08:00 |
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22e469ceec
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1. tlb: add soft
2. datapath OFA fix2
3. datapath C0 hazard
4. MMU buffer
Co-authored-by: cxy004 <cxy004@qq.com>
Co-authored-by: Hooo1941 <Hooo1941@users.noreply.github.com>
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2021-08-12 21:38:30 +08:00 |
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bc549d8bd4
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1. tlb control signals
2. exccode rename
3. tlb datapath partial
Co-authored-by: cxy004 <cxy004@qq.com>
Co-authored-by: Hooo1941 <Hooo1941@users.noreply.github.com>
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2021-08-11 12:58:02 +08:00 |
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