From d923ba69c5881a2751fa09788b15b6cc7d97dd6a Mon Sep 17 00:00:00 2001 From: Paul Pan Date: Wed, 11 Aug 2021 21:55:54 +0800 Subject: [PATCH] datapath fix bug (clear OFA) Co-authored-by: cxy004 Co-authored-by: Hooo1941 --- src/Core/Datapath.sv | 9 ++++++--- src/include/defines.svh | 2 ++ 2 files changed, 8 insertions(+), 3 deletions(-) diff --git a/src/Core/Datapath.sv b/src/Core/Datapath.sv index c24334b..8b2633b 100644 --- a/src/Core/Datapath.sv +++ b/src/Core/Datapath.sv @@ -422,6 +422,8 @@ module Datapath ( : D_IA_TLBInvalid ? `EXCCODE_TLBL : ~D_IA_iv ? `EXCCODE_RI : D.IA_inst[0] ? `EXCCODE_BP : `EXCCODE_SYS; + assign D.IA_OFA = D_IA_valid & D.IA.OFA; + assign D.IB_ExcValid = D_IB_valid & (D.IB_pc[1:0] != 2'b00 | D_IB_TLBRefill | D_IB_TLBInvalid | ~D_IB_iv | D.IB.SYSCALL | D.IB.BREAK | D.IB.ERET | D.IB_Delay & D.IB.BJRJ); assign D.IB_ERET = D_IB_valid & D_IB_iv & D.IB.ERET & ~D.IB_Delay; @@ -434,6 +436,7 @@ module Datapath ( : D.IB_Delay & D.IB.BJRJ ? `EXCCODE_RI : D.IB_inst[0] ? `EXCCODE_BP : `EXCCODE_SYS; assign D.IB_Delay = D.IA.BJRJ; + assign D.IB_OFA = D_IB_valid & D.IB.OFA; // D.Dispatch assign D_IA_DataHazard = E.I0.WCtrl.RW & D.IA.RS == E.I0.RD & D.IA.ES & ~E.I0.MCtrl.RS0[2] @@ -470,7 +473,7 @@ module Datapath ( assign D.en0 = ~D_IA_valid | ~D_IB_valid | D_go & E.en; assign D.en1 = ~D_IA_valid | D_IB_can_dispatch & D_go & E.en; - assign D_go = (~PF_go | ~D.IA.BJRJ | D.IA.B & ~D.IA.BGO| fetch_i.req & fetch_i.addr_ok) & D_IA_can_dispatch | D.IA_ExcValid; + assign D_go = (~PF_go | ~D.IA.BJRJ | D.IA.B & ~D.IA.BGO | fetch_i.req & fetch_i.addr_ok) & D_IA_can_dispatch | D.IA_ExcValid; assign D_IA_go = D_IA_valid & ~D.IA_ExcValid; assign D_IB_go = D_IB_valid & ~D.IB_ExcValid & D_IB_can_dispatch & ~D.IA_ExcValid; @@ -481,7 +484,7 @@ module Datapath ( assign D.I0.REFILL = D.A ? D.IB_REFILL : D.IA_REFILL; assign D.I0.ExcCode = D.A ? D.IB_ExcCode : D.IA_ExcCode; assign D.I0.Delay = D.A ? D.IB_Delay : D.IA_Delay; - assign D.I0.OFA = D.A ? D.IB.OFA : D.IA.OFA; + assign D.I0.OFA = D.A ? D.IB_OFA : D.IA_OFA; assign D.I0.RS = D.A ? D.IB.RS : D.IA.RS; assign D.I0.RT = D.A ? D.IB.RT : D.IA.RT; assign D.I0.S = D.A ? D_IB_ForwardS : D_IA_ForwardS; @@ -500,7 +503,7 @@ module Datapath ( assign D.I1.REFILL = D.A ? D.IA_REFILL : D.IB_REFILL; assign D.I1.ExcCode = D.A ? D.IA_ExcCode : D.IB_ExcCode; assign D.I1.Delay = D.A ? D.IA_Delay : D.IB_Delay; - assign D.I1.OFA = D.A ? D.IA.OFA : D.IB.OFA; + assign D.I1.OFA = D.A ? D.IA_OFA : D.IB_OFA; assign D.I1.RS = D.A ? D.IA.RS : D.IB.RS; assign D.I1.RT = D.A ? D.IA.RT : D.IB.RT; assign D.I1.S = D.A ? D_IA_ForwardS : D_IB_ForwardS; diff --git a/src/include/defines.svh b/src/include/defines.svh index c9d6a35..4b5efd6 100644 --- a/src/include/defines.svh +++ b/src/include/defines.svh @@ -149,6 +149,7 @@ typedef struct packed { logic IA_REFILL; logic [4:0] IA_ExcCode; logic IA_Delay; + logic IA_OFA; word_t IA_S; word_t IA_T; word_t IA_imm; @@ -161,6 +162,7 @@ typedef struct packed { logic IB_REFILL; logic [4:0] IB_ExcCode; logic IB_Delay; + logic IB_OFA; word_t IB_S; word_t IB_T; word_t IB_imm;