From c487401438a03865bcf05f7aaa23142f04d67c2d Mon Sep 17 00:00:00 2001 From: Paul Pan Date: Fri, 30 Jul 2021 15:46:51 +0800 Subject: [PATCH] fix k0 Co-authored-by: cxy004 Co-authored-by: Hooo1941 --- src/MMU/MMU.sv | 6 +++--- src/MyCPU.sv | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/src/MMU/MMU.sv b/src/MMU/MMU.sv index 5955a61..eaa43ae 100644 --- a/src/MMU/MMU.sv +++ b/src/MMU/MMU.sv @@ -8,7 +8,7 @@ module MMU ( input clk, rst, - input logic [1:0] K0, + input logic [2:0] K0, ICache_i.mmu ic, DCache_i.mmu dc, @@ -579,7 +579,7 @@ module MMU ( endmodule module mapping ( - input logic [1:0] K0, + input logic [2:0] K0, input word_t addr_in, output word_t addr_out, output logic cached @@ -593,7 +593,7 @@ module mapping ( cached = 0; end else begin // kseg0 -> CP0.K0 default: uncached addr_out = addr_in & 32'h1FFF_FFFF; - cached = (K0 == 2'b11); + cached = (K0 == 3'b011); end end endmodule diff --git a/src/MyCPU.sv b/src/MyCPU.sv index def62a9..af29906 100644 --- a/src/MyCPU.sv +++ b/src/MyCPU.sv @@ -86,7 +86,7 @@ module mycpu_top ( word_t C0_wdata; EXCEPTION_t C0_exception; word_t C0_EPC; - logic [3:0] K0; + logic [2:0] K0; AXI axi (