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fix top

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This commit is contained in:
Paul Pan 2021-08-24 11:37:54 +08:00
parent c73a8278af
commit 932639a64b
2 changed files with 27 additions and 32 deletions
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31
resources/soc/rtl/TOP/soc_up_top.v
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@ -84,11 +84,11 @@ module soc_up_top(
output phy_rstn,
//------EJTAG-------
input EJTAG_TRST,
input EJTAG_TCK,
input EJTAG_TDI,
input EJTAG_TMS,
output EJTAG_TDO,
// input EJTAG_TRST,
// input EJTAG_TCK,
// input EJTAG_TDI,
// input EJTAG_TMS,
// output EJTAG_TDO,
//------uart-------
inout UART_RX,
@ -555,12 +555,10 @@ assign int_out = {1'b0,dma_int,nand_int,spi_inta_o,uart0_int,mac_int};
assign int_n_i = ~int_out;
// cpu
godson_cpu_mid cpu_mid(
.coreclock (aclk),
.interrupt_i (int_n_i[4:0]), //232 only 5bit
.nmi (1'b1),
.areset_n (aresetn ),
mycpu_top mycpu(
.aclk (aclk ),
.ext_int (int_out ),
.aresetn (aresetn ),
.arid (m0_arid[3:0] ),
.araddr (m0_araddr ),
.arlen (m0_arlen ),
@ -596,16 +594,7 @@ godson_cpu_mid cpu_mid(
.bid (m0_bid[3:0] ),
.bresp (m0_bresp ),
.bvalid (m0_bvalid ),
.bready (m0_bready ),
.EJTAG_TCK (EJTAG_TCK ),
.EJTAG_TDI (EJTAG_TDI ),
.EJTAG_TMS (EJTAG_TMS ),
.EJTAG_TRST (EJTAG_TRST ),
.EJTAG_TDO (EJTAG_TDO ),
.prrst_to_core ( ),
.testmode (1'b0 )
.bready (m0_bready )
);
// AXI_MUX

28
resources/soc/vivado_xpr/soc_up.xdc
View File

@ -125,11 +125,11 @@ set_property PACKAGE_PIN W21 [get_ports {NAND_DATA[1]}]
set_property PACKAGE_PIN AC24 [get_ports {NAND_DATA[0]}]
#ejtag
set_property PACKAGE_PIN J18 [get_ports EJTAG_TRST]
set_property PACKAGE_PIN K18 [get_ports EJTAG_TCK]
set_property PACKAGE_PIN K20 [get_ports EJTAG_TDI]
set_property PACKAGE_PIN K22 [get_ports EJTAG_TMS]
set_property PACKAGE_PIN K21 [get_ports EJTAG_TDO]
# set_property PACKAGE_PIN J18 [get_ports EJTAG_TRST]
# set_property PACKAGE_PIN K18 [get_ports EJTAG_TCK]
# set_property PACKAGE_PIN K20 [get_ports EJTAG_TDI]
# set_property PACKAGE_PIN K22 [get_ports EJTAG_TMS]
# set_property PACKAGE_PIN K21 [get_ports EJTAG_TDO]
set_property IOSTANDARD LVCMOS33 [get_ports clk]
@ -178,12 +178,12 @@ set_property IOSTANDARD LVCMOS33 [get_ports {NAND_DATA[2]}]
set_property IOSTANDARD LVCMOS33 [get_ports {NAND_DATA[1]}]
set_property IOSTANDARD LVCMOS33 [get_ports {NAND_DATA[0]}]
set_property IOSTANDARD LVCMOS33 [get_ports EJTAG_TRST]
set_property IOSTANDARD LVCMOS33 [get_ports EJTAG_TCK]
set_property IOSTANDARD LVCMOS33 [get_ports EJTAG_TDI]
set_property IOSTANDARD LVCMOS33 [get_ports EJTAG_TMS]
set_property IOSTANDARD LVCMOS33 [get_ports EJTAG_TDO]
set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets EJTAG_TCK_IBUF]
# set_property IOSTANDARD LVCMOS33 [get_ports EJTAG_TRST]
# set_property IOSTANDARD LVCMOS33 [get_ports EJTAG_TCK]
# set_property IOSTANDARD LVCMOS33 [get_ports EJTAG_TDI]
# set_property IOSTANDARD LVCMOS33 [get_ports EJTAG_TMS]
# set_property IOSTANDARD LVCMOS33 [get_ports EJTAG_TDO]
# set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets EJTAG_TCK_IBUF]
create_clock -period 40.000 -name mrxclk_0 -waveform {0.000 20.000} [get_ports mrxclk_0]
create_clock -period 40.000 -name mtxclk_0 -waveform {0.000 20.000} [get_ports mtxclk_0]
@ -195,3 +195,9 @@ set_false_path -from [get_clocks clk_out1_clk_pll_33] -to [get_clocks mrxclk_0]
set_false_path -from [get_clocks clk_out1_clk_pll_33] -to [get_clocks mrxclk_0]
set_false_path -from [get_clocks clk_out1_clk_pll_33] -to [get_clocks mtxclk_0]
set_false_path -from [get_clocks clk_out1_clk_pll_33] -to [get_clocks mtxclk_0]
set_false_path -from [get_clocks -of_objects [get_pins mig_axi/u_mig_axi_32_mig/u_ddr3_infrastructure/gen_mmcm.mmcm_i/CLKFBOUT]] -to [get_clocks -of_objects [get_pins clk_pll_33/inst/plle2_adv_inst/CLKOUT0]]
set_false_path -from [get_clocks -of_objects [get_pins mig_axi/u_mig_axi_32_mig/u_ddr3_infrastructure/gen_mmcm.mmcm_i/CLKFBOUT]] -to [get_clocks -of_objects [get_pins clk_pll_33/inst/plle2_adv_inst/CLKOUT1]]
set_false_path -from [get_clocks -of_objects [get_pins clk_pll_33/inst/plle2_adv_inst/CLKOUT0]] -to [get_clocks -of_objects [get_pins mig_axi/u_mig_axi_32_mig/u_ddr3_infrastructure/gen_mmcm.mmcm_i/CLKFBOUT]]
set_false_path -from [get_clocks -of_objects [get_pins clk_pll_33/inst/plle2_adv_inst/CLKOUT1]] -to [get_clocks -of_objects [get_pins mig_axi/u_mig_axi_32_mig/u_ddr3_infrastructure/gen_mmcm.mmcm_i/CLKFBOUT]]