enhanced test cases

README.md

@@ -30,7 +30,7 @@ Our awesome `MIPS` CPU written in `SystemVerilog` for Loongson Cup
   - [ ] 浮点运算指令报`Coprocessor Unusable`，同时`CP0`中新增`Cause.CE` :clock3:
 - [x] 新增指令
 - [ ] `Cache`指令修正
-  - [ ] 完善 Test Cases
+  - [x] 完善 Test Cases
   - [ ] 重新阻止流水线结构 （`TLB`转换）
 
 ## `Cache`指令

resources/2021/soft/func/inst/n98_cache_dcache.S

@@ -222,6 +222,87 @@ TEST_CACHE_DCACHE_HIT(0xa00d0028, 0x800d0028, 4, 0xF0F0F0F0, 0xABCDEFAB)
 .n98_done:
     nop
 
+## CACHE 1 D-Cache Index Writeback Invalid
+
+## Enforced test on writeback whole line
+
+    li t0, 0xa00d0000
+    li t1, 0xa00d0800
+    li t2, 0xa00d1000
+    li t3, 0xa00d1800
+
+    li v0, 0xa00d000c
+.n98_en_rst:
+    beq t0, v0, .n98_en_w_bgn
+    nop
+    sw zero, 0(t0)
+    sw zero, 0(t1)
+    sw zero, 0(t2)
+    sw zero, 0(t3)
+    addi t0, t0, 4
+    addi t1, t1, 4
+    addi t2, t2, 4
+    addi t3, t3, 4
+    j .n98_en_rst
+    nop
+
+.n98_en_w_bgn:
+    li t0, 0x800d0000
+    li t1, 0x800d0800
+    li t2, 0x800d1000
+    li t3, 0x800d1800
+
+    li v0, 0x800d000c
+    li a0, 0xa5a50000
+.n98_en_w:
+    beq t0, v0, .n98_en_chk_bgn
+    nop
+    sw a0, 0(t0)
+    sw a0, 0(t1)
+    sw a0, 0(t2)
+    sw a0, 0(t3)
+    addi t0, t0, 4
+    addi t1, t1, 4
+    addi t2, t2, 4
+    addi t3, t3, 4
+    addi a0, a0, 1
+    j .n98_en_w
+    nop
+
+.n98_en_chk_bgn:
+    li t0, 0xa00d0000
+    li t1, 0xa00d0800
+    li t2, 0xa00d1000
+    li t3, 0xa00d1800
+    li v0, 0xa00d000c
+    li a0, 0xa5a50000
+
+    cache 1, 0(zero)
+.n98_en_chk:
+    beq t0, v0, .n98_en_end
+    nop
+    lw a1, 0(t0)
+    bne a0, a1, inst_error
+    nop
+    lw a1, 0(t1)
+    bne a0, a1, inst_error
+    nop
+    lw a1, 0(t2)
+    bne a0, a1, inst_error
+    nop
+    lw a1, 0(t3)
+    bne a0, a1, inst_error
+    nop
+    addi t0, t0, 4
+    addi t1, t1, 4
+    addi t2, t2, 4
+    addi t3, t3, 4
+    addi a0, a0, 1
+    j .n98_en_chk
+    nop
+.n98_en_end:
+    nop
+
 ###detect exception
     bne s2, zero, inst_error
     nop

resources/2021/soft/func/inst/n99_cache_icache.S

@@ -29,8 +29,8 @@ LEAF(n99_cache_icache_test)
     cache 16, 0(v0) # I-Cache Hit Invalid
     # TODO: clear Datapath on CACHE
     # using enough nop to stop prefetch
-    nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop
+    nop;nop;nop;nop;nop;nop;
-    nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop
+    nop;nop;nop;nop;nop;nop;
     j .n99_1
     nop
 
@@ -65,8 +65,8 @@ LEAF(n99_cache_icache_test)
 .n99_2_check:
     # TODO: clear Datapath on CACHE
     # using enough nop to stop prefetch
-    nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop
+    nop;nop;nop;nop;nop;nop;
-    nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop
+    nop;nop;nop;nop;nop;nop;
     j .n99_2
     nop
 
@@ -101,8 +101,8 @@ LEAF(n99_cache_icache_test)
 .n99_3_check:
     # TODO: clear Datapath on CACHE
     # using enough nop to stop prefetch
-    nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop
+    nop;nop;nop;nop;nop;nop;
-    nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop
+    nop;nop;nop;nop;nop;nop;
     j .n99_3
     nop
 
@@ -129,8 +129,8 @@ LEAF(n99_cache_icache_test)
     cache 0, 0(v0)   # I-Cache Hit Invalid
     # TODO: clear Datapath on CACHE
     # using enough nop to stop prefetch
-    nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop
+    nop;nop;nop;nop;nop;nop;
-    nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop
+    nop;nop;nop;nop;nop;nop;
     j .n99_4
     nop
 
@@ -157,8 +157,8 @@ LEAF(n99_cache_icache_test)
     cache 8, 0(v0)   # I-Cache Index Store Tag
     # TODO: clear Datapath on CACHE
     # using enough nop to stop prefetch
-    nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop
+    nop;nop;nop;nop;nop;nop;
-    nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop
+    nop;nop;nop;nop;nop;nop;
     j .n99_5
     nop
 
@@ -261,8 +261,8 @@ LEAF(n99_cache_icache_test)
 .n99_con_loop_end:
     # TODO: clear Datapath on CACHE
     # using enough nop to stop prefetch
-    nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop
+    nop;nop;nop;nop;nop;nop;
-    nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop
+    nop;nop;nop;nop;nop;nop;
     j .n99_con
     nop
 
@@ -304,6 +304,128 @@ LEAF(n99_cache_icache_test)
 148	00000000	nop
 */
 
+/*
+    Enhanced test:
+        1. fill 800d0000, 800D0800, 800D1000, 800D1800 with instructions
+        2. jump to 800d0000, 800D0800, 800D1000, 800D1800 and execute
+        3. return back to here and check registers
+        4. modify 800d0000, 800D0800, 800D1000, 800D1800
+        5. same as 2 3
+
+        20050000     addi $a1, $zero, 0
+        03e00008     jr   $ra
+        20a5000[]    addi $a1, $a1, [case]
+
+*/
+.n99_en_bgn:
+    move a0, ra
+
+    li t0, 0x800d0000
+    li t1, 0x800d0800
+    li t2, 0x800d1000
+    li t3, 0x800d1800
+
+    li a1, 0x20050000
+    li a2, 0x03e00008
+    li a3, 0x20a50000
+
+.n98_en_step1:
+    sw a1, 0(t0)
+    sw a1, 0(t1)
+    sw a1, 0(t2)
+    sw a1, 0(t3)
+
+    sw a2, 4(t0)
+    sw a2, 4(t1)
+    sw a2, 4(t2)
+    sw a2, 4(t3)
+
+    sw   a3, 8(t0)
+    addi a3, a3, 1
+    sw   a3, 8(t1)
+    addi a3, a3, 1
+    sw   a3, 8(t2)
+    addi a3, a3, 1
+    sw   a3, 8(t3)
+    addi a3, a3, 1
+
+    cache 1, 0(zero)
+    cache 0, 0(zero)
+
+.n98_en_step23:
+    li a1, 0
+    li a2, 0
+    jalr t0
+    nop
+    bne a1, a2, inst_error
+    nop
+
+    li a1, 0
+    li a2, 1
+    jalr t1
+    nop
+    bne a1, a2, inst_error
+    nop
+
+    li a1, 0
+    li a2, 2
+    jalr t2
+    nop
+    bne a1, a2, inst_error
+    nop
+
+    li a1, 0
+    li a2, 3
+    jalr t3
+    nop
+    bne a1, a2, inst_error
+    nop
+
+.n98_en_step4:
+    sw   a3, 8(t0)
+    addi a3, a3, 1
+    sw   a3, 8(t1)
+    addi a3, a3, 1
+    sw   a3, 8(t2)
+    addi a3, a3, 1
+    sw   a3, 8(t3)
+    addi a3, a3, 1
+
+    cache 1, 0(zero)
+    cache 0, 0(zero)
+
+.n98_en_step5:
+    li a1, 0
+    li a2, 4
+    jalr t0
+    nop
+    bne a1, a2, inst_error
+    nop
+
+    li a1, 0
+    li a2, 5
+    jalr t1
+    nop
+    bne a1, a2, inst_error
+    nop
+
+    li a1, 0
+    li a2, 6
+    jalr t2
+    nop
+    bne a1, a2, inst_error
+    nop
+
+    li a1, 0
+    li a2, 7
+    jalr t3
+    nop
+    bne a1, a2, inst_error
+    nop
+
+.n98_en_rst:
+    move ra, a0
+
 ###detect exception
     bne s2, zero, inst_error
     nop

resources/2021/soft/func/start.S

@@ -320,6 +320,27 @@ inst_test:
     jr t9              #kseg0 -> kseg1
     nop                #####
 kseg0_kseg1:
+
+    jal n98_cache_dcache_test
+    nop
+    jal wait_1s
+    nop
+
+    la t1, n99_kseg1_kseg0
+    li t2, 0x20000000
+    subu t9, t1, t2
+    jr t9
+    nop
+n99_kseg1_kseg0:
+    jal n99_cache_icache_test
+    nop
+    jal wait_1s
+    nop
+    la t9, n99_kseg0_kseg1
+    jr t9
+    nop
+n99_kseg0_kseg1:
+
     jal n2_addu_test   #addu
     nop
     jal wait_1s
@@ -704,25 +725,7 @@ kseg0_kseg1:
     nop
     jal wait_1s
     nop
-    jal n98_cache_dcache_test
-    nop
-    jal wait_1s
-    nop
 
-    la t1, n99_kseg1_kseg0
-    li t2, 0x20000000
-    subu t9, t1, t2
-    jr t9
-    nop
-n99_kseg1_kseg0:
-    jal n99_cache_icache_test
-    nop
-    jal wait_1s
-    nop
-    la t9, n99_kseg0_kseg1
-    jr t9
-    nop
-n99_kseg0_kseg1:
     
     jal n100_movz_movn_test
     nop