NSCSCC/MIPS
1
1
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

2alu linux fix (pmon?)

Browse Source
This commit is contained in:
cxy004 2022-08-04 14:42:50 +08:00
parent 95a7ee6c2a
commit 400767053c
3 changed files with 7 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
src/Core/Controller.sv
View File

@ -41,10 +41,10 @@ module Controller (
assign ctrl.ERET = ~inst[31] & inst[30] & inst[4]; assign ctrl.ERET = ~inst[31] & inst[30] & inst[4];
assign ctrl.OFA = ~inst[26] & ~inst[30] & (~inst[29] & ~inst[31] & ~inst[28] & ~inst[27] & inst[5] & ~inst[0] & ~inst[4] & ~inst[2] & ~inst[3] | inst[29] & ~inst[27] & ~inst[31] & ~inst[28]); assign ctrl.OFA = ~inst[26] & ~inst[30] & (~inst[29] & ~inst[31] & ~inst[28] & ~inst[27] & inst[5] & ~inst[0] & ~inst[4] & ~inst[2] & ~inst[3] | inst[29] & ~inst[27] & ~inst[31] & ~inst[28]);
assign ctrl.ES = ~inst[31] & ~inst[27] & (~inst[29] & (~inst[30] & ~inst[28] & ~inst[26] & inst[4] & (inst[5] | inst[3]) | ~inst[28] & inst[26] & inst[19]) | inst[30] & inst[29]) | inst[31] & ~inst[30]; assign ctrl.ES = ~inst[31] & ~inst[27] & (~inst[30] & ~inst[29] & (~inst[28] & ~inst[26] & (~inst[5] & ~inst[4] & inst[3] & ~inst[2] & inst[1] | inst[4] & (inst[5] | inst[3])) | ~inst[28] & inst[26] & inst[19]) | inst[30] & inst[29]) | inst[31] & ~inst[30];
assign ctrl.ET = ~inst[27] & ~inst[26] & (~inst[31] & ~inst[30] & ~inst[29] & ~inst[28] & inst[4] & (inst[5] | inst[3]) | inst[30] & inst[29]); assign ctrl.ET = ~inst[27] & ~inst[26] & (~inst[31] & ~inst[30] & ~inst[29] & ~inst[28] & (~inst[5] & ~inst[4] & inst[3] & ~inst[2] & inst[1] | inst[4] & (inst[5] | inst[3])) | inst[30] & inst[29]);
assign ctrl.ES2 = ~inst[30] & ~inst[28] & ~inst[27] & ~inst[26] & (inst[5] | ~inst[4] & (~inst[3] & inst[2] | inst[3] & ~inst[2] & inst[1])) | inst[29]; assign ctrl.ES2 = ~inst[30] & ~inst[28] & ~inst[27] & ~inst[26] & (inst[5] | ~inst[3] & inst[2]) | inst[29];
assign ctrl.ET2 = ~inst[31] & ~inst[30] & ~inst[29] & ~inst[28] & ~inst[27] & ~inst[26] & ~inst[4] & (~inst[3] | ~inst[2] & inst[1]);; assign ctrl.ET2 = ~inst[31] & ~inst[30] & ~inst[29] & ~inst[28] & ~inst[27] & ~inst[26] & (inst[5] | ~inst[4] & ~inst[3]);
assign ctrl.DS = ~inst[26] & (~inst[31] & ~inst[30] & ~inst[29] & ~inst[28] & ~inst[27] & ~inst[4] & inst[3] & ~inst[2] & ~inst[1] | ~inst[31] & ~inst[29] & inst[28]) | ~inst[31] & ~inst[29] & inst[26] & (inst[28] | ~inst[27] & ~inst[19]); assign ctrl.DS = ~inst[26] & (~inst[31] & ~inst[30] & ~inst[29] & ~inst[28] & ~inst[27] & ~inst[4] & inst[3] & ~inst[2] & ~inst[1] | ~inst[31] & ~inst[29] & inst[28]) | ~inst[31] & ~inst[29] & inst[26] & (inst[28] | ~inst[27] & ~inst[19]);
assign ctrl.DT = ~inst[31] & ~inst[29] & inst[28] & ~inst[27]; assign ctrl.DT = ~inst[31] & ~inst[29] & inst[28] & ~inst[27];

4
src/Core/Datapath.sv
View File

@ -225,7 +225,6 @@ module Datapath (
word_t M_I0_B; word_t M_I0_B;
logic M_I0_ALUvalid; logic M_I0_ALUvalid;
logic M_I0_Overflow; logic M_I0_Overflow;
WCtrl_t M_I0_NowWCtrl;
logic M_I0_NowExcValid; logic M_I0_NowExcValid;
logic M_I0_PrevExcValid; logic M_I0_PrevExcValid;
logic [4:0] M_I0_PrevExcCode; logic [4:0] M_I0_PrevExcCode;
@ -1258,7 +1257,6 @@ module Datapath (
M_I0_ALUvalid, M_I0_ALUvalid,
M_I0_Overflow M_I0_Overflow
); );
assign M_I0_NowWCtrl.RW = M.I0.WCtrl.RW & (~M.I0.MCtrl.RS0[2] | M_I0_ALUvalid);
// M.I0.MUL // M.I0.MUL
ffenr #(97) M_I0_MAS_ff ( ffenr #(97) M_I0_MAS_ff (
@ -1500,7 +1498,7 @@ module Datapath (
ffenrc #(5 + 1) W_I0_WCtrl_ff ( ffenrc #(5 + 1) W_I0_WCtrl_ff (
clk, clk,
rst, rst,
{M.I0.RD, M_I0_NowWCtrl}, {M.I0.RD, M.I0.WCtrl},
W.en, W.en,
~M_go | ~M_I0_go, ~M_go | ~M_I0_go,
{W.I0.RD, W.I0.WCtrl} {W.I0.RD, W.I0.WCtrl}

4
tools/global.txt
View File

@ -6,8 +6,8 @@
32'b000000???????????????00000000100 0 0 0 0 0 0 1 1 0 0 1 1 // SLLV 32'b000000???????????????00000000100 0 0 0 0 0 0 1 1 0 0 1 1 // SLLV
32'b000000???????????????00000000110 0 0 0 0 0 0 1 1 0 0 1 1 // SRLV 32'b000000???????????????00000000110 0 0 0 0 0 0 1 1 0 0 1 1 // SRLV
32'b000000???????????????00000000111 0 0 0 0 0 0 1 1 0 0 1 1 // SRAV 32'b000000???????????????00000000111 0 0 0 0 0 0 1 1 0 0 1 1 // SRAV
32'b000000???????????????00000001010 0 0 0 0 0 0 1 1 0 0 1 1 // MOVZ 32'b000000???????????????00000001010 0 0 0 0 1 1 ? ? 0 0 1 1 // MOVZ
32'b000000???????????????00000001011 0 0 0 0 0 0 1 1 0 0 1 1 // MOVN 32'b000000???????????????00000001011 0 0 0 0 1 1 ? ? 0 0 1 1 // MOVN
32'b000000?????000000000000000001000 0 0 0 0 0 0 0 0 1 0 1 1 // JR 32'b000000?????000000000000000001000 0 0 0 0 0 0 0 0 1 0 1 1 // JR
32'b000000?????00000?????00000001001 0 0 0 0 0 0 0 0 1 0 1 1 // JALR 32'b000000?????00000?????00000001001 0 0 0 0 0 0 0 0 1 0 1 1 // JALR
32'b000000????????????????????001100 1 0 0 0 0 0 0 0 0 0 1 1 // SYSCALL 32'b000000????????????????????001100 1 0 0 0 0 0 0 0 0 0 1 1 // SYSCALL