181 lines
7.0 KiB
C
181 lines
7.0 KiB
C
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#ifndef COMMON_H
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#define COMMON_H
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#define SERIAL 0xffffffffff2001e0
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#ifndef __ASSEMBLER__
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typedef void * va_list;
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#if __GNUC__<3 || (__GNUC__==3 && __GNUC_MINOR__<3)
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#define va_start(ap,fmt) ap=((void *)&fmt)+1;
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#else
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#define va_start __builtin_va_start
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#endif
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#define va_arg __builtin_va_arg
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#define va_end __builtin_va_end
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#define __P(x) x
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typedef unsigned int u_int;
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typedef unsigned long u_long;
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typedef unsigned int uint32_t;
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typedef unsigned int size_t;
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#define isdigit(c) (c>='0' && c<='9')
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#define FMT_RJUST 0
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#define FMT_LJUST 1
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#define FMT_RJUST0 2
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#define FMT_CENTER 3
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#define __read_32bit_c0_register(source, sel) \
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({ int __res; \
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if (sel == 0) \
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__asm__ __volatile__( \
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"mfc0\t%0, " #source "\n\t" \
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: "=r" (__res)); \
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else \
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__asm__ __volatile__( \
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".set\tmips32\n\t" \
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"mfc0\t%0, " #source ", " #sel "\n\t" \
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".set\tmips0\n\t" \
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: "=r" (__res)); \
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__res; \
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})
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#define __write_32bit_c0_register(register, sel, value) \
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do { \
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if (sel == 0) \
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__asm__ __volatile__( \
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"mtc0\t%z0, " #register "\n\t" \
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: : "Jr" ((unsigned int)(value))); \
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else \
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__asm__ __volatile__( \
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".set\tmips32\n\t" \
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"mtc0\t%z0, " #register ", " #sel "\n\t" \
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".set\tmips0" \
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: : "Jr" ((unsigned int)(value))); \
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} while (0)
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#define read_c0_index() __read_32bit_c0_register($0, 0)
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#define write_c0_index(val) __write_32bit_c0_register($0, 0, val)
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#define read_c0_entrylo0() __read_ulong_c0_register($2, 0)
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#define write_c0_entrylo0(val) __write_ulong_c0_register($2, 0, val)
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#define read_c0_entrylo1() __read_ulong_c0_register($3, 0)
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#define write_c0_entrylo1(val) __write_ulong_c0_register($3, 0, val)
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#define read_c0_conf() __read_32bit_c0_register($3, 0)
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#define write_c0_conf(val) __write_32bit_c0_register($3, 0, val)
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#define read_c0_context() __read_ulong_c0_register($4, 0)
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#define write_c0_context(val) __write_ulong_c0_register($4, 0, val)
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#define read_c0_pagemask() __read_32bit_c0_register($5, 0)
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#define write_c0_pagemask(val) __write_32bit_c0_register($5, 0, val)
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#define read_c0_wired() __read_32bit_c0_register($6, 0)
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#define write_c0_wired(val) __write_32bit_c0_register($6, 0, val)
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#define read_c0_info() __read_32bit_c0_register($7, 0)
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#define read_c0_cache() __read_32bit_c0_register($7, 0) /* TX39xx */
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#define write_c0_cache(val) __write_32bit_c0_register($7, 0, val)
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#define read_c0_badvaddr() __read_ulong_c0_register($8, 0)
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#define write_c0_badvaddr(val) __write_ulong_c0_register($8, 0, val)
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#define read_c0_count() __read_32bit_c0_register($9, 0)
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#define write_c0_count(val) __write_32bit_c0_register($9, 0, val)
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#define read_c0_count2() __read_32bit_c0_register($9, 6) /* pnx8550 */
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#define write_c0_count2(val) __write_32bit_c0_register($9, 6, val)
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#define read_c0_count3() __read_32bit_c0_register($9, 7) /* pnx8550 */
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#define write_c0_count3(val) __write_32bit_c0_register($9, 7, val)
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#define read_c0_entryhi() __read_ulong_c0_register($10, 0)
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#define write_c0_entryhi(val) __write_ulong_c0_register($10, 0, val)
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#define read_c0_compare() __read_32bit_c0_register($11, 0)
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#define write_c0_compare(val) __write_32bit_c0_register($11, 0, val)
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#define read_c0_compare2() __read_32bit_c0_register($11, 6) /* pnx8550 */
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#define write_c0_compare2(val) __write_32bit_c0_register($11, 6, val)
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#define read_c0_compare3() __read_32bit_c0_register($11, 7) /* pnx8550 */
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#define write_c0_compare3(val) __write_32bit_c0_register($11, 7, val)
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#define read_c0_status() __read_32bit_c0_register($12, 0)
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#define write_c0_status(val) __write_32bit_c0_register($12, 0, val)
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#define read_c0_cause() __read_32bit_c0_register($13, 0)
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#define write_c0_cause(val) __write_32bit_c0_register($13, 0, val)
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#define read_c0_epc() __read_ulong_c0_register($14, 0)
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#define write_c0_epc(val) __write_ulong_c0_register($14, 0, val)
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#define read_c0_prid() __read_32bit_c0_register($15, 0)
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#define read_c0_config() __read_32bit_c0_register($16, 0)
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#define read_c0_config1() __read_32bit_c0_register($16, 1)
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#define read_c0_config2() __read_32bit_c0_register($16, 2)
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#define read_c0_config3() __read_32bit_c0_register($16, 3)
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#define read_c0_config4() __read_32bit_c0_register($16, 4)
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#define read_c0_config5() __read_32bit_c0_register($16, 5)
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#define read_c0_config6() __read_32bit_c0_register($16, 6)
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#define read_c0_config7() __read_32bit_c0_register($16, 7)
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#define write_c0_config(val) __write_32bit_c0_register($16, 0, val)
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#define write_c0_config1(val) __write_32bit_c0_register($16, 1, val)
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#define write_c0_config2(val) __write_32bit_c0_register($16, 2, val)
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#define write_c0_config3(val) __write_32bit_c0_register($16, 3, val)
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#define write_c0_config4(val) __write_32bit_c0_register($16, 4, val)
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#define write_c0_config5(val) __write_32bit_c0_register($16, 5, val)
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#define write_c0_config6(val) __write_32bit_c0_register($16, 6, val)
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#define write_c0_config7(val) __write_32bit_c0_register($16, 7, val)
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/*
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* The WatchLo register. There may be upto 8 of them.
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*/
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#define read_c0_watchlo0() __read_ulong_c0_register($18, 0)
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#define read_c0_watchlo1() __read_ulong_c0_register($18, 1)
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#define read_c0_watchlo2() __read_ulong_c0_register($18, 2)
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#define read_c0_watchlo3() __read_ulong_c0_register($18, 3)
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#define read_c0_watchlo4() __read_ulong_c0_register($18, 4)
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#define read_c0_watchlo5() __read_ulong_c0_register($18, 5)
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#define read_c0_watchlo6() __read_ulong_c0_register($18, 6)
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#define read_c0_watchlo7() __read_ulong_c0_register($18, 7)
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#define write_c0_watchlo0(val) __write_ulong_c0_register($18, 0, val)
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#define write_c0_watchlo1(val) __write_ulong_c0_register($18, 1, val)
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#define write_c0_watchlo2(val) __write_ulong_c0_register($18, 2, val)
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#define write_c0_watchlo3(val) __write_ulong_c0_register($18, 3, val)
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#define write_c0_watchlo4(val) __write_ulong_c0_register($18, 4, val)
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#define write_c0_watchlo5(val) __write_ulong_c0_register($18, 5, val)
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#define write_c0_watchlo6(val) __write_ulong_c0_register($18, 6, val)
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#define write_c0_watchlo7(val) __write_ulong_c0_register($18, 7, val)
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/*
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* The WatchHi register. There may be upto 8 of them.
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*/
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#define read_c0_watchhi0() __read_32bit_c0_register($19, 0)
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#define read_c0_watchhi1() __read_32bit_c0_register($19, 1)
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#define read_c0_watchhi2() __read_32bit_c0_register($19, 2)
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#define read_c0_watchhi3() __read_32bit_c0_register($19, 3)
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#define read_c0_watchhi4() __read_32bit_c0_register($19, 4)
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#define read_c0_watchhi5() __read_32bit_c0_register($19, 5)
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#define read_c0_watchhi6() __read_32bit_c0_register($19, 6)
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#define read_c0_watchhi7() __read_32bit_c0_register($19, 7)
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#define write_c0_watchhi0(val) __write_32bit_c0_register($19, 0, val)
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#define write_c0_watchhi1(val) __write_32bit_c0_register($19, 1, val)
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#define write_c0_watchhi2(val) __write_32bit_c0_register($19, 2, val)
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#define write_c0_watchhi3(val) __write_32bit_c0_register($19, 3, val)
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#define write_c0_watchhi4(val) __write_32bit_c0_register($19, 4, val)
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#define write_c0_watchhi5(val) __write_32bit_c0_register($19, 5, val)
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#define write_c0_watchhi6(val) __write_32bit_c0_register($19, 6, val)
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#define write_c0_watchhi7(val) __write_32bit_c0_register($19, 7, val)
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#endif
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#endif
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