185 lines
3.6 KiB
ArmAsm
185 lines
3.6 KiB
ArmAsm
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#include <asm.h>
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#include <regdef.h>
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#include <inst_test.h>
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LEAF(n82_blez_ds_ex_test)
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.set noreorder
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addiu s0, s0, 1
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li t0, 0x800d0000
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##clear cause.TI, status.EXL
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mtc0 zero, c0_compare
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lui s7,0x0040
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mtc0 s7, c0_status
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nop
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###test inst
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##1: syscall
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li s2, 0x01
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lui s7, 0x0001 #ex, ref return value.
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sw s2, 0(t0)
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la s4, 1f
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1: blez zero, inst_error
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syscall
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bne s2, s7, inst_error
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nop
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li s2, 0x01
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la s4, 2f
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2: blez s2, inst_error
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syscall
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bne s2, s7, inst_error
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nop
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##2: break
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li s2, 0x02
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lui s7, 0x0002 #ex, ref return value.
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sw s2, 0(t0)
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la s4, 1f
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1: blez zero, inst_error
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break
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bne s2, s7, inst_error
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nop
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li s2, 0x02
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la s4, 2f
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2: blez s2, inst_error
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break
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bne s2, s7, inst_error
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nop
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##3: ov
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li s2, 0x03
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lui s7, 0x0003 #ex, ref return value.
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sw s2, 0(t0)
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la s4, 1f
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li a0, 0xba034f60
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li a1, 0xb615fd67
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1: blez zero, inst_error
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add s7, a0, a1
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bne s2, s7, inst_error
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nop
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li s2, 0x03
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la s4, 2f
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2: blez s2, inst_error
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add s7, a0, a1
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sw s7, 0(t0)
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bne s2, s7, inst_error
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nop
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li s2, 0x03
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sw s2, 0(t0)
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la s4, 1f
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li a0,0x7fffc19e
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1: blez zero, inst_error
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addi s7, a0, 0x6512
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bne s2, s7, inst_error
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nop
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li s2, 0x03
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la s4, 2f
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2: blez s2, inst_error
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addi s7, a0, 0x6512
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bne s2, s7, inst_error
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nop
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li s2, 0x03
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la s4, 1f
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li a0, 0xa85e7d00
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li a1, 0x6b7e8e36
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1: blez zero, inst_error
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sub s7, a0, a1
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bne s2, s7, inst_error
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nop
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li s2, 0x03
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la s4, 2f
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2: blez s2, inst_error
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sub s7, a0, a1
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bne s2, s7, inst_error
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nop
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##4: load adel
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li s2, 0x04
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lui s7, 0x0004 #ex, ref return value.
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sw s2, 0(t0)
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la s4, 1f
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1: blez zero, inst_error
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lw s7, 2(t0)
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bne s2, s7, inst_error
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nop
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li s2, 0x04
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la s4, 2f
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2: blez s2, inst_error
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lw s7, 2(t0)
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bne s2, s7, inst_error
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nop
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li s2, 0x04
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la s4, 1f
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1: blez zero, inst_error
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lh s7, 1(t0)
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divu zero, s7, s2
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bne s2, s7, inst_error
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nop
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li s2, 0x04
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la s4, 2f
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2: blez s2, inst_error
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lh s7, 1(t0)
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bne s2, s7, inst_error
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nop
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la s4, 1f
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1: blez zero, inst_error
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lhu s7, 3(t0)
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bne s2, s7, inst_error
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nop
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li s2, 0x04
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la s4, 2f
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2: blez s2, inst_error
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lhu s7, 3(t0)
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bne s2, s7, inst_error
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nop
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##5: store ades
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li s2, 0x05
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lui s7, 0x0005 #ex, ref return value.
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sw s2, 0(t0)
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la s4, 1f
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1: blez zero, inst_error
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sw s7, 2(t0)
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bne s2, s7, inst_error
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nop
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li s2, 0x05
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la s4, 2f
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2: blez s2, inst_error
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sw s7, 2(t0)
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bne s2, s7, inst_error
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nop
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li s2, 0x05
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la s4, 1f
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1: blez zero, inst_error
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sh s7, 1(t0)
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bne s2, s7, inst_error
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nop
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li s2, 0x05
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la s4, 2f
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2: blez s2, inst_error
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sh s7, 1(t0)
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bne s2, s7, inst_error
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nop
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##6: fetch adel:no
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##7: reserved instruction
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li s2, 0x07
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lui s7, 0x0007 #ex, ref return value.
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sw s2, 0(t0)
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la s4, 1f
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1: blez zero, inst_error
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.word 0x9e3c56aa
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mult s7, s2
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bne s2, s7, inst_error
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nop
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li s2, 0x07
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la s4, 2f
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mult s7, s2
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2: blez s2, inst_error
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.word 0xec1ba960
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bne s2, s7, inst_error
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nop
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###score ++
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addiu s3, s3, 1
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###output (s0<<24)|s3
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inst_error:
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sll t1, s0, 24
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or t0, t1, s3
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sw t0, 0(s1)
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jr ra
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nop
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END(n82_blez_ds_ex_test)
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