Commit Graph

9 Commits

Author SHA1 Message Date
Wenyong Huang
a182926a73
Refactor interpreter/AOT module instance layout (#1559)
Refactor the layout of interpreter and AOT module instance:
- Unify the interp/AOT module instance, use the same WASMModuleInstance/
  WASMMemoryInstance/WASMTableInstance data structures for both interpreter
  and AOT
- Make the offset of most fields the same in module instance for both interpreter
  and AOT, append memory instance structure, global data and table instances to
  the end of module instance for interpreter mode (like AOT mode)
- For extra fields in WASM module instance, use WASMModuleInstanceExtra to
  create a field `e` for interpreter
- Change the LLVM JIT module instance creating process, LLVM JIT uses the WASM
  module and module instance same as interpreter/Fast-JIT mode. So that Fast JIT
  and LLVM JIT can access the same data structures, and make it possible to
  implement the Multi-tier JIT (tier-up from Fast JIT to LLVM JIT) in the future
- Unify some APIs: merge some APIs for module instance and memory instance's
  related operations (only implement one copy)

Note that the AOT ABI is same, the AOT file format, AOT relocation types, how AOT
code accesses the AOT module instance and so on are kept unchanged.

Refer to:
https://github.com/bytecodealliance/wasm-micro-runtime/issues/1384
2022-10-18 10:59:28 +08:00
Huang Qi
2178787664
Implement i64.div and i64.rem intrinsics (#1375) 2022-08-12 11:09:06 +08:00
Wenyong Huang
6922f3ac68
Implement xtensa XIP (#1202)
Lookup table for i32.const and i64.const for xtensa XIP
Lookup const offset from table for load/store opcodes for xtensa XIP
Fill capability flags for xtensa XIP
Enable lower switch pass for xtensa XIP
2022-08-04 14:42:28 +08:00
Huang Qi
a41c1ad85c
Don't use constant float table on arm and riscv (#903)
Don't use constant float table on arm and riscv as LLVM doesn't generate
.LPCI/.rodata like relocations on them, the float/double constants are encoded
into instructions directly, so no need to lookup them from constant table.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2021-12-20 11:10:52 +08:00
Wenyong Huang
52b6c73d9c
Apply clang-format for more src files and update spec test script (#775)
Apply clang-format for core/iwasm/include, core/iwasm/common and
core/iwasm/aot files.

Update spec cases test script:
- Checkout latest commit of https://github.com/WebAssembly/spec
- Checkout main branch but not master of https://github.com/WebAssembly/threads
- Update wabt to latest version

And update source debugging document.

Signed-off-by: Wenyong Huang <wenyong.huang@intel.com>
2021-10-08 17:47:11 +08:00
Wenyong Huang
310feb6536
Fix compilation warnings (#754) 2021-09-16 16:36:42 +08:00
Huang Qi
cef7d35be1
Implement float and integer conversion intrinsics (#718) 2021-09-02 16:39:53 +08:00
Huang Qi
5d2882f05f
Make aot intrinsic flags readable (#711)
Make aot intrinsic flags easier to read and understand

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2021-09-01 18:24:16 +08:00
Wenyong Huang
db695fada4
Implement XIP feature and enable ARC target support (#694)
Implement XIP (Execution In Place) feature for AOT mode to enable running the AOT code inside AOT file directly, without memory mapping the executable memory for AOT code and applying relocations for text section. Developer can use wamrc with "--enable-indirect-mode --disable-llvm-intrinsics" flags to generate the AOT file and run iwasm with "--xip" flag. Known issues: there might still be some relocations in the text section which access the ".rodata" like sections.

And also enable ARC target support for both interpreter mode and AOT mode.

Signed-off-by: Wenyong Huang <wenyong.huang@intel.com>
2021-08-12 17:44:39 +08:00