Since DPFPU depends on FPU, if FPU is enabled we will never enter DPFPU
branch since `ifeq (${CONFIG_ARCH_FPU}, y)` is always true.
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
Applied on the nuttx platform, some memory configurations are added,
and aot and interp can be completely closed or opened, thereby reducing
the flash size.
Implement XIP (Execution In Place) feature for AOT mode to enable running the AOT code inside AOT file directly, without memory mapping the executable memory for AOT code and applying relocations for text section. Developer can use wamrc with "--enable-indirect-mode --disable-llvm-intrinsics" flags to generate the AOT file and run iwasm with "--xip" flag. Known issues: there might still be some relocations in the text section which access the ".rodata" like sections.
And also enable ARC target support for both interpreter mode and AOT mode.
Signed-off-by: Wenyong Huang <wenyong.huang@intel.com>
Enable RISCV AOT support, the supported ABIs are LP64 and LP64D for riscv64, ILP32 and ILP32D for riscv32.
For wamrc:
use --target=riscv64/riscv32 to specify the target arch of output AOT file,
use --target-abi=lp64d/lp64/ilp32d/ilp32 to specify the target ABI,
if --target-abi isn't specified, by default lp64d is used for riscv64, and ilp32d is used for riscv32.
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
Co-authored-by: wenyongh <wenyong.huang@intel.com>
And fix libc-builtin print float issue
Add a list to track all third party components
Fix compile error when MEMORY_TRACING is enabled
Signed-off-by: Wenyong Huang <wenyong.huang@intel.com>
