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platform/nuttx: Support riscv based chips (#648)

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Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
This commit is contained in:
Huang Qi 2021-06-07 15:37:09 +08:00 committed by GitHub
parent a5ffd656fa
commit 5d9597f064
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GPG Key ID: 4AEE18F83AFDEB23
2 changed files with 34 additions and 1 deletions
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1
core/shared/platform/nuttx/platform_internal.h
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@ -6,6 +6,7 @@
#ifndef _PLATFORM_INTERNAL_H
#define _PLATFORM_INTERNAL_H
#include <assert.h>
#include <ctype.h>
#include <errno.h>
#include <inttypes.h>

34
product-mini/platforms/nuttx/wamr.mk
View File

@ -17,6 +17,10 @@ else ifeq ($(CONFIG_ARCH_X86_64),y)
WAMR_BUILD_TARGET := X86_64
else ifeq ($(CONFIG_ARCH_XTENSA),y)
WAMR_BUILD_TARGET := XTENSA
else ifeq ($(CONFIG_ARCH_RV64GC),y)
WAMR_BUILD_TARGET := RISCV64
else ifeq ($(CONFIG_ARCH_RV32IM),y)
WAMR_BUILD_TARGET := RISCV32
else ifeq ($(CONFIG_ARCH_SIM),y)
ifeq ($(CONFIG_SIM_M32),y)
WAMR_BUILD_TARGET := X86_32
@ -62,8 +66,36 @@ else ifeq (${WAMR_BUILD_TARGET}, XTENSA)
CFLAGS += -DBUILD_TARGET_XTENSA
INVOKE_NATIVE := invokeNative_xtensa.s
AOT_RELOC := aot_reloc_xtensa.c
else ifeq (${WAMR_BUILD_TARGET}, RISCV64)
ifeq (${CONFIG_ARCH_FPU},y)
$(error riscv64 lp64f is unsupported)
else ifeq (${CONFIG_ARCH_DPFPU}, y)
CFLAGS += -DBUILD_TARGET_RISCV64_LP64D
INVOKE_NATIVE += invokeNative_riscv64_lp64d.s
else
$(error Build target don't support)
CFLAGS += -DBUILD_TARGET_RISCV64_LP64
INVOKE_NATIVE += invokeNative_riscv64_lp64.s
endif
AOT_RELOC :=
else ifeq (${WAMR_BUILD_TARGET}, RISCV32)
ifeq (${CONFIG_ARCH_FPU}, y)
$(error riscv32 ilp32f is unsupported)
else ifeq (${CONFIG_ARCH_DPFPU}, y)
CFLAGS += -DBUILD_TARGET_RISCV64_ILP32D
INVOKE_NATIVE += invokeNative_riscv32_ilp32d.s
else
CFLAGS += -DBUILD_TARGET_RISCV64_ILP32
INVOKE_NATIVE += invokeNative_riscv32_ilp32.s
endif
AOT_RELOC :=
else
$(error Build target is unsupported)
endif
ifeq (${CONFIG_INTERPRETERS_WAMR_LOG},y)