85 lines
1.7 KiB
C
85 lines
1.7 KiB
C
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/*
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* Copyright (C) 2021 Intel Corporation. All rights reserved.
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* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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*/
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#ifndef _JIT_CODEGEN_H_
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#define _JIT_CODEGEN_H_
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#include "bh_platform.h"
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#include "jit_compiler.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* Initialize codegen module, such as instruction encoder.
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*
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* @return true if succeeded; false if failed.
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*/
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bool
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jit_codegen_init();
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/**
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* Destroy codegen module, such as instruction encoder.
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*/
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void
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jit_codegen_destroy();
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/**
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* Get hard register information of each kind.
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*
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* @return the JitHardRegInfo array of each kind
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*/
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const JitHardRegInfo *
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jit_codegen_get_hreg_info();
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/**
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* Get hard register by name.
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*
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* @param name the name of the hard register
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*
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* @return the hard register of the name
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*/
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JitReg
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jit_codegen_get_hreg_by_name(const char *name);
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/**
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* Generate native code for the given compilation context
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*
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* @param cc the compilation context that is ready to do codegen
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*
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* @return true if succeeds, false otherwise
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*/
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bool
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jit_codegen_gen_native(JitCompContext *cc);
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/**
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* lower unsupported operations to supported ones for the target.
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*
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* @param cc the compilation context that is ready to do codegen
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*
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* @return true if succeeds, false otherwise
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*/
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bool
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jit_codegen_lower(JitCompContext *cc);
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/**
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* Dump native code in the given range to assembly.
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*
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* @param begin_addr begin address of the native code
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* @param end_addr end address of the native code
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*/
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void
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jit_codegen_dump_native(void *begin_addr, void *end_addr);
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int
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jit_codegen_interp_jitted_glue(void *self, JitInterpSwitchInfo *info, void *pc);
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#ifdef __cplusplus
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}
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#endif
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#endif /* end of _JIT_CODEGEN_H_ */
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