233 lines
9.0 KiB
C
233 lines
9.0 KiB
C
/**
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******************************************************************************
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* @file bflb_emac.h
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* @version V1.0
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* @date 2022-09-27
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* @brief This file is the low hardware abstraction layer file
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2022 Bouffalo Lab</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of Bouffalo Lab nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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#ifndef _BFLB_EMAC_H
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#define _BFLB_EMAC_H
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#include "bflb_core.h"
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#define EMAC_DO_FLUSH_DATA (1)
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/* EMAC clock use external or use internal; 0: used external 1: used internal */
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#define EMAC_CLK_USE_EXTERNAL (0)
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#define EMAC_CLK_USE_INTERNAL (1)
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/** @defgroup EMAC_CMD emac feature control cmd definition
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* @{
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*/
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#define EMAC_CMD_NO_PREAMBLE_MODE (0x01)
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#define EMAC_CMD_EN_PROMISCUOUS (0x02)
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#define EMAC_CMD_FRAME_GAP_CHECK (0x03)
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#define EMAC_CMD_FULL_DUPLEX (0x04)
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#define EMAC_CMD_EN_TX_CRC_FIELD (0x05)
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#define EMAC_CMD_RECV_HUGE_FRAMES (0x06)
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#define EMAC_CMD_EN_AUTO_PADDING (0x07)
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#define EMAC_CMD_RECV_SMALL_FRAME (0x08)
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#define EMAC_CMD_SET_PHY_ADDRESS (0x09)
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#define EMAC_CMD_SET_MAC_ADDRESS (0x0A)
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#define EMAC_CMD_SET_PACKET_GAP (0x0B)
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#define EMAC_CMD_SET_MIN_FRAME (0x0C)
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#define EMAC_CMD_SET_MAX_FRAME (0x0D)
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#define EMAC_CMD_SET_MAXRET (0x0E)
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#define EMAC_CMD_SET_COLLVALID (0x0F)
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/** @defgroup PHY state definition
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* @{
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*/
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#define PHY_STATE_DOWN (0) /* PHY is not usable */
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#define PHY_STATE_READY (1) /* PHY is OK, wait for controller */
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#define PHY_STATE_UP (2) /* Network is ready for TX/RX */
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#define PHY_STATE_RUNNING (3) /* working */
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#define PHY_STATE_NOLINK (4) /* no cable connected */
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#define PHY_STATE_STOPPED (5) /* PHY has been stopped */
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#define PHY_STATE_TESTING (6) /* in test mode */
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/* EMAC PACKET */
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#define EMAC_NORMAL_PACKET (uint32_t)(0)
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#define EMAC_FRAGMENT_PACKET (uint32_t)(0x01)
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#define EMAC_NOCOPY_PACKET (uint32_t)(0x02)
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/* ETH packet size */
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/* ETH | Header | Extra | VLAN tag | Payload | CRC | */
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/* Size | 14 | 2 | 4 | 46 ~ 1500 | 4 | */
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#define ETH_MAX_PACKET_SIZE ((uint32_t)1524U) /*!< ETH_HEADER + ETH_EXTRA + ETH_VLAN_TAG + ETH_MAX_ETH_PAYLOAD + ETH_CRC */
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#define ETH_HEADER_SZIE ((uint32_t)14U) /*!< 6 byte Dest addr, 6 byte Src addr, 2 byte length/type */
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#define ETH_CRC_SIZE ((uint32_t)4U) /*!< Ethernet CRC */
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#define ETH_EXTRA_SIZE ((uint32_t)2U) /*!< Extra bytes in some cases */
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#define ETH_VLAN_TAG_SIZE ((uint32_t)4U) /*!< optional 802.1q VLAN Tag */
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#define ETH_MIN_ETH_PAYLOAD_SIZE ((uint32_t)46U) /*!< Minimum Ethernet payload size */
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#define ETH_MAX_ETH_PAYLOAD_SIZE ((uint32_t)1500U) /*!< Maximum Ethernet payload size */
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#define ETH_JUMBO_FRAME_PAYLOAD_SIZE ((uint32_t)9000U) /*!< Jumbo frame payload size */
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/* ETH tx & rx buffer size */
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#ifndef ETH_TX_BUFFER_SIZE
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#define ETH_TX_BUFFER_SIZE (ETH_MAX_PACKET_SIZE)
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#endif
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#ifndef ETH_RX_BUFFER_SIZE
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#define ETH_RX_BUFFER_SIZE (ETH_MAX_PACKET_SIZE)
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#endif
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/* emac interrupt UNMASK/MASK define */
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#define EMAC_INT_EN_TX_DONE (1 << 0)
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#define EMAC_INT_EN_TX_ERROR (1 << 1)
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#define EMAC_INT_EN_RX_DONE (1 << 2)
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#define EMAC_INT_EN_RX_ERROR (1 << 3)
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#define EMAC_INT_EN_RX_BUSY (1 << 4)
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#define EMAC_INT_EN_TX_CTRL (1 << 5)
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#define EMAC_INT_EN_RX_CTRL (1 << 6)
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#define EMAC_INT_EN_ALL (0x7f << 0)
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/* emac interrupt status define */
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#define EMAC_INT_STS_TX_DONE (1 << 0)
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#define EMAC_INT_STS_TX_ERROR (1 << 1)
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#define EMAC_INT_STS_RX_DONE (1 << 2)
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#define EMAC_INT_STS_RX_ERROR (1 << 3)
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#define EMAC_INT_STS_RX_BUSY (1 << 4)
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#define EMAC_INT_STS_TX_CTRL (1 << 5)
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#define EMAC_INT_STS_RX_CTRL (1 << 6)
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#define EMAC_INT_STS_ALL (0x7f << 0)
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/* emac buffer descriptors type define */
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#define EMAC_BD_TYPE_INVLAID (0)
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#define EMAC_BD_TYPE_TX (1)
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#define EMAC_BD_TYPE_RX (2)
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#define EMAC_BD_TYPE_NONE (3)
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#define EMAC_BD_TYPE_MAX (0x7FFFFFFF)
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/**
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* @brief EMAC configuration structure
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*
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* @param mac_addr EMAC mac addr
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* @param inside_clk EMAC select inside or external @ref EMAC_CLK_USE_EXTERNAL or EMAC_CLK_USE_INTERNAL
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* @param mii_clk_div mii clock div
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* @param min_frame_len min frame len
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* @param max_frame_len max frame len
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*
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*/
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struct bflb_emac_config_s {
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uint8_t mac_addr[6];
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uint8_t inside_clk;
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uint8_t mii_clk_div;
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uint16_t min_frame_len;
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uint16_t max_frame_len;
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};
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/**
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* @brief EMAC phy configuration structure
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*
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* @param auto_negotiation EMAC phy speed and mode auto negotiation
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* @param full_duplex EMAC phy duplex mode
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* @param phy_state EMAC phy down,ready,up,running,nolink,halted, @ref PHY_STATE
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* @param use_irq EMAC phy interrupt enable 0: no IRQ used
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* @param speed EMAC phy speed mode
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* @param phy_address EMAC phy address
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* @param phy_id EMAC phy read phy id
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*/
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struct emac_phy_cfg_s {
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uint8_t auto_negotiation;
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uint8_t full_duplex;
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uint8_t phy_state;
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uint8_t use_irq;
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uint16_t speed;
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uint16_t phy_address;
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uint32_t phy_id;
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};
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/**
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* @brief Note: Always write DWORD1 (buffer addr) first then DWORD0 for racing concern.
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*/
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struct emac_bd_desc_s {
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uint32_t C_S_L; /*!< Buffer Descriptors(BD) control,status,length */
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uint32_t Buffer; /*!< BD buffer address */
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};
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/**
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* @brief emac handle type definition
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* @param bd Tx descriptor header pointer
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* @param tx_index_emac TX index: EMAC
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* @param tx_index_cpu TX index: CPU/SW
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* @param tx_buff_limit TX index max
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* @param rsv0 rsv0
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* @param rx_index_emac RX index: EMAC
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* @param rx_index_cpu RX index: CPU/SW
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* @param rx_buff_limit RX index max
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* @param rsv1 rsv1
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*
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*/
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struct emac_handle_s {
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struct emac_bd_desc_s *bd;
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uint8_t tx_index_emac;
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uint8_t tx_index_cpu;
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uint8_t tx_buff_limit;
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uint8_t rsv0;
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uint8_t rx_index_emac;
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uint8_t rx_index_cpu;
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uint8_t rx_buff_limit;
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uint8_t rsv1;
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};
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#ifdef __cplusplus
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extern "C" {
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#endif
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void bflb_emac_init(struct bflb_device_s *dev, const struct bflb_emac_config_s *config);
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void bflb_emac_bd_init(struct bflb_device_s *dev, uint8_t *eth_tx_buff, uint8_t tx_buf_count, uint8_t *eth_rx_buff, uint8_t rx_buf_count);
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int emac_bd_fragment_support(void);
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int bflb_emac_feature_control(struct bflb_device_s *dev, int cmd, size_t arg);
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void bflb_emac_int_enable(struct bflb_device_s *dev, uint32_t flag, bool enable);
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void bflb_emac_int_clear(struct bflb_device_s *dev, uint32_t flag);
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uint32_t bflb_emac_get_int_status(struct bflb_device_s *dev);
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uint32_t bflb_emac_bd_get_cur_active(struct bflb_device_s *dev, uint8_t bdt);
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void bflb_emac_bd_rx_enqueue(uint32_t index);
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void bflb_emac_bd_rx_on_err(uint32_t index);
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void bflb_emac_bd_tx_dequeue(uint32_t index);
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void bflb_emac_bd_tx_on_err(uint32_t index);
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int bflb_emac_bd_tx_enqueue(uint32_t flags, uint32_t len, const uint8_t *data_in);
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int bflb_emac_bd_rx_dequeue(uint32_t flags, uint32_t *len, uint8_t *data_out);
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int bflb_emac_phy_reg_read(struct bflb_device_s *dev, uint16_t phy_reg, uint16_t *phy_reg_val);
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int bflb_emac_phy_reg_write(struct bflb_device_s *dev, uint16_t phy_reg, uint16_t phy_reg_val);
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void bflb_emac_stop(struct bflb_device_s *dev);
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void bflb_emac_start(struct bflb_device_s *dev);
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void bflb_emac_start_tx(struct bflb_device_s *dev);
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void bflb_emac_stop_tx(struct bflb_device_s *dev);
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void bflb_emac_start_rx(struct bflb_device_s *dev);
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void bflb_emac_stop_rx(struct bflb_device_s *dev);
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#ifdef __cplusplus
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}
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#endif
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#endif /* _BFLB_EMAC_H */ |