213 lines
12 KiB
C
213 lines
12 KiB
C
/**
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******************************************************************************
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* @file sec_dbg_reg.h
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* @version V1.2
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* @date 2020-03-30
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* @brief This file is the description of.IP register
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2019 Bouffalo Lab</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of Bouffalo Lab nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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#ifndef __SEC_DBG_REG_H__
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#define __SEC_DBG_REG_H__
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#include "bl702.h"
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/* 0x0 : sd_chip_id_low */
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#define SEC_DBG_SD_CHIP_ID_LOW_OFFSET (0x0)
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#define SEC_DBG_SD_CHIP_ID_LOW SEC_DBG_SD_CHIP_ID_LOW
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#define SEC_DBG_SD_CHIP_ID_LOW_POS (0U)
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#define SEC_DBG_SD_CHIP_ID_LOW_LEN (32U)
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#define SEC_DBG_SD_CHIP_ID_LOW_MSK (((1U<<SEC_DBG_SD_CHIP_ID_LOW_LEN)-1)<<SEC_DBG_SD_CHIP_ID_LOW_POS)
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#define SEC_DBG_SD_CHIP_ID_LOW_UMSK (~(((1U<<SEC_DBG_SD_CHIP_ID_LOW_LEN)-1)<<SEC_DBG_SD_CHIP_ID_LOW_POS))
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/* 0x4 : sd_chip_id_high */
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#define SEC_DBG_SD_CHIP_ID_HIGH_OFFSET (0x4)
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#define SEC_DBG_SD_CHIP_ID_HIGH SEC_DBG_SD_CHIP_ID_HIGH
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#define SEC_DBG_SD_CHIP_ID_HIGH_POS (0U)
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#define SEC_DBG_SD_CHIP_ID_HIGH_LEN (32U)
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#define SEC_DBG_SD_CHIP_ID_HIGH_MSK (((1U<<SEC_DBG_SD_CHIP_ID_HIGH_LEN)-1)<<SEC_DBG_SD_CHIP_ID_HIGH_POS)
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#define SEC_DBG_SD_CHIP_ID_HIGH_UMSK (~(((1U<<SEC_DBG_SD_CHIP_ID_HIGH_LEN)-1)<<SEC_DBG_SD_CHIP_ID_HIGH_POS))
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/* 0x8 : sd_wifi_mac_low */
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#define SEC_DBG_SD_WIFI_MAC_LOW_OFFSET (0x8)
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#define SEC_DBG_SD_WIFI_MAC_LOW SEC_DBG_SD_WIFI_MAC_LOW
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#define SEC_DBG_SD_WIFI_MAC_LOW_POS (0U)
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#define SEC_DBG_SD_WIFI_MAC_LOW_LEN (32U)
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#define SEC_DBG_SD_WIFI_MAC_LOW_MSK (((1U<<SEC_DBG_SD_WIFI_MAC_LOW_LEN)-1)<<SEC_DBG_SD_WIFI_MAC_LOW_POS)
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#define SEC_DBG_SD_WIFI_MAC_LOW_UMSK (~(((1U<<SEC_DBG_SD_WIFI_MAC_LOW_LEN)-1)<<SEC_DBG_SD_WIFI_MAC_LOW_POS))
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/* 0xC : sd_wifi_mac_high */
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#define SEC_DBG_SD_WIFI_MAC_HIGH_OFFSET (0xC)
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#define SEC_DBG_SD_WIFI_MAC_HIGH SEC_DBG_SD_WIFI_MAC_HIGH
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#define SEC_DBG_SD_WIFI_MAC_HIGH_POS (0U)
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#define SEC_DBG_SD_WIFI_MAC_HIGH_LEN (32U)
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#define SEC_DBG_SD_WIFI_MAC_HIGH_MSK (((1U<<SEC_DBG_SD_WIFI_MAC_HIGH_LEN)-1)<<SEC_DBG_SD_WIFI_MAC_HIGH_POS)
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#define SEC_DBG_SD_WIFI_MAC_HIGH_UMSK (~(((1U<<SEC_DBG_SD_WIFI_MAC_HIGH_LEN)-1)<<SEC_DBG_SD_WIFI_MAC_HIGH_POS))
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/* 0x10 : sd_dbg_pwd_low */
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#define SEC_DBG_SD_DBG_PWD_LOW_OFFSET (0x10)
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#define SEC_DBG_SD_DBG_PWD_LOW SEC_DBG_SD_DBG_PWD_LOW
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#define SEC_DBG_SD_DBG_PWD_LOW_POS (0U)
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#define SEC_DBG_SD_DBG_PWD_LOW_LEN (32U)
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#define SEC_DBG_SD_DBG_PWD_LOW_MSK (((1U<<SEC_DBG_SD_DBG_PWD_LOW_LEN)-1)<<SEC_DBG_SD_DBG_PWD_LOW_POS)
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#define SEC_DBG_SD_DBG_PWD_LOW_UMSK (~(((1U<<SEC_DBG_SD_DBG_PWD_LOW_LEN)-1)<<SEC_DBG_SD_DBG_PWD_LOW_POS))
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/* 0x14 : sd_dbg_pwd_high */
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#define SEC_DBG_SD_DBG_PWD_HIGH_OFFSET (0x14)
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#define SEC_DBG_SD_DBG_PWD_HIGH SEC_DBG_SD_DBG_PWD_HIGH
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#define SEC_DBG_SD_DBG_PWD_HIGH_POS (0U)
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#define SEC_DBG_SD_DBG_PWD_HIGH_LEN (32U)
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#define SEC_DBG_SD_DBG_PWD_HIGH_MSK (((1U<<SEC_DBG_SD_DBG_PWD_HIGH_LEN)-1)<<SEC_DBG_SD_DBG_PWD_HIGH_POS)
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#define SEC_DBG_SD_DBG_PWD_HIGH_UMSK (~(((1U<<SEC_DBG_SD_DBG_PWD_HIGH_LEN)-1)<<SEC_DBG_SD_DBG_PWD_HIGH_POS))
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/* 0x18 : sd_status */
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#define SEC_DBG_SD_STATUS_OFFSET (0x18)
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#define SEC_DBG_SD_DBG_PWD_BUSY SEC_DBG_SD_DBG_PWD_BUSY
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#define SEC_DBG_SD_DBG_PWD_BUSY_POS (0U)
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#define SEC_DBG_SD_DBG_PWD_BUSY_LEN (1U)
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#define SEC_DBG_SD_DBG_PWD_BUSY_MSK (((1U<<SEC_DBG_SD_DBG_PWD_BUSY_LEN)-1)<<SEC_DBG_SD_DBG_PWD_BUSY_POS)
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#define SEC_DBG_SD_DBG_PWD_BUSY_UMSK (~(((1U<<SEC_DBG_SD_DBG_PWD_BUSY_LEN)-1)<<SEC_DBG_SD_DBG_PWD_BUSY_POS))
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#define SEC_DBG_SD_DBG_PWD_TRIG SEC_DBG_SD_DBG_PWD_TRIG
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#define SEC_DBG_SD_DBG_PWD_TRIG_POS (1U)
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#define SEC_DBG_SD_DBG_PWD_TRIG_LEN (1U)
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#define SEC_DBG_SD_DBG_PWD_TRIG_MSK (((1U<<SEC_DBG_SD_DBG_PWD_TRIG_LEN)-1)<<SEC_DBG_SD_DBG_PWD_TRIG_POS)
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#define SEC_DBG_SD_DBG_PWD_TRIG_UMSK (~(((1U<<SEC_DBG_SD_DBG_PWD_TRIG_LEN)-1)<<SEC_DBG_SD_DBG_PWD_TRIG_POS))
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#define SEC_DBG_SD_DBG_CCI_READ_EN SEC_DBG_SD_DBG_CCI_READ_EN
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#define SEC_DBG_SD_DBG_CCI_READ_EN_POS (2U)
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#define SEC_DBG_SD_DBG_CCI_READ_EN_LEN (1U)
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#define SEC_DBG_SD_DBG_CCI_READ_EN_MSK (((1U<<SEC_DBG_SD_DBG_CCI_READ_EN_LEN)-1)<<SEC_DBG_SD_DBG_CCI_READ_EN_POS)
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#define SEC_DBG_SD_DBG_CCI_READ_EN_UMSK (~(((1U<<SEC_DBG_SD_DBG_CCI_READ_EN_LEN)-1)<<SEC_DBG_SD_DBG_CCI_READ_EN_POS))
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#define SEC_DBG_SD_DBG_CCI_CLK_SEL SEC_DBG_SD_DBG_CCI_CLK_SEL
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#define SEC_DBG_SD_DBG_CCI_CLK_SEL_POS (3U)
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#define SEC_DBG_SD_DBG_CCI_CLK_SEL_LEN (1U)
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#define SEC_DBG_SD_DBG_CCI_CLK_SEL_MSK (((1U<<SEC_DBG_SD_DBG_CCI_CLK_SEL_LEN)-1)<<SEC_DBG_SD_DBG_CCI_CLK_SEL_POS)
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#define SEC_DBG_SD_DBG_CCI_CLK_SEL_UMSK (~(((1U<<SEC_DBG_SD_DBG_CCI_CLK_SEL_LEN)-1)<<SEC_DBG_SD_DBG_CCI_CLK_SEL_POS))
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#define SEC_DBG_SD_DBG_PWD_CNT SEC_DBG_SD_DBG_PWD_CNT
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#define SEC_DBG_SD_DBG_PWD_CNT_POS (4U)
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#define SEC_DBG_SD_DBG_PWD_CNT_LEN (20U)
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#define SEC_DBG_SD_DBG_PWD_CNT_MSK (((1U<<SEC_DBG_SD_DBG_PWD_CNT_LEN)-1)<<SEC_DBG_SD_DBG_PWD_CNT_POS)
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#define SEC_DBG_SD_DBG_PWD_CNT_UMSK (~(((1U<<SEC_DBG_SD_DBG_PWD_CNT_LEN)-1)<<SEC_DBG_SD_DBG_PWD_CNT_POS))
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#define SEC_DBG_SD_DBG_MODE SEC_DBG_SD_DBG_MODE
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#define SEC_DBG_SD_DBG_MODE_POS (24U)
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#define SEC_DBG_SD_DBG_MODE_LEN (4U)
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#define SEC_DBG_SD_DBG_MODE_MSK (((1U<<SEC_DBG_SD_DBG_MODE_LEN)-1)<<SEC_DBG_SD_DBG_MODE_POS)
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#define SEC_DBG_SD_DBG_MODE_UMSK (~(((1U<<SEC_DBG_SD_DBG_MODE_LEN)-1)<<SEC_DBG_SD_DBG_MODE_POS))
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#define SEC_DBG_SD_DBG_ENA SEC_DBG_SD_DBG_ENA
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#define SEC_DBG_SD_DBG_ENA_POS (28U)
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#define SEC_DBG_SD_DBG_ENA_LEN (4U)
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#define SEC_DBG_SD_DBG_ENA_MSK (((1U<<SEC_DBG_SD_DBG_ENA_LEN)-1)<<SEC_DBG_SD_DBG_ENA_POS)
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#define SEC_DBG_SD_DBG_ENA_UMSK (~(((1U<<SEC_DBG_SD_DBG_ENA_LEN)-1)<<SEC_DBG_SD_DBG_ENA_POS))
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/* 0x1C : sd_dbg_reserved */
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#define SEC_DBG_SD_DBG_RESERVED_OFFSET (0x1C)
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#define SEC_DBG_SD_DBG_RESERVED SEC_DBG_SD_DBG_RESERVED
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#define SEC_DBG_SD_DBG_RESERVED_POS (0U)
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#define SEC_DBG_SD_DBG_RESERVED_LEN (32U)
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#define SEC_DBG_SD_DBG_RESERVED_MSK (((1U<<SEC_DBG_SD_DBG_RESERVED_LEN)-1)<<SEC_DBG_SD_DBG_RESERVED_POS)
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#define SEC_DBG_SD_DBG_RESERVED_UMSK (~(((1U<<SEC_DBG_SD_DBG_RESERVED_LEN)-1)<<SEC_DBG_SD_DBG_RESERVED_POS))
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struct sec_dbg_reg {
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/* 0x0 : sd_chip_id_low */
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union {
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struct {
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uint32_t sd_chip_id_low : 32; /* [31: 0], r, 0x0 */
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}BF;
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uint32_t WORD;
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} sd_chip_id_low;
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/* 0x4 : sd_chip_id_high */
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union {
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struct {
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uint32_t sd_chip_id_high : 32; /* [31: 0], r, 0x0 */
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}BF;
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uint32_t WORD;
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} sd_chip_id_high;
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/* 0x8 : sd_wifi_mac_low */
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union {
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struct {
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uint32_t sd_wifi_mac_low : 32; /* [31: 0], r, 0x0 */
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}BF;
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uint32_t WORD;
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} sd_wifi_mac_low;
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/* 0xC : sd_wifi_mac_high */
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union {
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struct {
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uint32_t sd_wifi_mac_high : 32; /* [31: 0], r, 0x0 */
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}BF;
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uint32_t WORD;
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} sd_wifi_mac_high;
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/* 0x10 : sd_dbg_pwd_low */
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union {
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struct {
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uint32_t sd_dbg_pwd_low : 32; /* [31: 0], r/w, 0x0 */
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}BF;
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uint32_t WORD;
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} sd_dbg_pwd_low;
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/* 0x14 : sd_dbg_pwd_high */
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union {
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struct {
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uint32_t sd_dbg_pwd_high : 32; /* [31: 0], r/w, 0x0 */
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}BF;
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uint32_t WORD;
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} sd_dbg_pwd_high;
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/* 0x18 : sd_status */
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union {
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struct {
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uint32_t sd_dbg_pwd_busy : 1; /* [ 0], r, 0x0 */
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uint32_t sd_dbg_pwd_trig : 1; /* [ 1], r/w, 0x0 */
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uint32_t sd_dbg_cci_read_en : 1; /* [ 2], r/w, 0x0 */
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uint32_t sd_dbg_cci_clk_sel : 1; /* [ 3], r/w, 0x0 */
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uint32_t sd_dbg_pwd_cnt : 20; /* [23: 4], r, 0x0 */
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uint32_t sd_dbg_mode : 4; /* [27:24], r, 0x0 */
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uint32_t sd_dbg_ena : 4; /* [31:28], r, 0x0 */
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}BF;
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uint32_t WORD;
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} sd_status;
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/* 0x1C : sd_dbg_reserved */
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union {
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struct {
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uint32_t sd_dbg_reserved : 32; /* [31: 0], r/w, 0xffff */
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}BF;
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uint32_t WORD;
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} sd_dbg_reserved;
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};
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typedef volatile struct sec_dbg_reg sec_dbg_reg_t;
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#endif /* __SEC_DBG_REG_H__ */
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