132 lines
3.4 KiB
C
132 lines
3.4 KiB
C
#ifndef _BFLB_SPI_H
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#define _BFLB_SPI_H
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#include "bflb_core.h"
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#if defined(BL602) || defined(BL702)
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#define SPI_FIFO_WORD_NUM_MAX 4
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#define SPI_FIFO_WIDTH_VARIABLE_SUPPORT 0
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#elif defined(BL606P) || defined(BL808)
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#define SPI_FIFO_BYTE_NUM_MAX 32
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#define SPI_FIFO_WIDTH_VARIABLE_SUPPORT 1
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#elif defined(BL616) || defined(BL628)
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#define SPI_FIFO_BYTE_NUM_MAX 16
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#define SPI_FIFO_WIDTH_VARIABLE_SUPPORT 1
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#elif defined(BL702L)
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#define SPI_FIFO_BYTE_NUM_MAX 16
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#define SPI_FIFO_WIDTH_VARIABLE_SUPPORT 1
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#else
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#error "unknown device"
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#endif
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/** @defgroup SPI_ROLE spi role definition
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* @{
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*/
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#define SPI_ROLE_MASTER 0
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#define SPI_ROLE_SLAVE 1
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/**
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* @}
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*/
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/** @defgroup SPI_MODE spi mode definition
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* @{
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*/
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#define SPI_MODE0 0 /* CPOL=0 CHPHA=0 */
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#define SPI_MODE1 1 /* CPOL=0 CHPHA=1 */
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#define SPI_MODE2 2 /* CPOL=1 CHPHA=0 */
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#define SPI_MODE3 3 /* CPOL=1 CHPHA=1 */
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/**
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* @}
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*/
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/** @defgroup SPI_DATA_WIDTH spi data width definition
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* @{
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*/
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#define SPI_DATA_WIDTH_8BIT 1
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#define SPI_DATA_WIDTH_16BIT 2
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#define SPI_DATA_WIDTH_24BIT 3
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#define SPI_DATA_WIDTH_32BIT 4
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/**
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* @}
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*/
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/** @defgroup SPI_BIT_ORDER spi bit order definition
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* @{
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*/
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#define SPI_BIT_LSB 1
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#define SPI_BIT_MSB 0
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/**
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* @}
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*/
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/** @defgroup SPI_BYTE_ORDER spi byte order definition
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* @{
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*/
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#define SPI_BYTE_LSB 0
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#if !defined(BL602) && !defined(BL702)
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#define SPI_BYTE_MSB 1
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#endif
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/**
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* @}
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*/
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/** @defgroup SPI_CMD spi feature control cmd definition
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* @{
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*/
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#define SPI_CMD_SET_DATA_WIDTH (0x01)
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#define SPI_CMD_GET_DATA_WIDTH (0x02)
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#define SPI_CMD_CLEAR_TX_FIFO (0x03)
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#define SPI_CMD_CLEAR_RX_FIFO (0x04)
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#define SPI_CMD_SET_CS_INTERVAL (0x05)
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/**
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* @}
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*/
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/**
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* @brief SPI configuration structure
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*
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* @param freq SPI frequence, should be less than spi_clk/2
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* @param role SPI role, use @ref SPI_ROLE
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* @param mode SPI mode, use @ref SPI_MODE
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* @param data_width SPI data width, use @ref SPI_DATA_WIDTH
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* @param bit_order SPI bit order, use @ref SPI_BIT_ORDER
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* @param byte_order SPI byte order, use @ref SPI_BYTE_ORDER
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* @param tx_fifo_threshold SPI tx fifo threshold, should be less than 4
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* @param rx_fifo_threshold SPI rx fifo threshold, should be less than 4
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*/
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struct bflb_spi_config_s {
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uint32_t freq;
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uint8_t role;
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uint8_t mode;
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uint8_t data_width;
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uint8_t bit_order;
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uint8_t byte_order;
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uint8_t tx_fifo_threshold;
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uint8_t rx_fifo_threshold;
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};
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#ifdef __cplusplus
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extern "C" {
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#endif
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void bflb_spi_init(struct bflb_device_s *dev, const struct bflb_spi_config_s *config);
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void bflb_spi_deinit(struct bflb_device_s *dev);
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void bflb_spi_link_txdma(struct bflb_device_s *dev, bool enable);
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void bflb_spi_link_rxdma(struct bflb_device_s *dev, bool enable);
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uint32_t bflb_spi_poll_send(struct bflb_device_s *dev, uint32_t data);
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int bflb_spi_poll_exchange(struct bflb_device_s *dev, const void *txbuffer, void *rxbuffer, size_t nbytes);
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bool bflb_spi_isbusy(struct bflb_device_s *dev);
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void bflb_spi_txint_mask(struct bflb_device_s *dev, bool mask);
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void bflb_spi_rxint_mask(struct bflb_device_s *dev, bool mask);
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void bflb_spi_errint_mask(struct bflb_device_s *dev, bool mask);
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uint32_t bflb_spi_get_intstatus(struct bflb_device_s *dev);
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void bflb_spi_int_clear(struct bflb_device_s *dev, uint32_t int_clear);
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int bflb_spi_feature_control(struct bflb_device_s *dev, int cmd, size_t arg);
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#ifdef __cplusplus
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}
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#endif
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#endif
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