408 lines
15 KiB
C
408 lines
15 KiB
C
/**
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******************************************************************************
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* @file blsp_boot_parser.c
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* @version V1.2
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* @date
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* @brief This file is the peripheral case c file
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2018 Bouffalo Lab</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of Bouffalo Lab nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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#include "blsp_common.h"
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#include "bflb_platform.h"
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#include "blsp_bootinfo.h"
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#include "blsp_boot_parser.h"
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#include "softcrc.h"
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#include "blsp_port.h"
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#include "hal_sec_hash.h"
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#include "hal_sec_ecdsa.h"
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extern uint32_t g_user_hash_ignored;
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struct device *dev_check_hash;
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/****************************************************************************/ /**
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* @brief Check if the input public key is the same as burned in the efuse
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*
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* @param cpu_type: CPU Type
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* @param pkhash: Public key hash pointer
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*
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* @return 1 for valid and 0 for invalid
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*
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*******************************************************************************/
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static uint32_t blsp_boot_parse_is_pkhash_valid(uint8_t cpu_type, uint8_t *pkhash)
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{
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if (cpu_type == BFLB_BOOT2_CPU_0) {
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if (0 == memcmp(g_efuse_cfg.pk_hash_cpu0, pkhash, BFLB_BOOT2_PK_HASH_SIZE)) {
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return 1;
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}
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} else if (cpu_type == BFLB_BOOT2_CPU_1) {
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if (0 == memcmp(g_efuse_cfg.pk_hash_cpu1, pkhash, BFLB_BOOT2_PK_HASH_SIZE)) {
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return 1;
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}
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}
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return 0;
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}
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/****************************************************************************/ /**
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* @brief Check if the input public key is the same as burned in the efuse
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*
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* @param g_boot_img_cfg: Boot image config pointer
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* @param data: Image data pointer
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*
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* @return boot_error_code type
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*
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*******************************************************************************/
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int32_t blsp_boot_parse_bootheader(boot2_image_config *boot_img_cfg, uint8_t *data)
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{
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boot_header_config *header = (boot_header_config *)data;
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uint32_t crc;
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uint32_t crc_pass = 0;
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uint32_t i = 0;
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uint32_t *phash = (uint32_t *)header->hash;
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if (header->bootCfg.bval.crcIgnore == 1 && header->crc32 == BFLB_BOOT2_DEADBEEF_VAL) {
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MSG("Crc ignored\r\n");
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crc_pass = 1;
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} else {
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crc = BFLB_Soft_CRC32((uint8_t *)header, sizeof(boot_header_config) - sizeof(header->crc32));
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if (header->crc32 == crc) {
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crc_pass = 1;
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}
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}
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if (crc_pass) {
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if (header->bootCfg.bval.notLoadInBoot) {
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return BFLB_BOOT2_IMG_BOOTHEADER_NOT_LOAD_ERROR;
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}
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/* Get which CPU's img it is*/
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for (i = 0; i < BFLB_BOOT2_CPU_MAX; i++) {
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if (0 == memcmp((void *)&header->magicCode, BFLB_BOOT2_CPU0_MAGIC,
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sizeof(header->magicCode))) {
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break;
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} else if (0 == memcmp((void *)&header->magicCode, BFLB_BOOT2_CPU1_MAGIC,
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sizeof(header->magicCode))) {
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break;
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}
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}
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if (i == BFLB_BOOT2_CPU_MAX) {
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/* No cpu img magic match */
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MSG_ERR("Magic code error\r\n");
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return BFLB_BOOT2_IMG_BOOTHEADER_MAGIC_ERROR;
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}
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boot_img_cfg->cpu_type = i;
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boot_img_cfg->entry_point = 0;
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/* Set image valid 0 as default */
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boot_img_cfg->img_valid = 0;
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/* Deal with pll config */
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/* Encrypt and sign */
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boot_img_cfg->encrypt_type = header->bootCfg.bval.encrypt_type;
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boot_img_cfg->sign_type = header->bootCfg.bval.sign;
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boot_img_cfg->key_sel = header->bootCfg.bval.key_sel;
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/* Xip relative */
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boot_img_cfg->no_segment = header->bootCfg.bval.no_segment;
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boot_img_cfg->cache_enable = header->bootCfg.bval.cache_enable;
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boot_img_cfg->aes_region_lock = header->bootCfg.bval.aes_region_lock;
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boot_img_cfg->halt_cpu1 = header->bootCfg.bval.halt_cpu1;
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boot_img_cfg->cache_way_disable = header->bootCfg.bval.cache_way_disable;
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boot_img_cfg->hash_ignore = header->bootCfg.bval.hash_ignore;
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/* Firmware len*/
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boot_img_cfg->img_segment_info.img_len = header->img_segment_info.img_len;
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/* Boot entry and flash offset */
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boot_img_cfg->entry_point = header->bootEntry;
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boot_img_cfg->img_start.flash_offset = header->img_start.flash_offset;
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MSG("sign %d,encrypt:%d\r\n", boot_img_cfg->sign_type,
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boot_img_cfg->encrypt_type);
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/* Check encrypt and sign match*/
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if (g_efuse_cfg.encrypted[i] != 0) {
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if (boot_img_cfg->encrypt_type == 0) {
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MSG_ERR("Encrypt not fit\r\n");
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return BFLB_BOOT2_IMG_BOOTHEADER_ENCRYPT_NOTFIT;
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}
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}
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if (g_efuse_cfg.sign[i] ^ boot_img_cfg->sign_type) {
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MSG_ERR("sign not fit\r\n");
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boot_img_cfg->sign_type = g_efuse_cfg.sign[i];
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return BFLB_BOOT2_IMG_BOOTHEADER_SIGN_NOTFIT;
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}
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if (g_ps_mode == BFLB_PSM_HBN && (!g_efuse_cfg.hbn_check_sign)) {
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/* In HBN Mode, if user select to ignore hash and sign*/
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boot_img_cfg->hash_ignore = 1;
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} else if ((boot_img_cfg->hash_ignore == 1 && *phash != BFLB_BOOT2_DEADBEEF_VAL) ||
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g_efuse_cfg.sign[i] != 0) {
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/* If signed or user not really want to ignore, hash can't be ignored*/
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boot_img_cfg->hash_ignore = 0;
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}
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if (g_user_hash_ignored) {
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boot_img_cfg->hash_ignore = 1;
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}
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ARCH_MemCpy_Fast(boot_img_cfg->img_hash, header->hash, sizeof(header->hash));
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if (boot_img_cfg->img_segment_info.img_len == 0) {
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return BFLB_BOOT2_IMG_SEGMENT_CNT_ERROR;
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}
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/* Start hash here*/
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//Sec_Eng_SHA256_Init(&g_sha_ctx, SEC_ENG_SHA_ID0, SEC_ENG_SHA256, g_sha_tmp_buf, g_padding);
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//Sec_Eng_SHA_Start(SEC_ENG_SHA_ID0);
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sec_hash_sha256_register(SEC_HASH0_INDEX,"dev_check_hash");
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dev_check_hash = device_find("dev_check_hash");
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if(dev_check_hash){
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device_open(dev_check_hash, 0);
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}else{
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MSG_ERR("hash dev open err\r\n");
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return BFLB_BOOT2_FAIL;
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}
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} else {
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MSG_ERR("bootheader crc error\r\n");
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blsp_dump_data((uint8_t *)&crc, 4);
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return BFLB_BOOT2_IMG_BOOTHEADER_CRC_ERROR;
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}
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return BFLB_BOOT2_SUCCESS;
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}
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/****************************************************************************/ /**
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* @brief Parse public key
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*
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* @param g_boot_img_cfg: Boot image config pointer
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* @param data: Public key data pointer
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* @param own: 1 for current CPU, 0 for other(s)
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*
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* @return boot_error_code type
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*
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*******************************************************************************/
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int32_t blsp_boot_parse_pkey(boot2_image_config *g_boot_img_cfg, uint8_t *data, uint8_t own)
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{
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boot_pk_config *cfg = (boot_pk_config *)data;
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uint32_t pk_hash[BFLB_BOOT2_PK_HASH_SIZE / 4];
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if (cfg->crc32 == BFLB_Soft_CRC32((uint8_t *)cfg, sizeof(boot_pk_config) - 4)) {
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/* Check public key with data info in OTP*/
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//Sec_Eng_SHA256_Update(&g_sha_ctx, SEC_ENG_SHA_ID0, data, BFLB_BOOT2_ECC_KEYXSIZE + BFLB_BOOT2_ECC_KEYYSIZE);
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//Sec_Eng_SHA256_Finish(&g_sha_ctx, SEC_ENG_SHA_ID0, (uint8_t *)pk_hash);
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//Sec_Eng_SHA256_Init(&g_sha_ctx, SEC_ENG_SHA_ID0, SEC_ENG_SHA256, g_sha_tmp_buf, g_padding);
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//Sec_Eng_SHA_Start(SEC_ENG_SHA_ID0);
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device_write(dev_check_hash, 0, data, BFLB_BOOT2_ECC_KEYXSIZE + BFLB_BOOT2_ECC_KEYYSIZE);
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device_read(dev_check_hash,0,pk_hash,0);
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device_open(dev_check_hash, 0);
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/* Check pk is valid */
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if (own == 1) {
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if (1 != blsp_boot_parse_is_pkhash_valid(g_boot_img_cfg->cpu_type,
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(uint8_t *)pk_hash)) {
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MSG_ERR("PK sha error\r\n");
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return BFLB_BOOT2_IMG_PK_HASH_ERROR;
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}
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}
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if (own == 1) {
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ARCH_MemCpy_Fast(g_boot_img_cfg->eckye_x, cfg->eckye_x, sizeof(cfg->eckye_x));
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ARCH_MemCpy_Fast(g_boot_img_cfg->eckey_y, cfg->eckey_y, sizeof(cfg->eckey_y));
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}
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} else {
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MSG_ERR("PK crc error\r\n");
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return BFLB_BOOT2_IMG_PK_CRC_ERROR;
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}
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return BFLB_BOOT2_SUCCESS;
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}
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/****************************************************************************/ /**
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* @brief Parse signature
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*
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* @param g_boot_img_cfg: Boot image config pointer
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* @param data: Signature data pointer
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* @param own: 1 for current CPU, 0 for other(s)
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*
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* @return boot_error_code type
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*
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*******************************************************************************/
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int32_t blsp_boot_parse_signature(boot2_image_config *g_boot_img_cfg, uint8_t *data, uint8_t own)
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{
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boot_sign_config *cfg = (boot_sign_config *)data;
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uint32_t crc;
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if (cfg->sig_len > sizeof(g_boot_img_cfg->signature)) {
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return BFLB_BOOT2_IMG_SIGNATURE_LEN_ERROR;
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}
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/* CRC include sig_len*/
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crc = BFLB_Soft_CRC32((uint8_t *)&cfg->sig_len, cfg->sig_len + sizeof(cfg->sig_len));
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if (memcmp(&crc, &cfg->signature[cfg->sig_len], 4) == 0) {
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if (own == 1) {
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ARCH_MemCpy_Fast(g_boot_img_cfg->signature, cfg->signature, cfg->sig_len);
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g_boot_img_cfg->sig_len = cfg->sig_len;
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} else {
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ARCH_MemCpy_Fast(g_boot_img_cfg->signature2, cfg->signature, cfg->sig_len);
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g_boot_img_cfg->sig_len2 = cfg->sig_len;
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}
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} else {
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MSG_ERR("SIG crc error\r\n");
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return BFLB_BOOT2_IMG_SIGNATURE_CRC_ERROR;
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}
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return BFLB_BOOT2_SUCCESS;
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}
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/****************************************************************************/ /**
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* @brief Parse ASE IV
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*
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* @param g_boot_img_cfg: Boot image config pointer
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* @param data: AES IV data pointer
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*
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* @return boot_error_code type
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*
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*******************************************************************************/
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int32_t blsp_boot_parse_aesiv(boot2_image_config *g_boot_img_cfg, uint8_t *data)
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{
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boot_aes_config *cfg = (boot_aes_config *)data;
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if (cfg->crc32 == BFLB_Soft_CRC32(cfg->aes_iv, sizeof(cfg->aes_iv))) {
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memcpy(g_boot_img_cfg->aes_iv, cfg->aes_iv, sizeof(boot_aes_config));
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/* Update image hash */
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if (!g_boot_img_cfg->hash_ignore) {
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//Sec_Eng_SHA256_Update(&g_sha_ctx, SEC_ENG_SHA_ID0, data, sizeof(boot_aes_config));
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device_write(dev_check_hash, 0, data, sizeof(boot_aes_config));
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}
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} else {
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MSG_ERR("AES IV crc error\r\n");
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return BFLB_BOOT2_IMG_AES_IV_CRC_ERROR;
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}
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return BFLB_BOOT2_SUCCESS;
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}
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/****************************************************************************//**
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* @brief Check signature is valid
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*
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* @param g_boot_img_cfg: Boot image config pointer
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*
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* @return boot_error_code type
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*
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*******************************************************************************/
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int32_t blsp_boot_parser_check_signature(boot2_image_config *g_boot_img_cfg)
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{
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int32_t ret = 0;
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uint64_t startTime = 0;
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sec_ecdsa_handle_t ecdsaHandle;
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MSG("%d,%d\r\n", g_ps_mode, g_efuse_cfg.hbn_check_sign);
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if(g_ps_mode == BFLB_PSM_HBN && (!g_efuse_cfg.hbn_check_sign))
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{
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return BFLB_BOOT2_SUCCESS;
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}
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if(g_boot_img_cfg->sign_type)
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{
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MSG("Check sig1\r\n");
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startTime = bflb_platform_get_time_ms();
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sec_ecdsa_init(&ecdsaHandle, ECP_SECP256R1);
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ecdsaHandle.publicKeyx = (uint32_t *)g_boot_img_cfg->eckye_x;
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ecdsaHandle.publicKeyy = (uint32_t *)g_boot_img_cfg->eckey_y;
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sec_ecdsa_verify(&ecdsaHandle, (uint32_t *)g_boot_img_cfg->img_hash, sizeof(g_boot_img_cfg->img_hash) / 4,
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(uint32_t *)g_boot_img_cfg->signature, (uint32_t *)&g_boot_img_cfg->signature[32]);
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//ret=bflb_ecdsa_verify(0,(uint32_t *)g_boot_img_cfg->img_hash,sizeof(g_boot_img_cfg->img_hash),
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// (uint32_t *)g_boot_img_cfg->eckye_x,(uint32_t *)g_boot_img_cfg->eckey_y,
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// (uint32_t *)g_boot_img_cfg->signature,(uint32_t *)&g_boot_img_cfg->signature[32]);
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if(ret != 0)
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{
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MSG_ERR("verify failed\n");
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return BFLB_BOOT2_IMG_SIGN_ERROR;
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}
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MSG("Time=%d ms\r\n", (unsigned int)(bflb_platform_get_time_ms() - startTime));
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}
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MSG("Success\r\n");
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return BFLB_BOOT2_SUCCESS;
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}
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/****************************************************************************/ /**
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* @brief Check hash is valid
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*
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* @param g_boot_img_cfg: Boot image config pointer
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*
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* @return boot_error_code type
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*
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*******************************************************************************/
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int32_t blsp_boot_parser_check_hash(boot2_image_config *g_boot_img_cfg)
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{
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uint32_t img_hash_cal[BFLB_BOOT2_HASH_SIZE / 4];
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if (!g_boot_img_cfg->hash_ignore) {
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//Sec_Eng_SHA256_Finish(&g_sha_ctx, SEC_ENG_SHA_ID0, (uint8_t *)img_hash_cal);
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device_read(dev_check_hash,0,img_hash_cal,0);
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device_close(dev_check_hash);
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if (memcmp(img_hash_cal, g_boot_img_cfg->img_hash,
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sizeof(g_boot_img_cfg->img_hash)) != 0) {
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MSG_ERR("Hash error\r\n");
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blsp_dump_data(img_hash_cal, BFLB_BOOT2_HASH_SIZE);
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blsp_dump_data(g_boot_img_cfg->img_hash, BFLB_BOOT2_HASH_SIZE);
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return BFLB_BOOT2_IMG_HASH_ERROR;
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} else {
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MSG("Success\r\n");
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}
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}
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return BFLB_BOOT2_SUCCESS;
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}
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