257 lines
15 KiB
C
257 lines
15 KiB
C
/**
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******************************************************************************
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* @file tzc_sec_reg.h
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* @version V1.2
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* @date 2020-04-30
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* @brief This file is the description of.IP register
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2020 Bouffalo Lab</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of Bouffalo Lab nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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#ifndef __TZC_SEC_REG_H__
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#define __TZC_SEC_REG_H__
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#include "bl602.h"
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/* 0x40 : tzc_rom_ctrl */
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#define TZC_SEC_TZC_ROM_CTRL_OFFSET (0x40)
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#define TZC_SEC_TZC_ROM0_R0_ID0_EN TZC_SEC_TZC_ROM0_R0_ID0_EN
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#define TZC_SEC_TZC_ROM0_R0_ID0_EN_POS (0U)
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#define TZC_SEC_TZC_ROM0_R0_ID0_EN_LEN (1U)
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#define TZC_SEC_TZC_ROM0_R0_ID0_EN_MSK (((1U << TZC_SEC_TZC_ROM0_R0_ID0_EN_LEN) - 1) << TZC_SEC_TZC_ROM0_R0_ID0_EN_POS)
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#define TZC_SEC_TZC_ROM0_R0_ID0_EN_UMSK (~(((1U << TZC_SEC_TZC_ROM0_R0_ID0_EN_LEN) - 1) << TZC_SEC_TZC_ROM0_R0_ID0_EN_POS))
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#define TZC_SEC_TZC_ROM0_R1_ID0_EN TZC_SEC_TZC_ROM0_R1_ID0_EN
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#define TZC_SEC_TZC_ROM0_R1_ID0_EN_POS (1U)
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#define TZC_SEC_TZC_ROM0_R1_ID0_EN_LEN (1U)
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#define TZC_SEC_TZC_ROM0_R1_ID0_EN_MSK (((1U << TZC_SEC_TZC_ROM0_R1_ID0_EN_LEN) - 1) << TZC_SEC_TZC_ROM0_R1_ID0_EN_POS)
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#define TZC_SEC_TZC_ROM0_R1_ID0_EN_UMSK (~(((1U << TZC_SEC_TZC_ROM0_R1_ID0_EN_LEN) - 1) << TZC_SEC_TZC_ROM0_R1_ID0_EN_POS))
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#define TZC_SEC_TZC_ROM1_R0_ID0_EN TZC_SEC_TZC_ROM1_R0_ID0_EN
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#define TZC_SEC_TZC_ROM1_R0_ID0_EN_POS (2U)
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#define TZC_SEC_TZC_ROM1_R0_ID0_EN_LEN (1U)
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#define TZC_SEC_TZC_ROM1_R0_ID0_EN_MSK (((1U << TZC_SEC_TZC_ROM1_R0_ID0_EN_LEN) - 1) << TZC_SEC_TZC_ROM1_R0_ID0_EN_POS)
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#define TZC_SEC_TZC_ROM1_R0_ID0_EN_UMSK (~(((1U << TZC_SEC_TZC_ROM1_R0_ID0_EN_LEN) - 1) << TZC_SEC_TZC_ROM1_R0_ID0_EN_POS))
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#define TZC_SEC_TZC_ROM1_R1_ID0_EN TZC_SEC_TZC_ROM1_R1_ID0_EN
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#define TZC_SEC_TZC_ROM1_R1_ID0_EN_POS (3U)
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#define TZC_SEC_TZC_ROM1_R1_ID0_EN_LEN (1U)
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#define TZC_SEC_TZC_ROM1_R1_ID0_EN_MSK (((1U << TZC_SEC_TZC_ROM1_R1_ID0_EN_LEN) - 1) << TZC_SEC_TZC_ROM1_R1_ID0_EN_POS)
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#define TZC_SEC_TZC_ROM1_R1_ID0_EN_UMSK (~(((1U << TZC_SEC_TZC_ROM1_R1_ID0_EN_LEN) - 1) << TZC_SEC_TZC_ROM1_R1_ID0_EN_POS))
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#define TZC_SEC_TZC_ROM0_R0_ID1_EN TZC_SEC_TZC_ROM0_R0_ID1_EN
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#define TZC_SEC_TZC_ROM0_R0_ID1_EN_POS (8U)
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#define TZC_SEC_TZC_ROM0_R0_ID1_EN_LEN (1U)
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#define TZC_SEC_TZC_ROM0_R0_ID1_EN_MSK (((1U << TZC_SEC_TZC_ROM0_R0_ID1_EN_LEN) - 1) << TZC_SEC_TZC_ROM0_R0_ID1_EN_POS)
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#define TZC_SEC_TZC_ROM0_R0_ID1_EN_UMSK (~(((1U << TZC_SEC_TZC_ROM0_R0_ID1_EN_LEN) - 1) << TZC_SEC_TZC_ROM0_R0_ID1_EN_POS))
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#define TZC_SEC_TZC_ROM0_R1_ID1_EN TZC_SEC_TZC_ROM0_R1_ID1_EN
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#define TZC_SEC_TZC_ROM0_R1_ID1_EN_POS (9U)
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#define TZC_SEC_TZC_ROM0_R1_ID1_EN_LEN (1U)
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#define TZC_SEC_TZC_ROM0_R1_ID1_EN_MSK (((1U << TZC_SEC_TZC_ROM0_R1_ID1_EN_LEN) - 1) << TZC_SEC_TZC_ROM0_R1_ID1_EN_POS)
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#define TZC_SEC_TZC_ROM0_R1_ID1_EN_UMSK (~(((1U << TZC_SEC_TZC_ROM0_R1_ID1_EN_LEN) - 1) << TZC_SEC_TZC_ROM0_R1_ID1_EN_POS))
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#define TZC_SEC_TZC_ROM1_R0_ID1_EN TZC_SEC_TZC_ROM1_R0_ID1_EN
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#define TZC_SEC_TZC_ROM1_R0_ID1_EN_POS (10U)
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#define TZC_SEC_TZC_ROM1_R0_ID1_EN_LEN (1U)
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#define TZC_SEC_TZC_ROM1_R0_ID1_EN_MSK (((1U << TZC_SEC_TZC_ROM1_R0_ID1_EN_LEN) - 1) << TZC_SEC_TZC_ROM1_R0_ID1_EN_POS)
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#define TZC_SEC_TZC_ROM1_R0_ID1_EN_UMSK (~(((1U << TZC_SEC_TZC_ROM1_R0_ID1_EN_LEN) - 1) << TZC_SEC_TZC_ROM1_R0_ID1_EN_POS))
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#define TZC_SEC_TZC_ROM1_R1_ID1_EN TZC_SEC_TZC_ROM1_R1_ID1_EN
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#define TZC_SEC_TZC_ROM1_R1_ID1_EN_POS (11U)
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#define TZC_SEC_TZC_ROM1_R1_ID1_EN_LEN (1U)
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#define TZC_SEC_TZC_ROM1_R1_ID1_EN_MSK (((1U << TZC_SEC_TZC_ROM1_R1_ID1_EN_LEN) - 1) << TZC_SEC_TZC_ROM1_R1_ID1_EN_POS)
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#define TZC_SEC_TZC_ROM1_R1_ID1_EN_UMSK (~(((1U << TZC_SEC_TZC_ROM1_R1_ID1_EN_LEN) - 1) << TZC_SEC_TZC_ROM1_R1_ID1_EN_POS))
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#define TZC_SEC_TZC_ROM0_R0_EN TZC_SEC_TZC_ROM0_R0_EN
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#define TZC_SEC_TZC_ROM0_R0_EN_POS (16U)
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#define TZC_SEC_TZC_ROM0_R0_EN_LEN (1U)
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#define TZC_SEC_TZC_ROM0_R0_EN_MSK (((1U << TZC_SEC_TZC_ROM0_R0_EN_LEN) - 1) << TZC_SEC_TZC_ROM0_R0_EN_POS)
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#define TZC_SEC_TZC_ROM0_R0_EN_UMSK (~(((1U << TZC_SEC_TZC_ROM0_R0_EN_LEN) - 1) << TZC_SEC_TZC_ROM0_R0_EN_POS))
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#define TZC_SEC_TZC_ROM0_R1_EN TZC_SEC_TZC_ROM0_R1_EN
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#define TZC_SEC_TZC_ROM0_R1_EN_POS (17U)
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#define TZC_SEC_TZC_ROM0_R1_EN_LEN (1U)
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#define TZC_SEC_TZC_ROM0_R1_EN_MSK (((1U << TZC_SEC_TZC_ROM0_R1_EN_LEN) - 1) << TZC_SEC_TZC_ROM0_R1_EN_POS)
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#define TZC_SEC_TZC_ROM0_R1_EN_UMSK (~(((1U << TZC_SEC_TZC_ROM0_R1_EN_LEN) - 1) << TZC_SEC_TZC_ROM0_R1_EN_POS))
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#define TZC_SEC_TZC_ROM1_R0_EN TZC_SEC_TZC_ROM1_R0_EN
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#define TZC_SEC_TZC_ROM1_R0_EN_POS (18U)
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#define TZC_SEC_TZC_ROM1_R0_EN_LEN (1U)
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#define TZC_SEC_TZC_ROM1_R0_EN_MSK (((1U << TZC_SEC_TZC_ROM1_R0_EN_LEN) - 1) << TZC_SEC_TZC_ROM1_R0_EN_POS)
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#define TZC_SEC_TZC_ROM1_R0_EN_UMSK (~(((1U << TZC_SEC_TZC_ROM1_R0_EN_LEN) - 1) << TZC_SEC_TZC_ROM1_R0_EN_POS))
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#define TZC_SEC_TZC_ROM1_R1_EN TZC_SEC_TZC_ROM1_R1_EN
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#define TZC_SEC_TZC_ROM1_R1_EN_POS (19U)
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#define TZC_SEC_TZC_ROM1_R1_EN_LEN (1U)
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#define TZC_SEC_TZC_ROM1_R1_EN_MSK (((1U << TZC_SEC_TZC_ROM1_R1_EN_LEN) - 1) << TZC_SEC_TZC_ROM1_R1_EN_POS)
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#define TZC_SEC_TZC_ROM1_R1_EN_UMSK (~(((1U << TZC_SEC_TZC_ROM1_R1_EN_LEN) - 1) << TZC_SEC_TZC_ROM1_R1_EN_POS))
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#define TZC_SEC_TZC_ROM0_R0_LOCK TZC_SEC_TZC_ROM0_R0_LOCK
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#define TZC_SEC_TZC_ROM0_R0_LOCK_POS (24U)
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#define TZC_SEC_TZC_ROM0_R0_LOCK_LEN (1U)
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#define TZC_SEC_TZC_ROM0_R0_LOCK_MSK (((1U << TZC_SEC_TZC_ROM0_R0_LOCK_LEN) - 1) << TZC_SEC_TZC_ROM0_R0_LOCK_POS)
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#define TZC_SEC_TZC_ROM0_R0_LOCK_UMSK (~(((1U << TZC_SEC_TZC_ROM0_R0_LOCK_LEN) - 1) << TZC_SEC_TZC_ROM0_R0_LOCK_POS))
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#define TZC_SEC_TZC_ROM0_R1_LOCK TZC_SEC_TZC_ROM0_R1_LOCK
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#define TZC_SEC_TZC_ROM0_R1_LOCK_POS (25U)
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#define TZC_SEC_TZC_ROM0_R1_LOCK_LEN (1U)
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#define TZC_SEC_TZC_ROM0_R1_LOCK_MSK (((1U << TZC_SEC_TZC_ROM0_R1_LOCK_LEN) - 1) << TZC_SEC_TZC_ROM0_R1_LOCK_POS)
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#define TZC_SEC_TZC_ROM0_R1_LOCK_UMSK (~(((1U << TZC_SEC_TZC_ROM0_R1_LOCK_LEN) - 1) << TZC_SEC_TZC_ROM0_R1_LOCK_POS))
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#define TZC_SEC_TZC_ROM1_R0_LOCK TZC_SEC_TZC_ROM1_R0_LOCK
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#define TZC_SEC_TZC_ROM1_R0_LOCK_POS (26U)
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#define TZC_SEC_TZC_ROM1_R0_LOCK_LEN (1U)
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#define TZC_SEC_TZC_ROM1_R0_LOCK_MSK (((1U << TZC_SEC_TZC_ROM1_R0_LOCK_LEN) - 1) << TZC_SEC_TZC_ROM1_R0_LOCK_POS)
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#define TZC_SEC_TZC_ROM1_R0_LOCK_UMSK (~(((1U << TZC_SEC_TZC_ROM1_R0_LOCK_LEN) - 1) << TZC_SEC_TZC_ROM1_R0_LOCK_POS))
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#define TZC_SEC_TZC_ROM1_R1_LOCK TZC_SEC_TZC_ROM1_R1_LOCK
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#define TZC_SEC_TZC_ROM1_R1_LOCK_POS (27U)
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#define TZC_SEC_TZC_ROM1_R1_LOCK_LEN (1U)
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#define TZC_SEC_TZC_ROM1_R1_LOCK_MSK (((1U << TZC_SEC_TZC_ROM1_R1_LOCK_LEN) - 1) << TZC_SEC_TZC_ROM1_R1_LOCK_POS)
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#define TZC_SEC_TZC_ROM1_R1_LOCK_UMSK (~(((1U << TZC_SEC_TZC_ROM1_R1_LOCK_LEN) - 1) << TZC_SEC_TZC_ROM1_R1_LOCK_POS))
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#define TZC_SEC_TZC_SBOOT_DONE TZC_SEC_TZC_SBOOT_DONE
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#define TZC_SEC_TZC_SBOOT_DONE_POS (28U)
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#define TZC_SEC_TZC_SBOOT_DONE_LEN (4U)
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#define TZC_SEC_TZC_SBOOT_DONE_MSK (((1U << TZC_SEC_TZC_SBOOT_DONE_LEN) - 1) << TZC_SEC_TZC_SBOOT_DONE_POS)
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#define TZC_SEC_TZC_SBOOT_DONE_UMSK (~(((1U << TZC_SEC_TZC_SBOOT_DONE_LEN) - 1) << TZC_SEC_TZC_SBOOT_DONE_POS))
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/* 0x44 : tzc_rom0_r0 */
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#define TZC_SEC_TZC_ROM0_R0_OFFSET (0x44)
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#define TZC_SEC_TZC_ROM0_R0_END TZC_SEC_TZC_ROM0_R0_END
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#define TZC_SEC_TZC_ROM0_R0_END_POS (0U)
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#define TZC_SEC_TZC_ROM0_R0_END_LEN (16U)
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#define TZC_SEC_TZC_ROM0_R0_END_MSK (((1U << TZC_SEC_TZC_ROM0_R0_END_LEN) - 1) << TZC_SEC_TZC_ROM0_R0_END_POS)
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#define TZC_SEC_TZC_ROM0_R0_END_UMSK (~(((1U << TZC_SEC_TZC_ROM0_R0_END_LEN) - 1) << TZC_SEC_TZC_ROM0_R0_END_POS))
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#define TZC_SEC_TZC_ROM0_R0_START TZC_SEC_TZC_ROM0_R0_START
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#define TZC_SEC_TZC_ROM0_R0_START_POS (16U)
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#define TZC_SEC_TZC_ROM0_R0_START_LEN (16U)
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#define TZC_SEC_TZC_ROM0_R0_START_MSK (((1U << TZC_SEC_TZC_ROM0_R0_START_LEN) - 1) << TZC_SEC_TZC_ROM0_R0_START_POS)
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#define TZC_SEC_TZC_ROM0_R0_START_UMSK (~(((1U << TZC_SEC_TZC_ROM0_R0_START_LEN) - 1) << TZC_SEC_TZC_ROM0_R0_START_POS))
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/* 0x48 : tzc_rom0_r1 */
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#define TZC_SEC_TZC_ROM0_R1_OFFSET (0x48)
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#define TZC_SEC_TZC_ROM0_R1_END TZC_SEC_TZC_ROM0_R1_END
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#define TZC_SEC_TZC_ROM0_R1_END_POS (0U)
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#define TZC_SEC_TZC_ROM0_R1_END_LEN (16U)
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#define TZC_SEC_TZC_ROM0_R1_END_MSK (((1U << TZC_SEC_TZC_ROM0_R1_END_LEN) - 1) << TZC_SEC_TZC_ROM0_R1_END_POS)
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#define TZC_SEC_TZC_ROM0_R1_END_UMSK (~(((1U << TZC_SEC_TZC_ROM0_R1_END_LEN) - 1) << TZC_SEC_TZC_ROM0_R1_END_POS))
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#define TZC_SEC_TZC_ROM0_R1_START TZC_SEC_TZC_ROM0_R1_START
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#define TZC_SEC_TZC_ROM0_R1_START_POS (16U)
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#define TZC_SEC_TZC_ROM0_R1_START_LEN (16U)
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#define TZC_SEC_TZC_ROM0_R1_START_MSK (((1U << TZC_SEC_TZC_ROM0_R1_START_LEN) - 1) << TZC_SEC_TZC_ROM0_R1_START_POS)
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#define TZC_SEC_TZC_ROM0_R1_START_UMSK (~(((1U << TZC_SEC_TZC_ROM0_R1_START_LEN) - 1) << TZC_SEC_TZC_ROM0_R1_START_POS))
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/* 0x4C : tzc_rom1_r0 */
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#define TZC_SEC_TZC_ROM1_R0_OFFSET (0x4C)
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#define TZC_SEC_TZC_ROM1_R0_END TZC_SEC_TZC_ROM1_R0_END
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#define TZC_SEC_TZC_ROM1_R0_END_POS (0U)
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#define TZC_SEC_TZC_ROM1_R0_END_LEN (16U)
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#define TZC_SEC_TZC_ROM1_R0_END_MSK (((1U << TZC_SEC_TZC_ROM1_R0_END_LEN) - 1) << TZC_SEC_TZC_ROM1_R0_END_POS)
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#define TZC_SEC_TZC_ROM1_R0_END_UMSK (~(((1U << TZC_SEC_TZC_ROM1_R0_END_LEN) - 1) << TZC_SEC_TZC_ROM1_R0_END_POS))
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#define TZC_SEC_TZC_ROM1_R0_START TZC_SEC_TZC_ROM1_R0_START
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#define TZC_SEC_TZC_ROM1_R0_START_POS (16U)
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#define TZC_SEC_TZC_ROM1_R0_START_LEN (16U)
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#define TZC_SEC_TZC_ROM1_R0_START_MSK (((1U << TZC_SEC_TZC_ROM1_R0_START_LEN) - 1) << TZC_SEC_TZC_ROM1_R0_START_POS)
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#define TZC_SEC_TZC_ROM1_R0_START_UMSK (~(((1U << TZC_SEC_TZC_ROM1_R0_START_LEN) - 1) << TZC_SEC_TZC_ROM1_R0_START_POS))
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/* 0x50 : tzc_rom1_r1 */
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#define TZC_SEC_TZC_ROM1_R1_OFFSET (0x50)
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#define TZC_SEC_TZC_ROM1_R1_END TZC_SEC_TZC_ROM1_R1_END
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#define TZC_SEC_TZC_ROM1_R1_END_POS (0U)
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#define TZC_SEC_TZC_ROM1_R1_END_LEN (16U)
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#define TZC_SEC_TZC_ROM1_R1_END_MSK (((1U << TZC_SEC_TZC_ROM1_R1_END_LEN) - 1) << TZC_SEC_TZC_ROM1_R1_END_POS)
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#define TZC_SEC_TZC_ROM1_R1_END_UMSK (~(((1U << TZC_SEC_TZC_ROM1_R1_END_LEN) - 1) << TZC_SEC_TZC_ROM1_R1_END_POS))
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#define TZC_SEC_TZC_ROM1_R1_START TZC_SEC_TZC_ROM1_R1_START
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#define TZC_SEC_TZC_ROM1_R1_START_POS (16U)
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#define TZC_SEC_TZC_ROM1_R1_START_LEN (16U)
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#define TZC_SEC_TZC_ROM1_R1_START_MSK (((1U << TZC_SEC_TZC_ROM1_R1_START_LEN) - 1) << TZC_SEC_TZC_ROM1_R1_START_POS)
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#define TZC_SEC_TZC_ROM1_R1_START_UMSK (~(((1U << TZC_SEC_TZC_ROM1_R1_START_LEN) - 1) << TZC_SEC_TZC_ROM1_R1_START_POS))
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struct tzc_sec_reg {
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/* 0x0 reserved */
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uint8_t RESERVED0x0[64];
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/* 0x40 : tzc_rom_ctrl */
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union {
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struct
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{
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uint32_t tzc_rom0_r0_id0_en : 1; /* [ 0], r/w, 0x1 */
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uint32_t tzc_rom0_r1_id0_en : 1; /* [ 1], r/w, 0x1 */
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uint32_t tzc_rom1_r0_id0_en : 1; /* [ 2], r/w, 0x1 */
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uint32_t tzc_rom1_r1_id0_en : 1; /* [ 3], r/w, 0x1 */
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uint32_t reserved_4_7 : 4; /* [ 7: 4], rsvd, 0x0 */
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uint32_t tzc_rom0_r0_id1_en : 1; /* [ 8], r/w, 0x1 */
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uint32_t tzc_rom0_r1_id1_en : 1; /* [ 9], r/w, 0x1 */
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uint32_t tzc_rom1_r0_id1_en : 1; /* [ 10], r/w, 0x1 */
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uint32_t tzc_rom1_r1_id1_en : 1; /* [ 11], r/w, 0x1 */
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uint32_t reserved_12_15 : 4; /* [15:12], rsvd, 0x0 */
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uint32_t tzc_rom0_r0_en : 1; /* [ 16], r/w, 0x0 */
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uint32_t tzc_rom0_r1_en : 1; /* [ 17], r/w, 0x0 */
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uint32_t tzc_rom1_r0_en : 1; /* [ 18], r/w, 0x0 */
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uint32_t tzc_rom1_r1_en : 1; /* [ 19], r/w, 0x0 */
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uint32_t reserved_20_23 : 4; /* [23:20], rsvd, 0x0 */
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uint32_t tzc_rom0_r0_lock : 1; /* [ 24], r/w, 0x0 */
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uint32_t tzc_rom0_r1_lock : 1; /* [ 25], r/w, 0x0 */
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uint32_t tzc_rom1_r0_lock : 1; /* [ 26], r/w, 0x0 */
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uint32_t tzc_rom1_r1_lock : 1; /* [ 27], r/w, 0x0 */
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uint32_t tzc_sboot_done : 4; /* [31:28], r/w, 0x0 */
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} BF;
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uint32_t WORD;
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} tzc_rom_ctrl;
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/* 0x44 : tzc_rom0_r0 */
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union {
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struct
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{
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uint32_t tzc_rom0_r0_end : 16; /* [15: 0], r/w, 0xffff */
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uint32_t tzc_rom0_r0_start : 16; /* [31:16], r/w, 0x0 */
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} BF;
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uint32_t WORD;
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} tzc_rom0_r0;
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/* 0x48 : tzc_rom0_r1 */
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union {
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struct
|
|
{
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uint32_t tzc_rom0_r1_end : 16; /* [15: 0], r/w, 0xffff */
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uint32_t tzc_rom0_r1_start : 16; /* [31:16], r/w, 0x0 */
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} BF;
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uint32_t WORD;
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} tzc_rom0_r1;
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|
|
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/* 0x4C : tzc_rom1_r0 */
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union {
|
|
struct
|
|
{
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uint32_t tzc_rom1_r0_end : 16; /* [15: 0], r/w, 0xffff */
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uint32_t tzc_rom1_r0_start : 16; /* [31:16], r/w, 0x0 */
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} BF;
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uint32_t WORD;
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} tzc_rom1_r0;
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|
|
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/* 0x50 : tzc_rom1_r1 */
|
|
union {
|
|
struct
|
|
{
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uint32_t tzc_rom1_r1_end : 16; /* [15: 0], r/w, 0xffff */
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uint32_t tzc_rom1_r1_start : 16; /* [31:16], r/w, 0x0 */
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} BF;
|
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uint32_t WORD;
|
|
} tzc_rom1_r1;
|
|
};
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typedef volatile struct tzc_sec_reg tzc_sec_reg_t;
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#endif /* __TZC_SEC_REG_H__ */
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