343 lines
7.7 KiB
C
343 lines
7.7 KiB
C
#ifndef _BFLB_EMAC_H
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#define _BFLB_EMAC_H
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#include "bflb_core.h"
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/** @addtogroup LHAL
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* @{
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*/
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/** @addtogroup EMAC
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* @{
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*/
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#define EMAC_DO_FLUSH_DATA (1)
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/* EMAC clock use external or use internal; 0: used external 1: used internal */
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#define EMAC_CLK_USE_EXTERNAL (0)
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#define EMAC_CLK_USE_INTERNAL (1)
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/** @defgroup EMAC_CMD emac feature control cmd definition
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* @{
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*/
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#define EMAC_CMD_NO_PREAMBLE_MODE (0x01)
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#define EMAC_CMD_EN_PROMISCUOUS (0x02)
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#define EMAC_CMD_FRAME_GAP_CHECK (0x03)
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#define EMAC_CMD_FULL_DUPLEX (0x04)
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#define EMAC_CMD_EN_TX_CRC_FIELD (0x05)
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#define EMAC_CMD_RECV_HUGE_FRAMES (0x06)
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#define EMAC_CMD_EN_AUTO_PADDING (0x07)
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#define EMAC_CMD_RECV_SMALL_FRAME (0x08)
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#define EMAC_CMD_SET_PHY_ADDRESS (0x09)
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#define EMAC_CMD_SET_MAC_ADDRESS (0x0A)
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#define EMAC_CMD_SET_PACKET_GAP (0x0B)
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#define EMAC_CMD_SET_MIN_FRAME (0x0C)
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#define EMAC_CMD_SET_MAX_FRAME (0x0D)
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#define EMAC_CMD_SET_MAXRET (0x0E)
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#define EMAC_CMD_SET_COLLVALID (0x0F)
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/**
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* @}
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*/
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/** @defgroup PHY_STATE phy state definition
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* @{
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*/
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#define PHY_STATE_DOWN (0) /* PHY is not usable */
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#define PHY_STATE_READY (1) /* PHY is OK, wait for controller */
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#define PHY_STATE_UP (2) /* Network is ready for TX/RX */
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#define PHY_STATE_RUNNING (3) /* working */
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#define PHY_STATE_NOLINK (4) /* no cable connected */
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#define PHY_STATE_STOPPED (5) /* PHY has been stopped */
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#define PHY_STATE_TESTING (6) /* in test mode */
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/**
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* @}
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*/
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/* EMAC PACKET */
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#define EMAC_NORMAL_PACKET (uint32_t)(0)
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#define EMAC_FRAGMENT_PACKET (uint32_t)(0x01)
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#define EMAC_NOCOPY_PACKET (uint32_t)(0x02)
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/* ETH packet size */
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/* ETH | Header | Extra | VLAN tag | Payload | CRC | */
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/* Size | 14 | 2 | 4 | 46 ~ 1500 | 4 | */
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#define ETH_MAX_PACKET_SIZE ((uint32_t)1524U) /*!< ETH_HEADER + ETH_EXTRA + ETH_VLAN_TAG + ETH_MAX_ETH_PAYLOAD + ETH_CRC */
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#define ETH_HEADER_SZIE ((uint32_t)14U) /*!< 6 byte Dest addr, 6 byte Src addr, 2 byte length/type */
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#define ETH_CRC_SIZE ((uint32_t)4U) /*!< Ethernet CRC */
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#define ETH_EXTRA_SIZE ((uint32_t)2U) /*!< Extra bytes in some cases */
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#define ETH_VLAN_TAG_SIZE ((uint32_t)4U) /*!< optional 802.1q VLAN Tag */
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#define ETH_MIN_ETH_PAYLOAD_SIZE ((uint32_t)46U) /*!< Minimum Ethernet payload size */
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#define ETH_MAX_ETH_PAYLOAD_SIZE ((uint32_t)1500U) /*!< Maximum Ethernet payload size */
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#define ETH_JUMBO_FRAME_PAYLOAD_SIZE ((uint32_t)9000U) /*!< Jumbo frame payload size */
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/* ETH tx & rx buffer size */
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#ifndef ETH_TX_BUFFER_SIZE
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#define ETH_TX_BUFFER_SIZE (ETH_MAX_PACKET_SIZE)
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#endif
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#ifndef ETH_RX_BUFFER_SIZE
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#define ETH_RX_BUFFER_SIZE (ETH_MAX_PACKET_SIZE)
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#endif
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/* emac interrupt UNMASK/MASK define */
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#define EMAC_INT_EN_TX_DONE (1 << 0)
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#define EMAC_INT_EN_TX_ERROR (1 << 1)
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#define EMAC_INT_EN_RX_DONE (1 << 2)
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#define EMAC_INT_EN_RX_ERROR (1 << 3)
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#define EMAC_INT_EN_RX_BUSY (1 << 4)
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#define EMAC_INT_EN_TX_CTRL (1 << 5)
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#define EMAC_INT_EN_RX_CTRL (1 << 6)
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#define EMAC_INT_EN_ALL (0x7f << 0)
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/* emac interrupt status define */
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#define EMAC_INT_STS_TX_DONE (1 << 0)
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#define EMAC_INT_STS_TX_ERROR (1 << 1)
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#define EMAC_INT_STS_RX_DONE (1 << 2)
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#define EMAC_INT_STS_RX_ERROR (1 << 3)
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#define EMAC_INT_STS_RX_BUSY (1 << 4)
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#define EMAC_INT_STS_TX_CTRL (1 << 5)
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#define EMAC_INT_STS_RX_CTRL (1 << 6)
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#define EMAC_INT_STS_ALL (0x7f << 0)
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/* emac buffer descriptors type define */
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#define EMAC_BD_TYPE_INVLAID (0)
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#define EMAC_BD_TYPE_TX (1)
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#define EMAC_BD_TYPE_RX (2)
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#define EMAC_BD_TYPE_NONE (3)
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#define EMAC_BD_TYPE_MAX (0x7FFFFFFF)
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/**
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* @brief EMAC configuration structure
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*
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* @param mac_addr EMAC mac addr
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* @param inside_clk EMAC select inside or external @ref EMAC_CLK_USE_EXTERNAL or EMAC_CLK_USE_INTERNAL
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* @param mii_clk_div mii clock div
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* @param min_frame_len min frame len
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* @param max_frame_len max frame len
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*
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*/
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struct bflb_emac_config_s {
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uint8_t mac_addr[6];
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uint8_t inside_clk;
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uint8_t mii_clk_div;
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uint16_t min_frame_len;
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uint16_t max_frame_len;
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};
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/**
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* @brief EMAC phy configuration structure
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*
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* @param auto_negotiation EMAC phy speed and mode auto negotiation
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* @param full_duplex EMAC phy duplex mode
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* @param phy_state EMAC phy down,ready,up,running,nolink,halted, @ref PHY_STATE
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* @param use_irq EMAC phy interrupt enable 0: no IRQ used
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* @param speed EMAC phy speed mode
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* @param phy_address EMAC phy address
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* @param phy_id EMAC phy read phy id
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*/
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struct bflb_emac_phy_cfg_s {
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uint8_t auto_negotiation;
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uint8_t full_duplex;
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uint8_t phy_state;
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uint8_t use_irq;
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uint16_t speed;
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uint16_t phy_address;
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uint32_t phy_id;
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};
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief
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*
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* @param [in] dev
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* @param [in] config
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*/
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void bflb_emac_init(struct bflb_device_s *dev, const struct bflb_emac_config_s *config);
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/**
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* @brief
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*
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* @param [in] dev
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*/
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void bflb_emac_stop(struct bflb_device_s *dev);
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/**
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* @brief
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*
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* @param [in] dev
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*/
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void bflb_emac_start(struct bflb_device_s *dev);
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/**
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* @brief
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*
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* @param [in] dev
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*/
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void bflb_emac_start_tx(struct bflb_device_s *dev);
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/**
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* @brief
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*
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* @param [in] dev
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*/
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void bflb_emac_stop_tx(struct bflb_device_s *dev);
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/**
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* @brief
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*
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* @param [in] dev
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*/
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void bflb_emac_start_rx(struct bflb_device_s *dev);
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/**
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* @brief
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*
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* @param [in] dev
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*/
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void bflb_emac_stop_rx(struct bflb_device_s *dev);
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/**
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* @brief
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*
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* @param [in] dev
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* @param [in] eth_tx_buff
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* @param [in] tx_buf_count
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* @param [in] eth_rx_buff
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* @param [in] rx_buf_count
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*/
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void bflb_emac_bd_init(struct bflb_device_s *dev, uint8_t *eth_tx_buff, uint8_t tx_buf_count, uint8_t *eth_rx_buff, uint8_t rx_buf_count);
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/**
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* @brief
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*
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* @param [in] dev
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* @param [in] bdt
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* @return uint32_t
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*/
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uint32_t bflb_emac_bd_get_cur_active(struct bflb_device_s *dev, uint8_t bdt);
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/**
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* @brief
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*
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* @param [in] index
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*/
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void bflb_emac_bd_rx_enqueue(uint32_t index);
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/**
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* @brief
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*
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* @param [in] index
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*/
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void bflb_emac_bd_rx_on_err(uint32_t index);
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/**
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* @brief
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*
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* @param [in] index
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*/
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void bflb_emac_bd_tx_dequeue(uint32_t index);
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/**
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* @brief
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*
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* @param [in] index
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*/
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void bflb_emac_bd_tx_on_err(uint32_t index);
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/**
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* @brief
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*
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* @param [in] flags
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* @param [in] len
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* @param [in] data_in
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* @return int
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*/
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int bflb_emac_bd_tx_enqueue(uint32_t flags, uint32_t len, const uint8_t *data_in);
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/**
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* @brief
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*
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* @param [in] flags
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* @param [in] len
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* @param [in] data_out
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* @return int
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*/
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int bflb_emac_bd_rx_dequeue(uint32_t flags, uint32_t *len, uint8_t *data_out);
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/**
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* @brief
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*
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* @return int
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*/
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int emac_bd_fragment_support(void);
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/**
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* @brief
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*
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* @param [in] dev
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* @param [in] flag
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* @param [in] enable
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*/
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void bflb_emac_int_enable(struct bflb_device_s *dev, uint32_t flag, bool enable);
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/**
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* @brief
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*
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* @param [in] dev
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* @param [in] flag
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*/
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void bflb_emac_int_clear(struct bflb_device_s *dev, uint32_t flag);
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/**
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* @brief
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*
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* @param [in] dev
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* @return uint32_t
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*/
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uint32_t bflb_emac_get_int_status(struct bflb_device_s *dev);
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/**
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* @brief
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*
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* @param [in] dev
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* @param [in] cmd
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* @param [in] arg
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* @return int
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*/
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int bflb_emac_feature_control(struct bflb_device_s *dev, int cmd, size_t arg);
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/**
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* @brief
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*
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* @param [in] dev
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* @param [in] phy_reg
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* @param [in] phy_reg_val
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* @return int
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*/
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int bflb_emac_phy_reg_read(struct bflb_device_s *dev, uint16_t phy_reg, uint16_t *phy_reg_val);
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/**
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* @brief
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*
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* @param [in] dev
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* @param [in] phy_reg
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* @param [in] phy_reg_val
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* @return int
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*/
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int bflb_emac_phy_reg_write(struct bflb_device_s *dev, uint16_t phy_reg, uint16_t phy_reg_val);
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#ifdef __cplusplus
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}
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#endif
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/**
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* @}
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*/
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/**
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* @}
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*/
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#endif |