222 lines
8.3 KiB
C
222 lines
8.3 KiB
C
#ifndef _BFLB_CLOCK_H
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#define _BFLB_CLOCK_H
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#include "bflb_core.h"
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/** @addtogroup LHAL
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* @{
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*/
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/** @addtogroup CLOCK
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* @{
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*/
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/** @defgroup BFLB_SYSTEM_CLOCK system clock definition
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* @{
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*/
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#define BFLB_SYSTEM_ROOT_CLOCK 0
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#define BFLB_SYSTEM_CPU_CLK 1
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#define BFLB_SYSTEM_PBCLK 2
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#define BFLB_SYSTEM_XCLK 3
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#define BFLB_SYSTEM_32K_CLK 4
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/**
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* @}
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*/
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#if defined(BL702) || defined(BL602) || defined(BL702L)
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#define BFLB_GLB_CGEN1_BASE (0x40000000 + 0x24)
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#elif defined(BL616) || defined(BL606P) || defined(BL808) || defined(BL628)
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#define BFLB_GLB_CGEN1_BASE (0x20000000 + 0x584)
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#define BFLB_GLB_CGEN2_BASE (0x20000000 + 0x588)
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#endif
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#define PERIPHERAL_CLOCK_ADC_DAC_ENABLE() \
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do { \
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volatile uint32_t regval = getreg32(BFLB_GLB_CGEN1_BASE); \
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regval |= (1 << 2); \
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putreg32(regval, BFLB_GLB_CGEN1_BASE); \
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} while (0)
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#define PERIPHERAL_CLOCK_SEC_ENABLE() \
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do { \
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volatile uint32_t regval = getreg32(BFLB_GLB_CGEN1_BASE); \
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regval |= (1 << 4); \
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putreg32(regval, BFLB_GLB_CGEN1_BASE); \
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} while (0)
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#define PERIPHERAL_CLOCK_DMA0_ENABLE() \
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do { \
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volatile uint32_t regval = getreg32(BFLB_GLB_CGEN1_BASE); \
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regval |= (1 << 12); \
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putreg32(regval, BFLB_GLB_CGEN1_BASE); \
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} while (0)
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#if defined(BL606P) || defined(BL808)
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#define PERIPHERAL_CLOCK_DMA1_ENABLE()
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#define PERIPHERAL_CLOCK_DMA2_ENABLE()
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#endif
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#define PERIPHERAL_CLOCK_UART0_ENABLE() \
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do { \
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volatile uint32_t regval = getreg32(BFLB_GLB_CGEN1_BASE); \
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regval |= (1 << 16); \
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putreg32(regval, BFLB_GLB_CGEN1_BASE); \
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} while (0)
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#define PERIPHERAL_CLOCK_UART1_ENABLE() \
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do { \
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volatile uint32_t regval = getreg32(BFLB_GLB_CGEN1_BASE); \
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regval |= (1 << 17); \
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putreg32(regval, BFLB_GLB_CGEN1_BASE); \
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} while (0)
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#if defined(BL606P) || defined(BL808)
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#define PERIPHERAL_CLOCK_UART2_ENABLE()
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#endif
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#if defined(BL606P) || defined(BL808)
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#define PERIPHERAL_CLOCK_SPI0_1_ENABLE() \
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do { \
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volatile uint32_t regval = getreg32(BFLB_GLB_CGEN1_BASE); \
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regval |= (1 << 18); \
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putreg32(regval, BFLB_GLB_CGEN1_BASE); \
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} while (0)
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#else
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#define PERIPHERAL_CLOCK_SPI0_ENABLE() \
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do { \
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volatile uint32_t regval = getreg32(BFLB_GLB_CGEN1_BASE); \
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regval |= (1 << 18); \
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putreg32(regval, BFLB_GLB_CGEN1_BASE); \
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} while (0)
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#endif
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#define PERIPHERAL_CLOCK_I2C0_ENABLE() \
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do { \
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volatile uint32_t regval = getreg32(BFLB_GLB_CGEN1_BASE); \
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regval |= (1 << 19); \
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putreg32(regval, BFLB_GLB_CGEN1_BASE); \
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} while (0)
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#if defined(BL606P) || defined(BL808)
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#define PERIPHERAL_CLOCK_I2C1_ENABLE() \
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do { \
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volatile uint32_t regval = getreg32(BFLB_GLB_CGEN1_BASE); \
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regval |= (1 << 25); \
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putreg32(regval, BFLB_GLB_CGEN1_BASE); \
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} while (0)
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#endif
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#define PERIPHERAL_CLOCK_PWM0_ENABLE() \
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do { \
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volatile uint32_t regval = getreg32(BFLB_GLB_CGEN1_BASE); \
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regval |= (1 << 20); \
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putreg32(regval, BFLB_GLB_CGEN1_BASE); \
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} while (0)
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#define PERIPHERAL_CLOCK_TIMER0_1_WDG_ENABLE() \
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do { \
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volatile uint32_t regval = getreg32(BFLB_GLB_CGEN1_BASE); \
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regval |= (1 << 21); \
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putreg32(regval, BFLB_GLB_CGEN1_BASE); \
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} while (0)
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#define PERIPHERAL_CLOCK_IR_ENABLE() \
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do { \
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volatile uint32_t regval = getreg32(BFLB_GLB_CGEN1_BASE); \
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regval |= (1 << 22); \
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putreg32(regval, BFLB_GLB_CGEN1_BASE); \
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} while (0)
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#if defined(BL606P) || defined(BL808)
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#define PERIPHERAL_CLOCK_CAN_UART2_ENABLE() \
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do { \
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volatile uint32_t regval = getreg32(BFLB_GLB_CGEN1_BASE); \
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regval |= (1 << 26); \
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putreg32(regval, BFLB_GLB_CGEN1_BASE); \
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} while (0)
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#elif defined(BL616) || defined(BL628)
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#define PERIPHERAL_CLOCK_CAN_ENABLE() \
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do { \
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volatile uint32_t regval = getreg32(BFLB_GLB_CGEN1_BASE); \
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regval |= (1 << 26); \
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putreg32(regval, BFLB_GLB_CGEN1_BASE); \
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} while (0)
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#endif
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#define PERIPHERAL_CLOCK_I2S_ENABLE() \
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do { \
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volatile uint32_t regval = getreg32(BFLB_GLB_CGEN1_BASE); \
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regval |= (1 << 27); \
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putreg32(regval, BFLB_GLB_CGEN1_BASE); \
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} while (0)
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#if defined(BL702)
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#define PERIPHERAL_CLOCK_USB_ENABLE() \
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do { \
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volatile uint32_t regval = getreg32(BFLB_GLB_CGEN1_BASE); \
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regval |= (1 << 28); \
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putreg32(regval, BFLB_GLB_CGEN1_BASE); \
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} while (0)
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#elif defined(BL616) || defined(BL606P) || defined(BL808)
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#define PERIPHERAL_CLOCK_USB_ENABLE() \
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do { \
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volatile uint32_t regval = getreg32(BFLB_GLB_CGEN1_BASE); \
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regval |= (1 << 13); \
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putreg32(regval, BFLB_GLB_CGEN1_BASE); \
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} while (0)
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#endif
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#if defined(BL616) || defined(BL606P) || defined(BL808) || defined(BL628)
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#define PERIPHERAL_CLOCK_SDH_ENABLE() \
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do { \
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volatile uint32_t regval = getreg32(BFLB_GLB_CGEN2_BASE); \
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regval |= (1 << 22); \
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putreg32(regval, BFLB_GLB_CGEN2_BASE); \
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} while (0)
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#endif
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#if defined(BL616)
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#define PERIPHERAL_CLOCK_EMAC_ENABLE() \
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do { \
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volatile uint32_t regval = getreg32(BFLB_GLB_CGEN2_BASE); \
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regval |= (1 << 23); \
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putreg32(regval, BFLB_GLB_CGEN2_BASE); \
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} while (0)
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief Get system clock frequence
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*
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* @param [in] type system clock type
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* @return frequence
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*/
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uint32_t bflb_clk_get_system_clock(uint8_t type);
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/**
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* @brief Get peripheral clock frequence
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*
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* @param [in] type peripheral type
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* @param [in] idx peripheral index
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* @return frequence
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*/
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uint32_t bflb_clk_get_peripheral_clock(uint8_t type, uint8_t idx);
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#ifdef __cplusplus
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}
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#endif
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/**
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* @}
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*/
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/**
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* @}
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*/
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#endif |