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bl_mcu_sdk/drivers/bl602_driver/regs/soc602_reg.svd
jzlv bc120c8861 [feat] add bl602 driver and board
2021-06-04 18:15:21 +08:00

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<?xml version="1.0" encoding="utf-8"?>
<device schemaVersion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_0.xsd">
<vendor>bouffalolab</vendor>
<vendorID>bouffalolab</vendorID>
<name>602</name>
<series>WiFi BT</series>
<description>high-performance, 32-bit RV32IMAFC core</description>
<addressUnitBits>8</addressUnitBits>
<width>32</width>
<size>32</size>
<resetValue>0x00000000</resetValue>
<resetMask>0xFFFFFFFF</resetMask>
<cpu>
<name>602</name>
<endian>little</endian>
</cpu>
<peripherals>
<peripheral>
<name>glb</name>
<description>glb.</description>
<baseAddress>0x40000000</baseAddress>
<groupName>glb</groupName>
<size>32</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>clk_cfg0</name>
<description>clk_cfg0.</description>
<addressOffset>0x0</addressOffset>
<fields>
<field>
<name>glb_id</name>
<lsb>28</lsb>
<msb>31</msb>
</field>
<field>
<name>chip_rdy</name>
<lsb>27</lsb>
<msb>27</msb>
</field>
<field>
<name>fclk_sw_state</name>
<lsb>24</lsb>
<msb>26</msb>
</field>
<field>
<name>reg_bclk_div</name>
<lsb>16</lsb>
<msb>23</msb>
</field>
<field>
<name>reg_hclk_div</name>
<lsb>8</lsb>
<msb>15</msb>
</field>
<field>
<name>hbn_root_clk_sel</name>
<lsb>6</lsb>
<msb>7</msb>
</field>
<field>
<name>reg_pll_sel</name>
<lsb>4</lsb>
<msb>5</msb>
</field>
<field>
<name>reg_bclk_en</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>reg_hclk_en</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>reg_fclk_en</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>reg_pll_en</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>clk_cfg1</name>
<description>clk_cfg1.</description>
<addressOffset>0x4</addressOffset>
<fields>
<field>
<name>ble_en</name>
<lsb>24</lsb>
<msb>24</msb>
</field>
<field>
<name>ble_clk_sel</name>
<lsb>16</lsb>
<msb>21</msb>
</field>
<field>
<name>wifi_mac_wt_div</name>
<lsb>4</lsb>
<msb>7</msb>
</field>
<field>
<name>wifi_mac_core_div</name>
<lsb>0</lsb>
<msb>3</msb>
</field>
</fields>
</register>
<register>
<name>clk_cfg2</name>
<description>clk_cfg2.</description>
<addressOffset>0x8</addressOffset>
<fields>
<field>
<name>dma_clk_en</name>
<lsb>24</lsb>
<msb>31</msb>
</field>
<field>
<name>ir_clk_en</name>
<lsb>23</lsb>
<msb>23</msb>
</field>
<field>
<name>ir_clk_div</name>
<lsb>16</lsb>
<msb>21</msb>
</field>
<field>
<name>sf_clk_sel2</name>
<lsb>14</lsb>
<msb>15</msb>
</field>
<field>
<name>sf_clk_sel</name>
<lsb>12</lsb>
<msb>13</msb>
</field>
<field>
<name>sf_clk_en</name>
<lsb>11</lsb>
<msb>11</msb>
</field>
<field>
<name>sf_clk_div</name>
<lsb>8</lsb>
<msb>10</msb>
</field>
<field>
<name>hbn_uart_clk_sel</name>
<lsb>7</lsb>
<msb>7</msb>
</field>
<field>
<name>uart_clk_en</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>uart_clk_div</name>
<lsb>0</lsb>
<msb>2</msb>
</field>
</fields>
</register>
<register>
<name>clk_cfg3</name>
<description>clk_cfg3.</description>
<addressOffset>0xC</addressOffset>
<fields>
<field>
<name>i2c_clk_en</name>
<lsb>24</lsb>
<msb>24</msb>
</field>
<field>
<name>i2c_clk_div</name>
<lsb>16</lsb>
<msb>23</msb>
</field>
<field>
<name>spi_clk_en</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>spi_clk_div</name>
<lsb>0</lsb>
<msb>4</msb>
</field>
</fields>
</register>
<register>
<name>swrst_cfg0</name>
<description>swrst_cfg0.</description>
<addressOffset>0x10</addressOffset>
<fields>
<field>
<name>swrst_s30</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>swrst_s20</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>swrst_s01</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>swrst_s00</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>swrst_cfg1</name>
<description>swrst_cfg1.</description>
<addressOffset>0x14</addressOffset>
<fields>
<field>
<name>swrst_s1a7</name>
<lsb>23</lsb>
<msb>23</msb>
</field>
<field>
<name>swrst_s1a6</name>
<lsb>22</lsb>
<msb>22</msb>
</field>
<field>
<name>swrst_s1a5</name>
<lsb>21</lsb>
<msb>21</msb>
</field>
<field>
<name>swrst_s1a4</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>swrst_s1a3</name>
<lsb>19</lsb>
<msb>19</msb>
</field>
<field>
<name>swrst_s1a2</name>
<lsb>18</lsb>
<msb>18</msb>
</field>
<field>
<name>swrst_s1a1</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>swrst_s1a0</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>swrst_s1f</name>
<lsb>15</lsb>
<msb>15</msb>
</field>
<field>
<name>swrst_s1e</name>
<lsb>14</lsb>
<msb>14</msb>
</field>
<field>
<name>swrst_s1d</name>
<lsb>13</lsb>
<msb>13</msb>
</field>
<field>
<name>swrst_s1c</name>
<lsb>12</lsb>
<msb>12</msb>
</field>
<field>
<name>swrst_s1b</name>
<lsb>11</lsb>
<msb>11</msb>
</field>
<field>
<name>swrst_s1a</name>
<lsb>10</lsb>
<msb>10</msb>
</field>
<field>
<name>swrst_s19</name>
<lsb>9</lsb>
<msb>9</msb>
</field>
<field>
<name>swrst_s18</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>swrst_s17</name>
<lsb>7</lsb>
<msb>7</msb>
</field>
<field>
<name>swrst_s16</name>
<lsb>6</lsb>
<msb>6</msb>
</field>
<field>
<name>swrst_s15</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>swrst_s14</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>swrst_s13</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>swrst_s12</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>swrst_s11</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>swrst_s10</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>swrst_cfg2</name>
<description>swrst_cfg2.</description>
<addressOffset>0x18</addressOffset>
<fields>
<field>
<name>pka_clk_sel</name>
<lsb>24</lsb>
<msb>24</msb>
</field>
<field>
<name>reg_ctrl_reset_dummy</name>
<lsb>4</lsb>
<msb>7</msb>
</field>
<field>
<name>reg_ctrl_sys_reset</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>reg_ctrl_cpu_reset</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>reg_ctrl_pwron_rst</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>swrst_cfg3</name>
<description>swrst_cfg3.</description>
<addressOffset>0x1C</addressOffset>
<fields/>
</register>
<register>
<name>cgen_cfg0</name>
<description>cgen_cfg0.</description>
<addressOffset>0x20</addressOffset>
<fields>
<field>
<name>cgen_m</name>
<lsb>0</lsb>
<msb>7</msb>
</field>
</fields>
</register>
<register>
<name>cgen_cfg1</name>
<description>cgen_cfg1.</description>
<addressOffset>0x24</addressOffset>
<fields>
<field>
<name>cgen_s1a</name>
<lsb>16</lsb>
<msb>23</msb>
</field>
<field>
<name>cgen_s1</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>cgen_cfg2</name>
<description>cgen_cfg2.</description>
<addressOffset>0x28</addressOffset>
<fields>
<field>
<name>cgen_s3</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>cgen_s2</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>cgen_cfg3</name>
<description>cgen_cfg3.</description>
<addressOffset>0x2C</addressOffset>
<fields/>
</register>
<register>
<name>MBIST_CTL</name>
<description>MBIST_CTL.</description>
<addressOffset>0x30</addressOffset>
<fields>
<field>
<name>reg_mbist_rst_n</name>
<lsb>31</lsb>
<msb>31</msb>
</field>
<field>
<name>wifi_mbist_mode</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>ocram_mbist_mode</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>tag_mbist_mode</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>hsram_mbist_mode</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>irom_mbist_mode</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>MBIST_STAT</name>
<description>MBIST_STAT.</description>
<addressOffset>0x34</addressOffset>
<fields>
<field>
<name>wifi_mbist_fail</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>ocram_mbist_fail</name>
<lsb>19</lsb>
<msb>19</msb>
</field>
<field>
<name>tag_mbist_fail</name>
<lsb>18</lsb>
<msb>18</msb>
</field>
<field>
<name>hsram_mbist_fail</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>irom_mbist_fail</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>wifi_mbist_done</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>ocram_mbist_done</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>tag_mbist_done</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>hsram_mbist_done</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>irom_mbist_done</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>bmx_cfg1</name>
<description>bmx_cfg1.</description>
<addressOffset>0x50</addressOffset>
<fields>
<field>
<name>hbn_apb_cfg</name>
<lsb>24</lsb>
<msb>31</msb>
</field>
<field>
<name>pds_apb_cfg</name>
<lsb>16</lsb>
<msb>23</msb>
</field>
<field>
<name>hsel_option</name>
<lsb>12</lsb>
<msb>15</msb>
</field>
<field>
<name>bmx_gating_dis</name>
<lsb>10</lsb>
<msb>10</msb>
</field>
<field>
<name>bmx_busy_option_dis</name>
<lsb>9</lsb>
<msb>9</msb>
</field>
<field>
<name>bmx_err_en</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>bmx_arb_mode</name>
<lsb>4</lsb>
<msb>5</msb>
</field>
<field>
<name>bmx_timeout_en</name>
<lsb>0</lsb>
<msb>3</msb>
</field>
</fields>
</register>
<register>
<name>bmx_cfg2</name>
<description>bmx_cfg2.</description>
<addressOffset>0x54</addressOffset>
<fields>
<field>
<name>bmx_dbg_sel</name>
<lsb>28</lsb>
<msb>31</msb>
</field>
<field>
<name>bmx_err_tz</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>bmx_err_dec</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>bmx_err_addr_dis</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>bmx_err_addr</name>
<description>bmx_err_addr.</description>
<addressOffset>0x58</addressOffset>
<fields>
<field>
<name>bmx_err_addr</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>bmx_dbg_out</name>
<description>bmx_dbg_out.</description>
<addressOffset>0x5C</addressOffset>
<fields>
<field>
<name>bmx_dbg_out</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>rsv0</name>
<description>rsv0.</description>
<addressOffset>0x60</addressOffset>
<fields>
<field>
<name>rsvd_31_0</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>rsv1</name>
<description>rsv1.</description>
<addressOffset>0x64</addressOffset>
<fields>
<field>
<name>rsvd_31_0</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>rsv2</name>
<description>rsv2.</description>
<addressOffset>0x68</addressOffset>
<fields>
<field>
<name>rsvd_31_0</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>rsv3</name>
<description>rsv3.</description>
<addressOffset>0x6C</addressOffset>
<fields>
<field>
<name>rsvd_31_0</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sram_ret</name>
<description>sram_ret.</description>
<addressOffset>0x70</addressOffset>
<fields>
<field>
<name>reg_sram_ret</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sram_slp</name>
<description>sram_slp.</description>
<addressOffset>0x74</addressOffset>
<fields>
<field>
<name>reg_sram_slp</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sram_parm</name>
<description>sram_parm.</description>
<addressOffset>0x78</addressOffset>
<fields>
<field>
<name>reg_sram_parm</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>seam_misc</name>
<description>seam_misc.</description>
<addressOffset>0x7C</addressOffset>
<fields>
<field>
<name>em_sel</name>
<lsb>0</lsb>
<msb>3</msb>
</field>
</fields>
</register>
<register>
<name>glb_parm</name>
<description>glb_parm.</description>
<addressOffset>0x80</addressOffset>
<fields>
<field>
<name>uart_swap_set</name>
<lsb>24</lsb>
<msb>26</msb>
</field>
<field>
<name>p7_jtag_use_io_2_5</name>
<lsb>23</lsb>
<msb>23</msb>
</field>
<field>
<name>p6_sdio_use_io_0_5</name>
<lsb>22</lsb>
<msb>22</msb>
</field>
<field>
<name>p5_dac_test_with_jtag</name>
<lsb>21</lsb>
<msb>21</msb>
</field>
<field>
<name>p4_adc_test_with_jtag</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>p3_cci_use_io_2_5</name>
<lsb>19</lsb>
<msb>19</msb>
</field>
<field>
<name>p2_dac_test_with_cci</name>
<lsb>18</lsb>
<msb>18</msb>
</field>
<field>
<name>p1_adc_test_with_cci</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>reg_cci_use_sdio_pin</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>reg_cci_use_jtag_pin</name>
<lsb>15</lsb>
<msb>15</msb>
</field>
<field>
<name>reg_spi_0_swap</name>
<lsb>13</lsb>
<msb>13</msb>
</field>
<field>
<name>reg_spi_0_master_mode</name>
<lsb>12</lsb>
<msb>12</msb>
</field>
<field>
<name>sel_embedded_sflash</name>
<lsb>9</lsb>
<msb>9</msb>
</field>
<field>
<name>swap_sflash_io_3_io_0</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>jtag_swap_set</name>
<lsb>2</lsb>
<msb>7</msb>
</field>
<field>
<name>reg_ext_rst_smt</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>reg_bd_en</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>CPU_CLK_CFG</name>
<description>CPU_CLK_CFG.</description>
<addressOffset>0x90</addressOffset>
<fields>
<field>
<name>debug_ndreset_gate</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>cpu_rtc_sel</name>
<lsb>19</lsb>
<msb>19</msb>
</field>
<field>
<name>cpu_rtc_en</name>
<lsb>18</lsb>
<msb>18</msb>
</field>
<field>
<name>cpu_rtc_div</name>
<lsb>0</lsb>
<msb>16</msb>
</field>
</fields>
</register>
<register>
<name>GPADC_32M_SRC_CTRL</name>
<description>GPADC_32M_SRC_CTRL.</description>
<addressOffset>0xA4</addressOffset>
<fields>
<field>
<name>gpadc_32m_div_en</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>gpadc_32m_clk_sel</name>
<lsb>7</lsb>
<msb>7</msb>
</field>
<field>
<name>gpadc_32m_clk_div</name>
<lsb>0</lsb>
<msb>5</msb>
</field>
</fields>
</register>
<register>
<name>DIG32K_WAKEUP_CTRL</name>
<description>DIG32K_WAKEUP_CTRL.</description>
<addressOffset>0xA8</addressOffset>
<fields>
<field>
<name>reg_en_platform_wakeup</name>
<lsb>31</lsb>
<msb>31</msb>
</field>
<field>
<name>dig_clk_src_sel</name>
<lsb>28</lsb>
<msb>28</msb>
</field>
<field>
<name>dig_512k_comp</name>
<lsb>25</lsb>
<msb>25</msb>
</field>
<field>
<name>dig_512k_en</name>
<lsb>24</lsb>
<msb>24</msb>
</field>
<field>
<name>dig_512k_div</name>
<lsb>16</lsb>
<msb>22</msb>
</field>
<field>
<name>dig_32k_comp</name>
<lsb>13</lsb>
<msb>13</msb>
</field>
<field>
<name>dig_32k_en</name>
<lsb>12</lsb>
<msb>12</msb>
</field>
<field>
<name>dig_32k_div</name>
<lsb>0</lsb>
<msb>10</msb>
</field>
</fields>
</register>
<register>
<name>WIFI_BT_COEX_CTRL</name>
<description>WIFI_BT_COEX_CTRL.</description>
<addressOffset>0xAC</addressOffset>
<fields>
<field>
<name>en_gpio_bt_coex</name>
<lsb>12</lsb>
<msb>12</msb>
</field>
<field>
<name>coex_bt_bw</name>
<lsb>11</lsb>
<msb>11</msb>
</field>
<field>
<name>coex_bt_pti</name>
<lsb>7</lsb>
<msb>10</msb>
</field>
<field>
<name>coex_bt_channel</name>
<lsb>0</lsb>
<msb>6</msb>
</field>
</fields>
</register>
<register>
<name>UART_SIG_SEL_0</name>
<description>UART_SIG_SEL_0.</description>
<addressOffset>0xC0</addressOffset>
<fields>
<field>
<name>uart_sig_7_sel</name>
<lsb>28</lsb>
<msb>31</msb>
</field>
<field>
<name>uart_sig_6_sel</name>
<lsb>24</lsb>
<msb>27</msb>
</field>
<field>
<name>uart_sig_5_sel</name>
<lsb>20</lsb>
<msb>23</msb>
</field>
<field>
<name>uart_sig_4_sel</name>
<lsb>16</lsb>
<msb>19</msb>
</field>
<field>
<name>uart_sig_3_sel</name>
<lsb>12</lsb>
<msb>15</msb>
</field>
<field>
<name>uart_sig_2_sel</name>
<lsb>8</lsb>
<msb>11</msb>
</field>
<field>
<name>uart_sig_1_sel</name>
<lsb>4</lsb>
<msb>7</msb>
</field>
<field>
<name>uart_sig_0_sel</name>
<lsb>0</lsb>
<msb>3</msb>
</field>
</fields>
</register>
<register>
<name>DBG_SEL_LL</name>
<description>DBG_SEL_LL.</description>
<addressOffset>0xD0</addressOffset>
<fields>
<field>
<name>reg_dbg_ll_ctrl</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>DBG_SEL_LH</name>
<description>DBG_SEL_LH.</description>
<addressOffset>0xD4</addressOffset>
<fields>
<field>
<name>reg_dbg_lh_ctrl</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>DBG_SEL_HL</name>
<description>DBG_SEL_HL.</description>
<addressOffset>0xD8</addressOffset>
<fields>
<field>
<name>reg_dbg_hl_ctrl</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>DBG_SEL_HH</name>
<description>DBG_SEL_HH.</description>
<addressOffset>0xDC</addressOffset>
<fields>
<field>
<name>reg_dbg_hh_ctrl</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>debug</name>
<description>debug.</description>
<addressOffset>0xE0</addressOffset>
<fields>
<field>
<name>debug_i</name>
<lsb>1</lsb>
<msb>31</msb>
</field>
<field>
<name>debug_oe</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>GPIO_CFGCTL0</name>
<description>GPIO_CFGCTL0.</description>
<addressOffset>0x100</addressOffset>
<fields>
<field>
<name>real_gpio_1_func_sel</name>
<lsb>28</lsb>
<msb>31</msb>
</field>
<field>
<name>reg_gpio_1_func_sel</name>
<lsb>24</lsb>
<msb>27</msb>
</field>
<field>
<name>reg_gpio_1_pd</name>
<lsb>21</lsb>
<msb>21</msb>
</field>
<field>
<name>reg_gpio_1_pu</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>reg_gpio_1_drv</name>
<lsb>18</lsb>
<msb>19</msb>
</field>
<field>
<name>reg_gpio_1_smt</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>reg_gpio_1_ie</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>real_gpio_0_func_sel</name>
<lsb>12</lsb>
<msb>15</msb>
</field>
<field>
<name>reg_gpio_0_func_sel</name>
<lsb>8</lsb>
<msb>11</msb>
</field>
<field>
<name>reg_gpio_0_pd</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>reg_gpio_0_pu</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>reg_gpio_0_drv</name>
<lsb>2</lsb>
<msb>3</msb>
</field>
<field>
<name>reg_gpio_0_smt</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>reg_gpio_0_ie</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>GPIO_CFGCTL1</name>
<description>GPIO_CFGCTL1.</description>
<addressOffset>0x104</addressOffset>
<fields>
<field>
<name>real_gpio_3_func_sel</name>
<lsb>28</lsb>
<msb>31</msb>
</field>
<field>
<name>reg_gpio_3_func_sel</name>
<lsb>24</lsb>
<msb>27</msb>
</field>
<field>
<name>reg_gpio_3_pd</name>
<lsb>21</lsb>
<msb>21</msb>
</field>
<field>
<name>reg_gpio_3_pu</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>reg_gpio_3_drv</name>
<lsb>18</lsb>
<msb>19</msb>
</field>
<field>
<name>reg_gpio_3_smt</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>reg_gpio_3_ie</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>real_gpio_2_func_sel</name>
<lsb>12</lsb>
<msb>15</msb>
</field>
<field>
<name>reg_gpio_2_func_sel</name>
<lsb>8</lsb>
<msb>11</msb>
</field>
<field>
<name>reg_gpio_2_pd</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>reg_gpio_2_pu</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>reg_gpio_2_drv</name>
<lsb>2</lsb>
<msb>3</msb>
</field>
<field>
<name>reg_gpio_2_smt</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>reg_gpio_2_ie</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>GPIO_CFGCTL2</name>
<description>GPIO_CFGCTL2.</description>
<addressOffset>0x108</addressOffset>
<fields>
<field>
<name>real_gpio_5_func_sel</name>
<lsb>28</lsb>
<msb>31</msb>
</field>
<field>
<name>reg_gpio_5_func_sel</name>
<lsb>24</lsb>
<msb>27</msb>
</field>
<field>
<name>reg_gpio_5_pd</name>
<lsb>21</lsb>
<msb>21</msb>
</field>
<field>
<name>reg_gpio_5_pu</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>reg_gpio_5_drv</name>
<lsb>18</lsb>
<msb>19</msb>
</field>
<field>
<name>reg_gpio_5_smt</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>reg_gpio_5_ie</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>real_gpio_4_func_sel</name>
<lsb>12</lsb>
<msb>15</msb>
</field>
<field>
<name>reg_gpio_4_func_sel</name>
<lsb>8</lsb>
<msb>11</msb>
</field>
<field>
<name>reg_gpio_4_pd</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>reg_gpio_4_pu</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>reg_gpio_4_drv</name>
<lsb>2</lsb>
<msb>3</msb>
</field>
<field>
<name>reg_gpio_4_smt</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>reg_gpio_4_ie</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>GPIO_CFGCTL3</name>
<description>GPIO_CFGCTL3.</description>
<addressOffset>0x10C</addressOffset>
<fields>
<field>
<name>reg_gpio_7_func_sel</name>
<lsb>24</lsb>
<msb>27</msb>
</field>
<field>
<name>reg_gpio_7_pd</name>
<lsb>21</lsb>
<msb>21</msb>
</field>
<field>
<name>reg_gpio_7_pu</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>reg_gpio_7_drv</name>
<lsb>18</lsb>
<msb>19</msb>
</field>
<field>
<name>reg_gpio_7_smt</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>reg_gpio_7_ie</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>reg_gpio_6_func_sel</name>
<lsb>8</lsb>
<msb>11</msb>
</field>
<field>
<name>reg_gpio_6_pd</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>reg_gpio_6_pu</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>reg_gpio_6_drv</name>
<lsb>2</lsb>
<msb>3</msb>
</field>
<field>
<name>reg_gpio_6_smt</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>reg_gpio_6_ie</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>GPIO_CFGCTL4</name>
<description>GPIO_CFGCTL4.</description>
<addressOffset>0x110</addressOffset>
<fields>
<field>
<name>reg_gpio_9_func_sel</name>
<lsb>24</lsb>
<msb>27</msb>
</field>
<field>
<name>reg_gpio_9_pd</name>
<lsb>21</lsb>
<msb>21</msb>
</field>
<field>
<name>reg_gpio_9_pu</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>reg_gpio_9_drv</name>
<lsb>18</lsb>
<msb>19</msb>
</field>
<field>
<name>reg_gpio_9_smt</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>reg_gpio_9_ie</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>reg_gpio_8_func_sel</name>
<lsb>8</lsb>
<msb>11</msb>
</field>
<field>
<name>reg_gpio_8_pd</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>reg_gpio_8_pu</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>reg_gpio_8_drv</name>
<lsb>2</lsb>
<msb>3</msb>
</field>
<field>
<name>reg_gpio_8_smt</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>reg_gpio_8_ie</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>GPIO_CFGCTL5</name>
<description>GPIO_CFGCTL5.</description>
<addressOffset>0x114</addressOffset>
<fields>
<field>
<name>reg_gpio_11_func_sel</name>
<lsb>24</lsb>
<msb>27</msb>
</field>
<field>
<name>reg_gpio_11_pd</name>
<lsb>21</lsb>
<msb>21</msb>
</field>
<field>
<name>reg_gpio_11_pu</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>reg_gpio_11_drv</name>
<lsb>18</lsb>
<msb>19</msb>
</field>
<field>
<name>reg_gpio_11_smt</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>reg_gpio_11_ie</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>reg_gpio_10_func_sel</name>
<lsb>8</lsb>
<msb>11</msb>
</field>
<field>
<name>reg_gpio_10_pd</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>reg_gpio_10_pu</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>reg_gpio_10_drv</name>
<lsb>2</lsb>
<msb>3</msb>
</field>
<field>
<name>reg_gpio_10_smt</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>reg_gpio_10_ie</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>GPIO_CFGCTL6</name>
<description>GPIO_CFGCTL6.</description>
<addressOffset>0x118</addressOffset>
<fields>
<field>
<name>reg_gpio_13_func_sel</name>
<lsb>24</lsb>
<msb>27</msb>
</field>
<field>
<name>reg_gpio_13_pd</name>
<lsb>21</lsb>
<msb>21</msb>
</field>
<field>
<name>reg_gpio_13_pu</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>reg_gpio_13_drv</name>
<lsb>18</lsb>
<msb>19</msb>
</field>
<field>
<name>reg_gpio_13_smt</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>reg_gpio_13_ie</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>reg_gpio_12_func_sel</name>
<lsb>8</lsb>
<msb>11</msb>
</field>
<field>
<name>reg_gpio_12_pd</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>reg_gpio_12_pu</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>reg_gpio_12_drv</name>
<lsb>2</lsb>
<msb>3</msb>
</field>
<field>
<name>reg_gpio_12_smt</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>reg_gpio_12_ie</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>GPIO_CFGCTL7</name>
<description>GPIO_CFGCTL7.</description>
<addressOffset>0x11C</addressOffset>
<fields>
<field>
<name>reg_gpio_15_func_sel</name>
<lsb>24</lsb>
<msb>27</msb>
</field>
<field>
<name>reg_gpio_15_pd</name>
<lsb>21</lsb>
<msb>21</msb>
</field>
<field>
<name>reg_gpio_15_pu</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>reg_gpio_15_drv</name>
<lsb>18</lsb>
<msb>19</msb>
</field>
<field>
<name>reg_gpio_15_smt</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>reg_gpio_15_ie</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>reg_gpio_14_func_sel</name>
<lsb>8</lsb>
<msb>11</msb>
</field>
<field>
<name>reg_gpio_14_pd</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>reg_gpio_14_pu</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>reg_gpio_14_drv</name>
<lsb>2</lsb>
<msb>3</msb>
</field>
<field>
<name>reg_gpio_14_smt</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>reg_gpio_14_ie</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>GPIO_CFGCTL8</name>
<description>GPIO_CFGCTL8.</description>
<addressOffset>0x120</addressOffset>
<fields>
<field>
<name>reg_gpio_17_func_sel</name>
<lsb>24</lsb>
<msb>27</msb>
</field>
<field>
<name>reg_gpio_17_pd</name>
<lsb>21</lsb>
<msb>21</msb>
</field>
<field>
<name>reg_gpio_17_pu</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>reg_gpio_17_drv</name>
<lsb>18</lsb>
<msb>19</msb>
</field>
<field>
<name>reg_gpio_17_smt</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>reg_gpio_17_ie</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>reg_gpio_16_func_sel</name>
<lsb>8</lsb>
<msb>11</msb>
</field>
<field>
<name>reg_gpio_16_pd</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>reg_gpio_16_pu</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>reg_gpio_16_drv</name>
<lsb>2</lsb>
<msb>3</msb>
</field>
<field>
<name>reg_gpio_16_smt</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>reg_gpio_16_ie</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>GPIO_CFGCTL9</name>
<description>GPIO_CFGCTL9.</description>
<addressOffset>0x124</addressOffset>
<fields>
<field>
<name>reg_gpio_19_func_sel</name>
<lsb>24</lsb>
<msb>27</msb>
</field>
<field>
<name>reg_gpio_19_pd</name>
<lsb>21</lsb>
<msb>21</msb>
</field>
<field>
<name>reg_gpio_19_pu</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>reg_gpio_19_drv</name>
<lsb>18</lsb>
<msb>19</msb>
</field>
<field>
<name>reg_gpio_19_smt</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>reg_gpio_19_ie</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>reg_gpio_18_func_sel</name>
<lsb>8</lsb>
<msb>11</msb>
</field>
<field>
<name>reg_gpio_18_pd</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>reg_gpio_18_pu</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>reg_gpio_18_drv</name>
<lsb>2</lsb>
<msb>3</msb>
</field>
<field>
<name>reg_gpio_18_smt</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>reg_gpio_18_ie</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>GPIO_CFGCTL10</name>
<description>GPIO_CFGCTL10.</description>
<addressOffset>0x128</addressOffset>
<fields>
<field>
<name>reg_gpio_21_func_sel</name>
<lsb>24</lsb>
<msb>27</msb>
</field>
<field>
<name>reg_gpio_21_pd</name>
<lsb>21</lsb>
<msb>21</msb>
</field>
<field>
<name>reg_gpio_21_pu</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>reg_gpio_21_drv</name>
<lsb>18</lsb>
<msb>19</msb>
</field>
<field>
<name>reg_gpio_21_smt</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>reg_gpio_21_ie</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>reg_gpio_20_func_sel</name>
<lsb>8</lsb>
<msb>11</msb>
</field>
<field>
<name>reg_gpio_20_pd</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>reg_gpio_20_pu</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>reg_gpio_20_drv</name>
<lsb>2</lsb>
<msb>3</msb>
</field>
<field>
<name>reg_gpio_20_smt</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>reg_gpio_20_ie</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>GPIO_CFGCTL11</name>
<description>GPIO_CFGCTL11.</description>
<addressOffset>0x12C</addressOffset>
<fields>
<field>
<name>reg_gpio_23_pd</name>
<lsb>21</lsb>
<msb>21</msb>
</field>
<field>
<name>reg_gpio_23_pu</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>reg_gpio_23_drv</name>
<lsb>18</lsb>
<msb>19</msb>
</field>
<field>
<name>reg_gpio_23_smt</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>reg_gpio_23_ie</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>reg_gpio_22_func_sel</name>
<lsb>8</lsb>
<msb>11</msb>
</field>
<field>
<name>reg_gpio_22_pd</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>reg_gpio_22_pu</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>reg_gpio_22_drv</name>
<lsb>2</lsb>
<msb>3</msb>
</field>
<field>
<name>reg_gpio_22_smt</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>reg_gpio_22_ie</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>GPIO_CFGCTL12</name>
<description>GPIO_CFGCTL12.</description>
<addressOffset>0x130</addressOffset>
<fields>
<field>
<name>reg_gpio_25_pd</name>
<lsb>21</lsb>
<msb>21</msb>
</field>
<field>
<name>reg_gpio_25_pu</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>reg_gpio_25_drv</name>
<lsb>18</lsb>
<msb>19</msb>
</field>
<field>
<name>reg_gpio_25_smt</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>reg_gpio_25_ie</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>reg_gpio_24_pd</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>reg_gpio_24_pu</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>reg_gpio_24_drv</name>
<lsb>2</lsb>
<msb>3</msb>
</field>
<field>
<name>reg_gpio_24_smt</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>reg_gpio_24_ie</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>GPIO_CFGCTL13</name>
<description>GPIO_CFGCTL13.</description>
<addressOffset>0x134</addressOffset>
<fields>
<field>
<name>reg_gpio_27_pd</name>
<lsb>21</lsb>
<msb>21</msb>
</field>
<field>
<name>reg_gpio_27_pu</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>reg_gpio_27_drv</name>
<lsb>18</lsb>
<msb>19</msb>
</field>
<field>
<name>reg_gpio_27_smt</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>reg_gpio_27_ie</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>reg_gpio_26_pd</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>reg_gpio_26_pu</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>reg_gpio_26_drv</name>
<lsb>2</lsb>
<msb>3</msb>
</field>
<field>
<name>reg_gpio_26_smt</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>reg_gpio_26_ie</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>GPIO_CFGCTL14</name>
<description>GPIO_CFGCTL14.</description>
<addressOffset>0x138</addressOffset>
<fields>
<field>
<name>reg_gpio_28_pd</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>reg_gpio_28_pu</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>reg_gpio_28_drv</name>
<lsb>2</lsb>
<msb>3</msb>
</field>
<field>
<name>reg_gpio_28_smt</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>reg_gpio_28_ie</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>GPIO_CFGCTL30</name>
<description>GPIO_CFGCTL30.</description>
<addressOffset>0x180</addressOffset>
<fields>
<field>
<name>reg_gpio_22_i</name>
<lsb>22</lsb>
<msb>22</msb>
</field>
<field>
<name>reg_gpio_21_i</name>
<lsb>21</lsb>
<msb>21</msb>
</field>
<field>
<name>reg_gpio_20_i</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>reg_gpio_19_i</name>
<lsb>19</lsb>
<msb>19</msb>
</field>
<field>
<name>reg_gpio_18_i</name>
<lsb>18</lsb>
<msb>18</msb>
</field>
<field>
<name>reg_gpio_17_i</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>reg_gpio_16_i</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>reg_gpio_15_i</name>
<lsb>15</lsb>
<msb>15</msb>
</field>
<field>
<name>reg_gpio_14_i</name>
<lsb>14</lsb>
<msb>14</msb>
</field>
<field>
<name>reg_gpio_13_i</name>
<lsb>13</lsb>
<msb>13</msb>
</field>
<field>
<name>reg_gpio_12_i</name>
<lsb>12</lsb>
<msb>12</msb>
</field>
<field>
<name>reg_gpio_11_i</name>
<lsb>11</lsb>
<msb>11</msb>
</field>
<field>
<name>reg_gpio_10_i</name>
<lsb>10</lsb>
<msb>10</msb>
</field>
<field>
<name>reg_gpio_9_i</name>
<lsb>9</lsb>
<msb>9</msb>
</field>
<field>
<name>reg_gpio_8_i</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>reg_gpio_7_i</name>
<lsb>7</lsb>
<msb>7</msb>
</field>
<field>
<name>reg_gpio_6_i</name>
<lsb>6</lsb>
<msb>6</msb>
</field>
<field>
<name>reg_gpio_5_i</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>reg_gpio_4_i</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>reg_gpio_3_i</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>reg_gpio_2_i</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>reg_gpio_1_i</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>reg_gpio_0_i</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>GPIO_CFGCTL31</name>
<description>GPIO_CFGCTL31.</description>
<addressOffset>0x184</addressOffset>
<fields/>
</register>
<register>
<name>GPIO_CFGCTL32</name>
<description>GPIO_CFGCTL32.</description>
<addressOffset>0x188</addressOffset>
<fields>
<field>
<name>reg_gpio_22_o</name>
<lsb>22</lsb>
<msb>22</msb>
</field>
<field>
<name>reg_gpio_21_o</name>
<lsb>21</lsb>
<msb>21</msb>
</field>
<field>
<name>reg_gpio_20_o</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>reg_gpio_19_o</name>
<lsb>19</lsb>
<msb>19</msb>
</field>
<field>
<name>reg_gpio_18_o</name>
<lsb>18</lsb>
<msb>18</msb>
</field>
<field>
<name>reg_gpio_17_o</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>reg_gpio_16_o</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>reg_gpio_15_o</name>
<lsb>15</lsb>
<msb>15</msb>
</field>
<field>
<name>reg_gpio_14_o</name>
<lsb>14</lsb>
<msb>14</msb>
</field>
<field>
<name>reg_gpio_13_o</name>
<lsb>13</lsb>
<msb>13</msb>
</field>
<field>
<name>reg_gpio_12_o</name>
<lsb>12</lsb>
<msb>12</msb>
</field>
<field>
<name>reg_gpio_11_o</name>
<lsb>11</lsb>
<msb>11</msb>
</field>
<field>
<name>reg_gpio_10_o</name>
<lsb>10</lsb>
<msb>10</msb>
</field>
<field>
<name>reg_gpio_9_o</name>
<lsb>9</lsb>
<msb>9</msb>
</field>
<field>
<name>reg_gpio_8_o</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>reg_gpio_7_o</name>
<lsb>7</lsb>
<msb>7</msb>
</field>
<field>
<name>reg_gpio_6_o</name>
<lsb>6</lsb>
<msb>6</msb>
</field>
<field>
<name>reg_gpio_5_o</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>reg_gpio_4_o</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>reg_gpio_3_o</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>reg_gpio_2_o</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>reg_gpio_1_o</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>reg_gpio_0_o</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>GPIO_CFGCTL33</name>
<description>GPIO_CFGCTL33.</description>
<addressOffset>0x18C</addressOffset>
<fields/>
</register>
<register>
<name>GPIO_CFGCTL34</name>
<description>GPIO_CFGCTL34.</description>
<addressOffset>0x190</addressOffset>
<fields>
<field>
<name>reg_gpio_22_oe</name>
<lsb>22</lsb>
<msb>22</msb>
</field>
<field>
<name>reg_gpio_21_oe</name>
<lsb>21</lsb>
<msb>21</msb>
</field>
<field>
<name>reg_gpio_20_oe</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>reg_gpio_19_oe</name>
<lsb>19</lsb>
<msb>19</msb>
</field>
<field>
<name>reg_gpio_18_oe</name>
<lsb>18</lsb>
<msb>18</msb>
</field>
<field>
<name>reg_gpio_17_oe</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>reg_gpio_16_oe</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>reg_gpio_15_oe</name>
<lsb>15</lsb>
<msb>15</msb>
</field>
<field>
<name>reg_gpio_14_oe</name>
<lsb>14</lsb>
<msb>14</msb>
</field>
<field>
<name>reg_gpio_13_oe</name>
<lsb>13</lsb>
<msb>13</msb>
</field>
<field>
<name>reg_gpio_12_oe</name>
<lsb>12</lsb>
<msb>12</msb>
</field>
<field>
<name>reg_gpio_11_oe</name>
<lsb>11</lsb>
<msb>11</msb>
</field>
<field>
<name>reg_gpio_10_oe</name>
<lsb>10</lsb>
<msb>10</msb>
</field>
<field>
<name>reg_gpio_9_oe</name>
<lsb>9</lsb>
<msb>9</msb>
</field>
<field>
<name>reg_gpio_8_oe</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>reg_gpio_7_oe</name>
<lsb>7</lsb>
<msb>7</msb>
</field>
<field>
<name>reg_gpio_6_oe</name>
<lsb>6</lsb>
<msb>6</msb>
</field>
<field>
<name>reg_gpio_5_oe</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>reg_gpio_4_oe</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>reg_gpio_3_oe</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>reg_gpio_2_oe</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>reg_gpio_1_oe</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>reg_gpio_0_oe</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>GPIO_CFGCTL35</name>
<description>GPIO_CFGCTL35.</description>
<addressOffset>0x194</addressOffset>
<fields/>
</register>
<register>
<name>GPIO_INT_MASK1</name>
<description>GPIO_INT_MASK1.</description>
<addressOffset>0x1A0</addressOffset>
<fields>
<field>
<name>reg_gpio_int_mask1</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>GPIO_INT_STAT1</name>
<description>GPIO_INT_STAT1.</description>
<addressOffset>0x1A8</addressOffset>
<fields>
<field>
<name>gpio_int_stat1</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>GPIO_INT_CLR1</name>
<description>GPIO_INT_CLR1.</description>
<addressOffset>0x1B0</addressOffset>
<fields>
<field>
<name>reg_gpio_int_clr1</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>GPIO_INT_MODE_SET1</name>
<description>GPIO_INT_MODE_SET1.</description>
<addressOffset>0x1C0</addressOffset>
<fields>
<field>
<name>reg_gpio_int_mode_set1</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>GPIO_INT_MODE_SET2</name>
<description>GPIO_INT_MODE_SET2.</description>
<addressOffset>0x1C4</addressOffset>
<fields>
<field>
<name>reg_gpio_int_mode_set2</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>GPIO_INT_MODE_SET3</name>
<description>GPIO_INT_MODE_SET3.</description>
<addressOffset>0x1C8</addressOffset>
<fields>
<field>
<name>reg_gpio_int_mode_set3</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>led_driver</name>
<description>led_driver.</description>
<addressOffset>0x224</addressOffset>
<fields>
<field>
<name>pu_leddrv</name>
<lsb>31</lsb>
<msb>31</msb>
</field>
<field>
<name>ir_rx_gpio_sel</name>
<lsb>8</lsb>
<msb>9</msb>
</field>
<field>
<name>leddrv_ibias</name>
<lsb>4</lsb>
<msb>7</msb>
</field>
<field>
<name>led_din_polarity_sel</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>led_din_sel</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>led_din_reg</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>gpdac_ctrl</name>
<description>gpdac_ctrl.</description>
<addressOffset>0x308</addressOffset>
<fields>
<field>
<name>gpdac_reserved</name>
<lsb>24</lsb>
<msb>31</msb>
</field>
<field>
<name>gpdac_test_sel</name>
<lsb>9</lsb>
<msb>11</msb>
</field>
<field>
<name>gpdac_ref_sel</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>gpdac_test_en</name>
<lsb>7</lsb>
<msb>7</msb>
</field>
<field>
<name>gpdacb_rstn_ana</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>gpdaca_rstn_ana</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>gpdac_actrl</name>
<description>gpdac_actrl.</description>
<addressOffset>0x30C</addressOffset>
<fields>
<field>
<name>gpdac_a_outmux</name>
<lsb>20</lsb>
<msb>22</msb>
</field>
<field>
<name>gpdac_a_rng</name>
<lsb>18</lsb>
<msb>19</msb>
</field>
<field>
<name>gpdac_ioa_en</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>gpdac_a_en</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>gpdac_bctrl</name>
<description>gpdac_bctrl.</description>
<addressOffset>0x310</addressOffset>
<fields>
<field>
<name>gpdac_b_outmux</name>
<lsb>20</lsb>
<msb>22</msb>
</field>
<field>
<name>gpdac_b_rng</name>
<lsb>18</lsb>
<msb>19</msb>
</field>
<field>
<name>gpdac_iob_en</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>gpdac_b_en</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>gpdac_data</name>
<description>gpdac_data.</description>
<addressOffset>0x314</addressOffset>
<fields>
<field>
<name>gpdac_a_data</name>
<lsb>16</lsb>
<msb>25</msb>
</field>
<field>
<name>gpdac_b_data</name>
<lsb>0</lsb>
<msb>9</msb>
</field>
</fields>
</register>
<register>
<name>tzc_glb_ctrl_0</name>
<description>tzc_glb_ctrl_0.</description>
<addressOffset>0xF00</addressOffset>
<fields>
<field>
<name>tzc_glb_clk_lock</name>
<lsb>31</lsb>
<msb>31</msb>
</field>
<field>
<name>tzc_glb_mbist_lock</name>
<lsb>30</lsb>
<msb>30</msb>
</field>
<field>
<name>tzc_glb_dbg_lock</name>
<lsb>29</lsb>
<msb>29</msb>
</field>
<field>
<name>tzc_glb_bmx_lock</name>
<lsb>28</lsb>
<msb>28</msb>
</field>
<field>
<name>tzc_glb_l2c_lock</name>
<lsb>27</lsb>
<msb>27</msb>
</field>
<field>
<name>tzc_glb_sram_lock</name>
<lsb>26</lsb>
<msb>26</msb>
</field>
<field>
<name>tzc_glb_misc_lock</name>
<lsb>25</lsb>
<msb>25</msb>
</field>
<field>
<name>tzc_glb_ctrl_ungated_ap_lock</name>
<lsb>15</lsb>
<msb>15</msb>
</field>
<field>
<name>tzc_glb_ctrl_sys_reset_lock</name>
<lsb>14</lsb>
<msb>14</msb>
</field>
<field>
<name>tzc_glb_ctrl_cpu_reset_lock</name>
<lsb>13</lsb>
<msb>13</msb>
</field>
<field>
<name>tzc_glb_ctrl_pwron_rst_lock</name>
<lsb>12</lsb>
<msb>12</msb>
</field>
<field>
<name>tzc_glb_swrst_s30_lock</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>tzc_glb_swrst_s01_lock</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>tzc_glb_swrst_s00_lock</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>tzc_glb_ctrl_1</name>
<description>tzc_glb_ctrl_1.</description>
<addressOffset>0xF04</addressOffset>
<fields>
<field>
<name>tzc_glb_swrst_s1f_lock</name>
<lsb>31</lsb>
<msb>31</msb>
</field>
<field>
<name>tzc_glb_swrst_s1e_lock</name>
<lsb>30</lsb>
<msb>30</msb>
</field>
<field>
<name>tzc_glb_swrst_s1d_lock</name>
<lsb>29</lsb>
<msb>29</msb>
</field>
<field>
<name>tzc_glb_swrst_s1c_lock</name>
<lsb>28</lsb>
<msb>28</msb>
</field>
<field>
<name>tzc_glb_swrst_s1b_lock</name>
<lsb>27</lsb>
<msb>27</msb>
</field>
<field>
<name>tzc_glb_swrst_s1a_lock</name>
<lsb>26</lsb>
<msb>26</msb>
</field>
<field>
<name>tzc_glb_swrst_s19_lock</name>
<lsb>25</lsb>
<msb>25</msb>
</field>
<field>
<name>tzc_glb_swrst_s18_lock</name>
<lsb>24</lsb>
<msb>24</msb>
</field>
<field>
<name>tzc_glb_swrst_s17_lock</name>
<lsb>23</lsb>
<msb>23</msb>
</field>
<field>
<name>tzc_glb_swrst_s16_lock</name>
<lsb>22</lsb>
<msb>22</msb>
</field>
<field>
<name>tzc_glb_swrst_s15_lock</name>
<lsb>21</lsb>
<msb>21</msb>
</field>
<field>
<name>tzc_glb_swrst_s14_lock</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>tzc_glb_swrst_s13_lock</name>
<lsb>19</lsb>
<msb>19</msb>
</field>
<field>
<name>tzc_glb_swrst_s12_lock</name>
<lsb>18</lsb>
<msb>18</msb>
</field>
<field>
<name>tzc_glb_swrst_s11_lock</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>tzc_glb_swrst_s10_lock</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>tzc_glb_swrst_s2f_lock</name>
<lsb>15</lsb>
<msb>15</msb>
</field>
<field>
<name>tzc_glb_swrst_s2e_lock</name>
<lsb>14</lsb>
<msb>14</msb>
</field>
<field>
<name>tzc_glb_swrst_s2d_lock</name>
<lsb>13</lsb>
<msb>13</msb>
</field>
<field>
<name>tzc_glb_swrst_s2c_lock</name>
<lsb>12</lsb>
<msb>12</msb>
</field>
<field>
<name>tzc_glb_swrst_s2b_lock</name>
<lsb>11</lsb>
<msb>11</msb>
</field>
<field>
<name>tzc_glb_swrst_s2a_lock</name>
<lsb>10</lsb>
<msb>10</msb>
</field>
<field>
<name>tzc_glb_swrst_s29_lock</name>
<lsb>9</lsb>
<msb>9</msb>
</field>
<field>
<name>tzc_glb_swrst_s28_lock</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>tzc_glb_swrst_s27_lock</name>
<lsb>7</lsb>
<msb>7</msb>
</field>
<field>
<name>tzc_glb_swrst_s26_lock</name>
<lsb>6</lsb>
<msb>6</msb>
</field>
<field>
<name>tzc_glb_swrst_s25_lock</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>tzc_glb_swrst_s24_lock</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>tzc_glb_swrst_s23_lock</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>tzc_glb_swrst_s22_lock</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>tzc_glb_swrst_s21_lock</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>tzc_glb_swrst_s20_lock</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>tzc_glb_ctrl_2</name>
<description>tzc_glb_ctrl_2.</description>
<addressOffset>0xF08</addressOffset>
<fields>
<field>
<name>tzc_glb_gpio_28_lock</name>
<lsb>28</lsb>
<msb>28</msb>
</field>
<field>
<name>tzc_glb_gpio_27_lock</name>
<lsb>27</lsb>
<msb>27</msb>
</field>
<field>
<name>tzc_glb_gpio_26_lock</name>
<lsb>26</lsb>
<msb>26</msb>
</field>
<field>
<name>tzc_glb_gpio_25_lock</name>
<lsb>25</lsb>
<msb>25</msb>
</field>
<field>
<name>tzc_glb_gpio_24_lock</name>
<lsb>24</lsb>
<msb>24</msb>
</field>
<field>
<name>tzc_glb_gpio_23_lock</name>
<lsb>23</lsb>
<msb>23</msb>
</field>
<field>
<name>tzc_glb_gpio_22_lock</name>
<lsb>22</lsb>
<msb>22</msb>
</field>
<field>
<name>tzc_glb_gpio_21_lock</name>
<lsb>21</lsb>
<msb>21</msb>
</field>
<field>
<name>tzc_glb_gpio_20_lock</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>tzc_glb_gpio_19_lock</name>
<lsb>19</lsb>
<msb>19</msb>
</field>
<field>
<name>tzc_glb_gpio_18_lock</name>
<lsb>18</lsb>
<msb>18</msb>
</field>
<field>
<name>tzc_glb_gpio_17_lock</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>tzc_glb_gpio_16_lock</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>tzc_glb_gpio_15_lock</name>
<lsb>15</lsb>
<msb>15</msb>
</field>
<field>
<name>tzc_glb_gpio_14_lock</name>
<lsb>14</lsb>
<msb>14</msb>
</field>
<field>
<name>tzc_glb_gpio_13_lock</name>
<lsb>13</lsb>
<msb>13</msb>
</field>
<field>
<name>tzc_glb_gpio_12_lock</name>
<lsb>12</lsb>
<msb>12</msb>
</field>
<field>
<name>tzc_glb_gpio_11_lock</name>
<lsb>11</lsb>
<msb>11</msb>
</field>
<field>
<name>tzc_glb_gpio_10_lock</name>
<lsb>10</lsb>
<msb>10</msb>
</field>
<field>
<name>tzc_glb_gpio_9_lock</name>
<lsb>9</lsb>
<msb>9</msb>
</field>
<field>
<name>tzc_glb_gpio_8_lock</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>tzc_glb_gpio_7_lock</name>
<lsb>7</lsb>
<msb>7</msb>
</field>
<field>
<name>tzc_glb_gpio_6_lock</name>
<lsb>6</lsb>
<msb>6</msb>
</field>
<field>
<name>tzc_glb_gpio_5_lock</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>tzc_glb_gpio_4_lock</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>tzc_glb_gpio_3_lock</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>tzc_glb_gpio_2_lock</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>tzc_glb_gpio_1_lock</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>tzc_glb_gpio_0_lock</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>tzc_glb_ctrl_3</name>
<description>tzc_glb_ctrl_3.</description>
<addressOffset>0xF0C</addressOffset>
<fields/>
</register>
</registers>
</peripheral>
<peripheral>
<name>rf</name>
<description>rf.</description>
<baseAddress>0x40001000</baseAddress>
<groupName>rf</groupName>
<size>32</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>rf_rev</name>
<description>Silicon revision</description>
<addressOffset>0x0</addressOffset>
<fields>
<field>
<name>hw_rev</name>
<lsb>16</lsb>
<msb>23</msb>
</field>
<field>
<name>fw_rev</name>
<lsb>8</lsb>
<msb>15</msb>
</field>
<field>
<name>rf_id</name>
<lsb>0</lsb>
<msb>7</msb>
</field>
</fields>
</register>
<register>
<name>rf_fsm_ctrl_hw</name>
<description>Digital Control</description>
<addressOffset>0x4</addressOffset>
<fields>
<field>
<name>rf_rc_state_value</name>
<lsb>28</lsb>
<msb>30</msb>
</field>
<field>
<name>rf_fsm_st_int_set</name>
<lsb>24</lsb>
<msb>24</msb>
</field>
<field>
<name>rf_fsm_st_int_clr</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>rf_fsm_st_int</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>rf_fsm_st_int_sel</name>
<lsb>12</lsb>
<msb>14</msb>
</field>
<field>
<name>rf_rc_state_dbg_en</name>
<lsb>11</lsb>
<msb>11</msb>
</field>
<field>
<name>rf_rc_state_dbg</name>
<lsb>8</lsb>
<msb>10</msb>
</field>
<field>
<name>rf_fsm_state</name>
<lsb>4</lsb>
<msb>6</msb>
</field>
<field>
<name>rf_fsm_t2r_cal_mode</name>
<lsb>2</lsb>
<msb>3</msb>
</field>
<field>
<name>rf_fsm_ctrl_en</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>rf_fsm_ctrl_sw</name>
<description>rfsm status reg</description>
<addressOffset>0x8</addressOffset>
<fields>
<field>
<name>lo_unlocked</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>inc_cal_timeout</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>full_cal_en</name>
<lsb>12</lsb>
<msb>12</msb>
</field>
<field>
<name>rf_fsm_sw_st_vld</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>rf_fsm_sw_st</name>
<lsb>0</lsb>
<msb>4</msb>
</field>
</fields>
</register>
<register>
<name>rfctrl_hw_en</name>
<description>Control logic switch</description>
<addressOffset>0xC</addressOffset>
<fields>
<field>
<name>adda_ctrl_hw</name>
<lsb>12</lsb>
<msb>12</msb>
</field>
<field>
<name>rbb_pkdet_out_rstn_ctrl_hw</name>
<lsb>11</lsb>
<msb>11</msb>
</field>
<field>
<name>rbb_pkdet_en_ctrl_hw</name>
<lsb>10</lsb>
<msb>10</msb>
</field>
<field>
<name>sdm_ctrl_hw</name>
<lsb>9</lsb>
<msb>9</msb>
</field>
<field>
<name>inc_fcal_ctrl_en_hw</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>inc_acal_ctrl_en_hw</name>
<lsb>7</lsb>
<msb>7</msb>
</field>
<field>
<name>lo_ctrl_hw</name>
<lsb>6</lsb>
<msb>6</msb>
</field>
<field>
<name>trxcal_ctrl_hw</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>rbb_bw_ctrl_hw</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>lna_ctrl_hw</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>tx_gain_ctrl_hw</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>rx_gain_ctrl_hw</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>pu_ctrl_hw</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>temp_comp</name>
<description>temp_comp.</description>
<addressOffset>0x10</addressOffset>
<fields>
<field>
<name>temp_comp_en</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>const_fcal</name>
<lsb>8</lsb>
<msb>15</msb>
</field>
<field>
<name>const_acal</name>
<lsb>0</lsb>
<msb>7</msb>
</field>
</fields>
</register>
<register>
<name>rfcal_status</name>
<description>rfcal_status.</description>
<addressOffset>0x14</addressOffset>
<fields>
<field>
<name>dpd_status</name>
<lsb>30</lsb>
<msb>31</msb>
</field>
<field>
<name>tenscal_status</name>
<lsb>28</lsb>
<msb>29</msb>
</field>
<field>
<name>pwdet_cal_status</name>
<lsb>26</lsb>
<msb>27</msb>
</field>
<field>
<name>riqcal_status_resv</name>
<lsb>24</lsb>
<msb>25</msb>
</field>
<field>
<name>tiqcal_status_resv</name>
<lsb>22</lsb>
<msb>23</msb>
</field>
<field>
<name>lo_leakcal_status</name>
<lsb>20</lsb>
<msb>21</msb>
</field>
<field>
<name>rccal_status</name>
<lsb>18</lsb>
<msb>19</msb>
</field>
<field>
<name>tos_status</name>
<lsb>16</lsb>
<msb>17</msb>
</field>
<field>
<name>ros_status</name>
<lsb>14</lsb>
<msb>15</msb>
</field>
<field>
<name>clkpll_cal_status</name>
<lsb>12</lsb>
<msb>13</msb>
</field>
<field>
<name>inc_acal_status</name>
<lsb>10</lsb>
<msb>11</msb>
</field>
<field>
<name>inc_fcal_status</name>
<lsb>8</lsb>
<msb>9</msb>
</field>
<field>
<name>acal_status</name>
<lsb>6</lsb>
<msb>7</msb>
</field>
<field>
<name>fcal_status</name>
<lsb>4</lsb>
<msb>5</msb>
</field>
<field>
<name>adc_oscal_status</name>
<lsb>2</lsb>
<msb>3</msb>
</field>
<field>
<name>rcal_status</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>rfcal_status2</name>
<description>rfcal_status2.</description>
<addressOffset>0x18</addressOffset>
<fields>
<field>
<name>dl_rfcal_table_status</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>rfcal_ctrlen</name>
<description>Calibration mode register</description>
<addressOffset>0x1C</addressOffset>
<fields>
<field>
<name>dpd_en</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>tsencal_en</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>pwdet_cal_en</name>
<lsb>15</lsb>
<msb>15</msb>
</field>
<field>
<name>riqcal_en</name>
<lsb>14</lsb>
<msb>14</msb>
</field>
<field>
<name>tiqcal_en</name>
<lsb>13</lsb>
<msb>13</msb>
</field>
<field>
<name>lo_leakcal_en</name>
<lsb>12</lsb>
<msb>12</msb>
</field>
<field>
<name>rccal_en</name>
<lsb>11</lsb>
<msb>11</msb>
</field>
<field>
<name>toscal_en</name>
<lsb>10</lsb>
<msb>10</msb>
</field>
<field>
<name>roscal_en</name>
<lsb>9</lsb>
<msb>9</msb>
</field>
<field>
<name>clkpll_cal_en</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>roscal_inc_en</name>
<lsb>7</lsb>
<msb>7</msb>
</field>
<field>
<name>acal_inc_en</name>
<lsb>6</lsb>
<msb>6</msb>
</field>
<field>
<name>fcal_inc_en</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>acal_en</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>fcal_en</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>dl_rfcal_table_en</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>adc_oscal_en</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>rcal_en_resv</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>rfcal_stateen</name>
<description>rf calibration state enabl in full cal list</description>
<addressOffset>0x20</addressOffset>
<fields>
<field>
<name>rfcal_level</name>
<lsb>30</lsb>
<msb>31</msb>
</field>
<field>
<name>dpd_sten</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>tsencal_sten</name>
<lsb>15</lsb>
<msb>15</msb>
</field>
<field>
<name>pwdet_cal_sten</name>
<lsb>14</lsb>
<msb>14</msb>
</field>
<field>
<name>riqcal_sten</name>
<lsb>13</lsb>
<msb>13</msb>
</field>
<field>
<name>tiqcal_sten</name>
<lsb>12</lsb>
<msb>12</msb>
</field>
<field>
<name>lo_leakcal_sten</name>
<lsb>11</lsb>
<msb>11</msb>
</field>
<field>
<name>rccal_sten</name>
<lsb>10</lsb>
<msb>10</msb>
</field>
<field>
<name>toscal_sten_resv</name>
<lsb>9</lsb>
<msb>9</msb>
</field>
<field>
<name>roscal_sten</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>clkpll_cal_sten</name>
<lsb>7</lsb>
<msb>7</msb>
</field>
<field>
<name>inc_acal_sten</name>
<lsb>6</lsb>
<msb>6</msb>
</field>
<field>
<name>inc_fcal_sten</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>acal_sten</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>fcal_sten</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>dl_rfcal_table_sten</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>adc_oscal_sten</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>rcal_sten_resv</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>saradc_resv</name>
<description>SARADC Control Registers</description>
<addressOffset>0x24</addressOffset>
<fields/>
</register>
<register>
<name>rf_base_ctrl1</name>
<description>ZRF Control register 0</description>
<addressOffset>0x28</addressOffset>
<fields>
<field>
<name>mbg_trim</name>
<lsb>27</lsb>
<msb>28</msb>
</field>
<field>
<name>pud_pa_dly</name>
<lsb>14</lsb>
<msb>15</msb>
</field>
<field>
<name>pud_iref_dly</name>
<lsb>12</lsb>
<msb>13</msb>
</field>
<field>
<name>pud_vco_dly</name>
<lsb>10</lsb>
<msb>11</msb>
</field>
<field>
<name>ppu_lead</name>
<lsb>8</lsb>
<msb>9</msb>
</field>
<field>
<name>lo_sdm_rst_dly</name>
<lsb>2</lsb>
<msb>3</msb>
</field>
<field>
<name>aupll_sdm_rst_dly</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>rf_base_ctrl2</name>
<description>ZRF Control register 0</description>
<addressOffset>0x2C</addressOffset>
<fields/>
</register>
<register>
<name>pucr1</name>
<description>pucr1.</description>
<addressOffset>0x30</addressOffset>
<fields>
<field>
<name>pu_tosdac</name>
<lsb>31</lsb>
<msb>31</msb>
</field>
<field>
<name>pu_pwrmx</name>
<lsb>30</lsb>
<msb>30</msb>
</field>
<field>
<name>pu_rosdac</name>
<lsb>29</lsb>
<msb>29</msb>
</field>
<field>
<name>pu_pkdet</name>
<lsb>28</lsb>
<msb>28</msb>
</field>
<field>
<name>trsw_en</name>
<lsb>26</lsb>
<msb>26</msb>
</field>
<field>
<name>pu_txbuf</name>
<lsb>25</lsb>
<msb>25</msb>
</field>
<field>
<name>pu_rxbuf</name>
<lsb>24</lsb>
<msb>24</msb>
</field>
<field>
<name>pu_osmx</name>
<lsb>23</lsb>
<msb>23</msb>
</field>
<field>
<name>pu_pfd</name>
<lsb>22</lsb>
<msb>22</msb>
</field>
<field>
<name>pu_fbdv</name>
<lsb>21</lsb>
<msb>21</msb>
</field>
<field>
<name>pu_vco</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>pu_dac</name>
<lsb>19</lsb>
<msb>19</msb>
</field>
<field>
<name>pu_tbb</name>
<lsb>18</lsb>
<msb>18</msb>
</field>
<field>
<name>pu_tmx</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>pu_pa</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>pu_op_atest</name>
<lsb>15</lsb>
<msb>15</msb>
</field>
<field>
<name>pu_adc</name>
<lsb>14</lsb>
<msb>14</msb>
</field>
<field>
<name>adc_clk_en</name>
<lsb>13</lsb>
<msb>13</msb>
</field>
<field>
<name>pu_adda_ldo</name>
<lsb>12</lsb>
<msb>12</msb>
</field>
<field>
<name>pu_rbb</name>
<lsb>11</lsb>
<msb>11</msb>
</field>
<field>
<name>pu_rmx</name>
<lsb>10</lsb>
<msb>10</msb>
</field>
<field>
<name>pu_rmxgm</name>
<lsb>9</lsb>
<msb>9</msb>
</field>
<field>
<name>pu_lna</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>pu_sfreg</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>pucr1_hw</name>
<description>read only from hardware logic</description>
<addressOffset>0x34</addressOffset>
<fields>
<field>
<name>pu_tosdac_hw</name>
<lsb>31</lsb>
<msb>31</msb>
</field>
<field>
<name>pu_rosdac_hw</name>
<lsb>29</lsb>
<msb>29</msb>
</field>
<field>
<name>pu_pkdet_hw</name>
<lsb>28</lsb>
<msb>28</msb>
</field>
<field>
<name>trsw_en_hw</name>
<lsb>26</lsb>
<msb>26</msb>
</field>
<field>
<name>pu_txbuf_hw</name>
<lsb>25</lsb>
<msb>25</msb>
</field>
<field>
<name>pu_rxbuf_hw</name>
<lsb>24</lsb>
<msb>24</msb>
</field>
<field>
<name>pu_osmx_hw</name>
<lsb>23</lsb>
<msb>23</msb>
</field>
<field>
<name>pu_pfd_hw</name>
<lsb>22</lsb>
<msb>22</msb>
</field>
<field>
<name>pu_fbdv_hw</name>
<lsb>21</lsb>
<msb>21</msb>
</field>
<field>
<name>pu_vco_hw</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>pu_dac_hw</name>
<lsb>19</lsb>
<msb>19</msb>
</field>
<field>
<name>pu_tbb_hw</name>
<lsb>18</lsb>
<msb>18</msb>
</field>
<field>
<name>pu_tmx_hw</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>pu_pa_hw</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>pu_adc_hw</name>
<lsb>14</lsb>
<msb>14</msb>
</field>
<field>
<name>adc_clk_en_hw</name>
<lsb>13</lsb>
<msb>13</msb>
</field>
<field>
<name>pu_adda_ldo_hw</name>
<lsb>12</lsb>
<msb>12</msb>
</field>
<field>
<name>pu_rbb_hw</name>
<lsb>11</lsb>
<msb>11</msb>
</field>
<field>
<name>pu_rmx_hw</name>
<lsb>10</lsb>
<msb>10</msb>
</field>
<field>
<name>pu_rmxgm_hw</name>
<lsb>9</lsb>
<msb>9</msb>
</field>
<field>
<name>pu_lna_hw</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>pu_sfreg_hw</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>pucr2</name>
<description>pucr2.</description>
<addressOffset>0x38</addressOffset>
<fields/>
</register>
<register>
<name>pucr2_hw</name>
<description>pucr2_hw.</description>
<addressOffset>0x3C</addressOffset>
<fields/>
</register>
<register>
<name>ppu_ctrl_hw</name>
<description>ppu_ctrl_hw.</description>
<addressOffset>0x40</addressOffset>
<fields>
<field>
<name>ppu_txbuf_hw</name>
<lsb>25</lsb>
<msb>25</msb>
</field>
<field>
<name>ppu_rxbuf_hw</name>
<lsb>24</lsb>
<msb>24</msb>
</field>
<field>
<name>ppu_osmx_hw</name>
<lsb>23</lsb>
<msb>23</msb>
</field>
<field>
<name>ppu_pfd_hw</name>
<lsb>22</lsb>
<msb>22</msb>
</field>
<field>
<name>ppu_fbdv_hw</name>
<lsb>21</lsb>
<msb>21</msb>
</field>
<field>
<name>ppu_vco_hw</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>ppu_rbb_hw</name>
<lsb>11</lsb>
<msb>11</msb>
</field>
<field>
<name>ppu_rmxgm_hw</name>
<lsb>9</lsb>
<msb>9</msb>
</field>
<field>
<name>ppu_lna_hw</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
</fields>
</register>
<register>
<name>pud_ctrl_hw</name>
<description>pud_ctrl_hw.</description>
<addressOffset>0x44</addressOffset>
<fields>
<field>
<name>pud_vco_hw</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
</fields>
</register>
<register>
<name>trx_gain1</name>
<description>gain control1</description>
<addressOffset>0x48</addressOffset>
<fields>
<field>
<name>gc_tbb_boost</name>
<lsb>28</lsb>
<msb>29</msb>
</field>
<field>
<name>gc_tbb</name>
<lsb>20</lsb>
<msb>24</msb>
</field>
<field>
<name>gc_tmx</name>
<lsb>16</lsb>
<msb>18</msb>
</field>
<field>
<name>gc_rbb2</name>
<lsb>12</lsb>
<msb>14</msb>
</field>
<field>
<name>gc_rbb1</name>
<lsb>8</lsb>
<msb>9</msb>
</field>
<field>
<name>gc_rmxgm</name>
<lsb>4</lsb>
<msb>5</msb>
</field>
<field>
<name>gc_lna</name>
<lsb>0</lsb>
<msb>2</msb>
</field>
</fields>
</register>
<register>
<name>trx_gain_hw</name>
<description>trx gain hardware readback</description>
<addressOffset>0x4C</addressOffset>
<fields>
<field>
<name>gc_tbb_boost_hw</name>
<lsb>28</lsb>
<msb>29</msb>
</field>
<field>
<name>gc_tbb_hw</name>
<lsb>20</lsb>
<msb>24</msb>
</field>
<field>
<name>gc_tmx_hw</name>
<lsb>16</lsb>
<msb>18</msb>
</field>
<field>
<name>gc_rbb2_hw</name>
<lsb>12</lsb>
<msb>14</msb>
</field>
<field>
<name>gc_rbb1_hw</name>
<lsb>8</lsb>
<msb>9</msb>
</field>
<field>
<name>gc_rmxgm_hw</name>
<lsb>4</lsb>
<msb>5</msb>
</field>
<field>
<name>gc_lna_hw</name>
<lsb>0</lsb>
<msb>2</msb>
</field>
</fields>
</register>
<register>
<name>ten_dc</name>
<description>dc test register</description>
<addressOffset>0x50</addressOffset>
<fields>
<field>
<name>ten_lodist</name>
<lsb>27</lsb>
<msb>27</msb>
</field>
<field>
<name>ten_lf</name>
<lsb>26</lsb>
<msb>26</msb>
</field>
<field>
<name>ten_pfdcp</name>
<lsb>25</lsb>
<msb>25</msb>
</field>
<field>
<name>ten_vco</name>
<lsb>24</lsb>
<msb>24</msb>
</field>
<field>
<name>ten_dac_q</name>
<lsb>22</lsb>
<msb>22</msb>
</field>
<field>
<name>ten_dac_i</name>
<lsb>21</lsb>
<msb>21</msb>
</field>
<field>
<name>ten_adc</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>ten_tbb</name>
<lsb>19</lsb>
<msb>19</msb>
</field>
<field>
<name>ten_atest</name>
<lsb>18</lsb>
<msb>18</msb>
</field>
<field>
<name>ten_bq</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>ten_tia</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>ten_tmx</name>
<lsb>15</lsb>
<msb>15</msb>
</field>
<field>
<name>ten_pa</name>
<lsb>14</lsb>
<msb>14</msb>
</field>
<field>
<name>ten_rrf_1</name>
<lsb>13</lsb>
<msb>13</msb>
</field>
<field>
<name>ten_rrf_0</name>
<lsb>12</lsb>
<msb>12</msb>
</field>
<field>
<name>ten_clkpll_sfreg</name>
<lsb>9</lsb>
<msb>9</msb>
</field>
<field>
<name>ten_clkpll</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>dc_tp_clkpll_en</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>dc_tp_en</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>tmux</name>
<lsb>0</lsb>
<msb>2</msb>
</field>
</fields>
</register>
<register>
<name>ten_dig</name>
<description>digital test register</description>
<addressOffset>0x54</addressOffset>
<fields>
<field>
<name>rf_dtest_en</name>
<lsb>23</lsb>
<msb>23</msb>
</field>
<field>
<name>dtest_pull_down</name>
<lsb>9</lsb>
<msb>9</msb>
</field>
<field>
<name>dten_lo_fref</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>dten_lo_fsdm</name>
<lsb>6</lsb>
<msb>6</msb>
</field>
<field>
<name>dten_clkpll_fin</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>dten_clkpll_fref</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>dten_clkpll_fsdm</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>dten_clkpll_clk32m</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>dten_clkpll_clk96m</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>dten_clkpll_postdiv_clk</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>ten_ac</name>
<description>ac test register</description>
<addressOffset>0x58</addressOffset>
<fields>
<field>
<name>atest_in_en_i</name>
<lsb>23</lsb>
<msb>23</msb>
</field>
<field>
<name>atest_in_en_q</name>
<lsb>22</lsb>
<msb>22</msb>
</field>
<field>
<name>atest_out_en_i</name>
<lsb>21</lsb>
<msb>21</msb>
</field>
<field>
<name>atest_out_en_q</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>atest_gain_r5</name>
<lsb>16</lsb>
<msb>18</msb>
</field>
<field>
<name>atest_gain_r6</name>
<lsb>14</lsb>
<msb>15</msb>
</field>
<field>
<name>atest_gain_r7</name>
<lsb>12</lsb>
<msb>13</msb>
</field>
<field>
<name>atest_gain_r8</name>
<lsb>10</lsb>
<msb>11</msb>
</field>
<field>
<name>atest_gain_r9</name>
<lsb>8</lsb>
<msb>9</msb>
</field>
<field>
<name>atest_in_en</name>
<lsb>6</lsb>
<msb>6</msb>
</field>
<field>
<name>atest_in_trx_sw</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>atest_dac_en</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>atest_op_cc</name>
<lsb>0</lsb>
<msb>3</msb>
</field>
</fields>
</register>
<register>
<name>pmip_mv2aon</name>
<description>pmip_mv2aon.</description>
<addressOffset>0x5C</addressOffset>
<fields/>
</register>
<register>
<name>cip</name>
<description>RX normal bias mode registers</description>
<addressOffset>0x60</addressOffset>
<fields>
<field>
<name>vg13_sel</name>
<lsb>2</lsb>
<msb>3</msb>
</field>
<field>
<name>vg11_sel</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>pa1</name>
<description>pa1.</description>
<addressOffset>0x64</addressOffset>
<fields>
<field>
<name>pa_att_gc</name>
<lsb>28</lsb>
<msb>31</msb>
</field>
<field>
<name>pa_pwrmx_bm</name>
<lsb>24</lsb>
<msb>26</msb>
</field>
<field>
<name>pa_pwrmx_dac_pn_switch</name>
<lsb>22</lsb>
<msb>22</msb>
</field>
<field>
<name>pa_pwrmx_osdac</name>
<lsb>18</lsb>
<msb>21</msb>
</field>
<field>
<name>pa_lz_bias_en</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>pa_ib_fix</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>pa_half_on</name>
<lsb>15</lsb>
<msb>15</msb>
</field>
<field>
<name>pa_vbcas</name>
<lsb>12</lsb>
<msb>14</msb>
</field>
<field>
<name>pa_vbcore</name>
<lsb>8</lsb>
<msb>11</msb>
</field>
<field>
<name>pa_iet</name>
<lsb>4</lsb>
<msb>7</msb>
</field>
<field>
<name>pa_etb_en</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>pa_iaq</name>
<lsb>0</lsb>
<msb>2</msb>
</field>
</fields>
</register>
<register>
<name>pa2</name>
<description>RX normal bias mode registers</description>
<addressOffset>0x68</addressOffset>
<fields>
<field>
<name>pa_ib_fix_hw</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>pa_half_on_hw</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>pa_vbcas_hw</name>
<lsb>12</lsb>
<msb>14</msb>
</field>
<field>
<name>pa_vbcore_hw</name>
<lsb>8</lsb>
<msb>11</msb>
</field>
<field>
<name>pa_iet_hw</name>
<lsb>4</lsb>
<msb>7</msb>
</field>
<field>
<name>pa_etb_en_hw</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
</fields>
</register>
<register>
<name>tmx</name>
<description>tmx.</description>
<addressOffset>0x6C</addressOffset>
<fields>
<field>
<name>tx_tsense_en</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>tmx_bm_cas_bulk</name>
<lsb>12</lsb>
<msb>14</msb>
</field>
<field>
<name>tmx_bm_cas</name>
<lsb>8</lsb>
<msb>10</msb>
</field>
<field>
<name>tmx_bm_sw</name>
<lsb>4</lsb>
<msb>6</msb>
</field>
<field>
<name>tmx_cs</name>
<lsb>0</lsb>
<msb>2</msb>
</field>
</fields>
</register>
<register>
<name>tbb</name>
<description>tbb.</description>
<addressOffset>0x70</addressOffset>
<fields>
<field>
<name>tbb_tosdac_i</name>
<lsb>24</lsb>
<msb>29</msb>
</field>
<field>
<name>tbb_tosdac_q</name>
<lsb>16</lsb>
<msb>21</msb>
</field>
<field>
<name>tbb_atest_out_en</name>
<lsb>15</lsb>
<msb>15</msb>
</field>
<field>
<name>tbb_iq_bias_short</name>
<lsb>14</lsb>
<msb>14</msb>
</field>
<field>
<name>tbb_cflt</name>
<lsb>12</lsb>
<msb>13</msb>
</field>
<field>
<name>tbb_vcm</name>
<lsb>8</lsb>
<msb>9</msb>
</field>
<field>
<name>tbb_bm_cg</name>
<lsb>4</lsb>
<msb>5</msb>
</field>
<field>
<name>tbb_bm_sf</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>lna</name>
<description>lna.</description>
<addressOffset>0x74</addressOffset>
<fields>
<field>
<name>lna_lg_gsel</name>
<lsb>24</lsb>
<msb>26</msb>
</field>
<field>
<name>lna_cap_lg</name>
<lsb>20</lsb>
<msb>21</msb>
</field>
<field>
<name>lna_rfb_match</name>
<lsb>16</lsb>
<msb>18</msb>
</field>
<field>
<name>lna_load_csw_hw</name>
<lsb>12</lsb>
<msb>15</msb>
</field>
<field>
<name>lna_load_csw</name>
<lsb>8</lsb>
<msb>11</msb>
</field>
<field>
<name>lna_bm_hw</name>
<lsb>4</lsb>
<msb>7</msb>
</field>
<field>
<name>lna_bm</name>
<lsb>0</lsb>
<msb>3</msb>
</field>
</fields>
</register>
<register>
<name>rmxgm</name>
<description>rmxgm.</description>
<addressOffset>0x78</addressOffset>
<fields>
<field>
<name>rmxgm_10m_mode_en</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>rmxgm_bm</name>
<lsb>4</lsb>
<msb>6</msb>
</field>
<field>
<name>rmx_bm</name>
<lsb>0</lsb>
<msb>2</msb>
</field>
</fields>
</register>
<register>
<name>rbb1</name>
<description>rbb1.</description>
<addressOffset>0x7C</addressOffset>
<fields>
<field>
<name>rosdac_range</name>
<lsb>31</lsb>
<msb>31</msb>
</field>
<field>
<name>rosdac_i_hw</name>
<lsb>24</lsb>
<msb>29</msb>
</field>
<field>
<name>rosdac_q_hw</name>
<lsb>16</lsb>
<msb>21</msb>
</field>
<field>
<name>rosdac_i</name>
<lsb>8</lsb>
<msb>13</msb>
</field>
<field>
<name>rosdac_q</name>
<lsb>0</lsb>
<msb>5</msb>
</field>
</fields>
</register>
<register>
<name>rbb2</name>
<description>rbb2.</description>
<addressOffset>0x80</addressOffset>
<fields>
<field>
<name>rbb_cap1_fc_i</name>
<lsb>24</lsb>
<msb>29</msb>
</field>
<field>
<name>rbb_cap1_fc_q</name>
<lsb>16</lsb>
<msb>21</msb>
</field>
<field>
<name>rbb_cap2_fc_i</name>
<lsb>8</lsb>
<msb>13</msb>
</field>
<field>
<name>rbb_cap2_fc_q</name>
<lsb>0</lsb>
<msb>5</msb>
</field>
</fields>
</register>
<register>
<name>rbb3</name>
<description>rbb3.</description>
<addressOffset>0x84</addressOffset>
<fields>
<field>
<name>pwr_det_en</name>
<lsb>31</lsb>
<msb>31</msb>
</field>
<field>
<name>rxiqcal_en</name>
<lsb>28</lsb>
<msb>28</msb>
</field>
<field>
<name>rbb_bw</name>
<lsb>24</lsb>
<msb>25</msb>
</field>
<field>
<name>rbb_tia_iqbias_short</name>
<lsb>21</lsb>
<msb>21</msb>
</field>
<field>
<name>rbb_bq_iqbias_short</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>rbb_vcm</name>
<lsb>16</lsb>
<msb>17</msb>
</field>
<field>
<name>rbb_bm_op</name>
<lsb>12</lsb>
<msb>14</msb>
</field>
<field>
<name>rbb_deq</name>
<lsb>8</lsb>
<msb>9</msb>
</field>
<field>
<name>rbb_bt_fif_tune</name>
<lsb>5</lsb>
<msb>6</msb>
</field>
<field>
<name>rbb_bt_mode</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>rbb_bt_mode_hw</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>rbb4</name>
<description>rbb4.</description>
<addressOffset>0x88</addressOffset>
<fields>
<field>
<name>pkdet_out_latch</name>
<lsb>24</lsb>
<msb>24</msb>
</field>
<field>
<name>pkdet_out_raw</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>rbb_pkdet_en_hw</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>rbb_pkdet_out_rstn_hw</name>
<lsb>12</lsb>
<msb>12</msb>
</field>
<field>
<name>rbb_pkdet_en</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>rbb_pkdet_out_rstn</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>rbb_pkdet_vth</name>
<lsb>0</lsb>
<msb>3</msb>
</field>
</fields>
</register>
<register>
<name>adda1</name>
<description>adda1.</description>
<addressOffset>0x8C</addressOffset>
<fields>
<field>
<name>adda_ldo_dvdd_sel_hw</name>
<lsb>24</lsb>
<msb>26</msb>
</field>
<field>
<name>adda_ldo_dvdd_sel</name>
<lsb>20</lsb>
<msb>22</msb>
</field>
<field>
<name>adda_ldo_byps</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>dac_clk_sync_inv</name>
<lsb>13</lsb>
<msb>13</msb>
</field>
<field>
<name>dac_rccalsel</name>
<lsb>12</lsb>
<msb>12</msb>
</field>
<field>
<name>dac_clk_sel</name>
<lsb>8</lsb>
<msb>9</msb>
</field>
<field>
<name>dac_bias_sel</name>
<lsb>4</lsb>
<msb>5</msb>
</field>
<field>
<name>dac_dvdd_sel</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>adda2</name>
<description>adda2.</description>
<addressOffset>0x90</addressOffset>
<fields>
<field>
<name>adc_clk_div_sel</name>
<lsb>28</lsb>
<msb>28</msb>
</field>
<field>
<name>adc_clk_inv</name>
<lsb>24</lsb>
<msb>24</msb>
</field>
<field>
<name>adc_clk_sync_inv</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>adc_gt_rm</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>adc_sar_ascal_en</name>
<lsb>12</lsb>
<msb>12</msb>
</field>
<field>
<name>adc_dvdd_sel</name>
<lsb>8</lsb>
<msb>9</msb>
</field>
<field>
<name>adc_dly_ctl</name>
<lsb>4</lsb>
<msb>5</msb>
</field>
<field>
<name>adc_vref_sel</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>vco1</name>
<description>vco1.</description>
<addressOffset>0xA0</addressOffset>
<fields>
<field>
<name>lo_vco_idac_cw_hw</name>
<lsb>24</lsb>
<msb>28</msb>
</field>
<field>
<name>lo_vco_idac_cw</name>
<lsb>16</lsb>
<msb>20</msb>
</field>
<field>
<name>lo_vco_freq_cw_hw</name>
<lsb>8</lsb>
<msb>15</msb>
</field>
<field>
<name>lo_vco_freq_cw</name>
<lsb>0</lsb>
<msb>7</msb>
</field>
</fields>
</register>
<register>
<name>vco2</name>
<description>vco2.</description>
<addressOffset>0xA4</addressOffset>
<fields>
<field>
<name>acal_inc_en_hw</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>acal_vco_ud</name>
<lsb>12</lsb>
<msb>12</msb>
</field>
<field>
<name>acal_vref_cw</name>
<lsb>8</lsb>
<msb>10</msb>
</field>
<field>
<name>lo_vco_short_idac_filter</name>
<lsb>6</lsb>
<msb>6</msb>
</field>
<field>
<name>lo_vco_short_vbias_filter</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>lo_vco_idac_boot</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>lo_vco_vbias_cw</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>vco3</name>
<description>vco3.</description>
<addressOffset>0xA8</addressOffset>
<fields>
<field>
<name>fcal_cnt_op</name>
<lsb>16</lsb>
<msb>31</msb>
</field>
<field>
<name>fcal_div</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>vco4</name>
<description>vco4.</description>
<addressOffset>0xAC</addressOffset>
<fields>
<field>
<name>fcal_inc_vctrl_ud</name>
<lsb>24</lsb>
<msb>25</msb>
</field>
<field>
<name>fcal_cnt_rdy</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>fcal_inc_large_range</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>fcal_inc_en_hw</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>fcal_cnt_start</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
</fields>
</register>
<register>
<name>pfdcp</name>
<description>pfdcp.</description>
<addressOffset>0xB0</addressOffset>
<fields>
<field>
<name>lo_pfd_rst_csd_hw</name>
<lsb>29</lsb>
<msb>29</msb>
</field>
<field>
<name>lo_pfd_rst_csd</name>
<lsb>28</lsb>
<msb>28</msb>
</field>
<field>
<name>lo_pfd_rvdd_boost</name>
<lsb>24</lsb>
<msb>24</msb>
</field>
<field>
<name>lo_cp_hiz</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>lo_cp_opamp_en</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>lo_cp_ota_en</name>
<lsb>12</lsb>
<msb>12</msb>
</field>
<field>
<name>lo_cp_startup_en</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>lo_cp_sel_hw</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>lo_cp_sel</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>lo</name>
<description>lo.</description>
<addressOffset>0xB4</addressOffset>
<fields>
<field>
<name>lo_slipped_up</name>
<lsb>24</lsb>
<msb>24</msb>
</field>
<field>
<name>lo_slipped_dn</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>lo_lf_r4_short</name>
<lsb>18</lsb>
<msb>18</msb>
</field>
<field>
<name>lo_lf_r4</name>
<lsb>16</lsb>
<msb>17</msb>
</field>
<field>
<name>lo_lf_cz</name>
<lsb>14</lsb>
<msb>15</msb>
</field>
<field>
<name>lo_lf_rz</name>
<lsb>12</lsb>
<msb>13</msb>
</field>
<field>
<name>lo_lf_cz_hw</name>
<lsb>8</lsb>
<msb>9</msb>
</field>
<field>
<name>lo_lf_r4_hw</name>
<lsb>4</lsb>
<msb>5</msb>
</field>
<field>
<name>lo_lf_rz_hw</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>fbdv</name>
<description>fbdv.</description>
<addressOffset>0xB8</addressOffset>
<fields>
<field>
<name>lo_fbdv_rst_hw</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>lo_fbdv_rst</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>lo_fbdv_sel_fb_clk</name>
<lsb>12</lsb>
<msb>13</msb>
</field>
<field>
<name>lo_fbdv_sel_sample_clk</name>
<lsb>8</lsb>
<msb>9</msb>
</field>
<field>
<name>lo_fbdv_halfstep_en</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>lo_fbdv_halfstep_en_hw</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>lodist</name>
<description>lodist.</description>
<addressOffset>0xBC</addressOffset>
<fields>
<field>
<name>lo_lodist_rxbuf_stre</name>
<lsb>28</lsb>
<msb>28</msb>
</field>
<field>
<name>lo_lodist_txbuf_stre</name>
<lsb>24</lsb>
<msb>24</msb>
</field>
<field>
<name>lo_osmx_cap</name>
<lsb>20</lsb>
<msb>23</msb>
</field>
<field>
<name>lo_osmx_capbank_bias</name>
<lsb>16</lsb>
<msb>17</msb>
</field>
<field>
<name>lo_osmx_vbuf_stre</name>
<lsb>12</lsb>
<msb>12</msb>
</field>
<field>
<name>lo_osmx_fix_cap</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>lo_osmx_en_xgm</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>lo_osmx_xgm_boost</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>sdm1</name>
<description>sdm1.</description>
<addressOffset>0xC0</addressOffset>
<fields>
<field>
<name>lo_sdm_flag</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>lo_sdm_rstb_hw</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>lo_sdm_rstb</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>lo_sdm_bypass</name>
<lsb>12</lsb>
<msb>12</msb>
</field>
<field>
<name>lo_sdm_dither_sel</name>
<lsb>8</lsb>
<msb>9</msb>
</field>
<field>
<name>lo_sdm_bypass_hw</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>lo_sdm_dither_sel_hw</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>sdm2</name>
<description>sdm2.</description>
<addressOffset>0xC4</addressOffset>
<fields>
<field>
<name>lo_sdmin</name>
<lsb>0</lsb>
<msb>29</msb>
</field>
</fields>
</register>
<register>
<name>sdm3</name>
<description>sdm3.</description>
<addressOffset>0xC8</addressOffset>
<fields>
<field>
<name>lo_sdmin_hw</name>
<lsb>0</lsb>
<msb>29</msb>
</field>
</fields>
</register>
<register>
<name>rf_resv_reg_0</name>
<description>rf_resv_reg_0.</description>
<addressOffset>0xEC</addressOffset>
<fields>
<field>
<name>rf_reserved0</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>rf_resv_reg_1</name>
<description>rf_resv_reg_1.</description>
<addressOffset>0xF0</addressOffset>
<fields>
<field>
<name>rf_reserved1</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>rf_resv_reg_2</name>
<description>rf_resv_reg_2.</description>
<addressOffset>0xF4</addressOffset>
<fields>
<field>
<name>rf_reserved2</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>rrf_gain_index1</name>
<description>rrf_gain_index1.</description>
<addressOffset>0xF8</addressOffset>
<fields>
<field>
<name>gain_ctrl5_gc_lna</name>
<lsb>27</lsb>
<msb>29</msb>
</field>
<field>
<name>gain_ctrl5_gc_rmxgm</name>
<lsb>25</lsb>
<msb>26</msb>
</field>
<field>
<name>gain_ctrl4_gc_lna</name>
<lsb>22</lsb>
<msb>24</msb>
</field>
<field>
<name>gain_ctrl4_gc_rmxgm</name>
<lsb>20</lsb>
<msb>21</msb>
</field>
<field>
<name>gain_ctrl3_gc_lna</name>
<lsb>17</lsb>
<msb>19</msb>
</field>
<field>
<name>gain_ctrl3_gc_rmxgm</name>
<lsb>15</lsb>
<msb>16</msb>
</field>
<field>
<name>gain_ctrl2_gc_lna</name>
<lsb>12</lsb>
<msb>14</msb>
</field>
<field>
<name>gain_ctrl2_gc_rmxgm</name>
<lsb>10</lsb>
<msb>11</msb>
</field>
<field>
<name>gain_ctrl1_gc_lna</name>
<lsb>7</lsb>
<msb>9</msb>
</field>
<field>
<name>gain_ctrl1_gc_rmxgm</name>
<lsb>5</lsb>
<msb>6</msb>
</field>
<field>
<name>gain_ctrl0_gc_lna</name>
<lsb>2</lsb>
<msb>4</msb>
</field>
<field>
<name>gain_ctrl0_gc_rmxgm</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>rrf_gain_index2</name>
<description>rrf_gain_index2.</description>
<addressOffset>0xFC</addressOffset>
<fields>
<field>
<name>gain_ctrl6_gc_lna</name>
<lsb>12</lsb>
<msb>14</msb>
</field>
<field>
<name>gain_ctrl6_gc_rmxgm</name>
<lsb>10</lsb>
<msb>11</msb>
</field>
<field>
<name>gain_ctrl7_gc_lna</name>
<lsb>7</lsb>
<msb>9</msb>
</field>
<field>
<name>gain_ctrl7_gc_rmxgm</name>
<lsb>5</lsb>
<msb>6</msb>
</field>
<field>
<name>gain_ctrl8_gc_lna</name>
<lsb>2</lsb>
<msb>4</msb>
</field>
<field>
<name>gain_ctrl8_gc_rmxgm</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>lna_ctrl_hw_mux</name>
<description>lna_ctrl_hw_mux.</description>
<addressOffset>0x100</addressOffset>
<fields>
<field>
<name>lna_load_csw_lg</name>
<lsb>12</lsb>
<msb>15</msb>
</field>
<field>
<name>lna_load_csw_hg</name>
<lsb>8</lsb>
<msb>11</msb>
</field>
<field>
<name>lna_bm_lg</name>
<lsb>4</lsb>
<msb>7</msb>
</field>
<field>
<name>lna_bm_hg</name>
<lsb>0</lsb>
<msb>3</msb>
</field>
</fields>
</register>
<register>
<name>rbb_gain_index1</name>
<description>rbb_gain_index1.</description>
<addressOffset>0x104</addressOffset>
<fields>
<field>
<name>gain_ctrl3_gc_rbb2</name>
<lsb>28</lsb>
<msb>30</msb>
</field>
<field>
<name>gain_ctrl3_gc_rbb1</name>
<lsb>24</lsb>
<msb>25</msb>
</field>
<field>
<name>gain_ctrl2_gc_rbb2</name>
<lsb>20</lsb>
<msb>22</msb>
</field>
<field>
<name>gain_ctrl2_gc_rbb1</name>
<lsb>16</lsb>
<msb>17</msb>
</field>
<field>
<name>gain_ctrl1_gc_rbb2</name>
<lsb>12</lsb>
<msb>14</msb>
</field>
<field>
<name>gain_ctrl1_gc_rbb1</name>
<lsb>8</lsb>
<msb>9</msb>
</field>
<field>
<name>gain_ctrl0_gc_rbb2</name>
<lsb>4</lsb>
<msb>6</msb>
</field>
<field>
<name>gain_ctrl0_gc_rbb1</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>rbb_gain_index2</name>
<description>rbb_gain_index2.</description>
<addressOffset>0x108</addressOffset>
<fields>
<field>
<name>gain_ctrl7_gc_rbb2</name>
<lsb>28</lsb>
<msb>30</msb>
</field>
<field>
<name>gain_ctrl7_gc_rbb1</name>
<lsb>24</lsb>
<msb>25</msb>
</field>
<field>
<name>gain_ctrl6_gc_rbb2</name>
<lsb>20</lsb>
<msb>22</msb>
</field>
<field>
<name>gain_ctrl6_gc_rbb1</name>
<lsb>16</lsb>
<msb>17</msb>
</field>
<field>
<name>gain_ctrl5_gc_rbb2</name>
<lsb>12</lsb>
<msb>14</msb>
</field>
<field>
<name>gain_ctrl5_gc_rbb1</name>
<lsb>8</lsb>
<msb>9</msb>
</field>
<field>
<name>gain_ctrl4_gc_rbb2</name>
<lsb>4</lsb>
<msb>6</msb>
</field>
<field>
<name>gain_ctrl4_gc_rbb1</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>rbb_gain_index3</name>
<description>rbb_gain_index3.</description>
<addressOffset>0x10C</addressOffset>
<fields>
<field>
<name>gain_ctrl11_gc_rbb2</name>
<lsb>28</lsb>
<msb>30</msb>
</field>
<field>
<name>gain_ctrl11_gc_rbb1</name>
<lsb>24</lsb>
<msb>25</msb>
</field>
<field>
<name>gain_ctrl10_gc_rbb2</name>
<lsb>20</lsb>
<msb>22</msb>
</field>
<field>
<name>gain_ctrl10_gc_rbb1</name>
<lsb>16</lsb>
<msb>17</msb>
</field>
<field>
<name>gain_ctrl9_gc_rbb2</name>
<lsb>12</lsb>
<msb>14</msb>
</field>
<field>
<name>gain_ctrl9_gc_rbb1</name>
<lsb>8</lsb>
<msb>9</msb>
</field>
<field>
<name>gain_ctrl8_gc_rbb2</name>
<lsb>4</lsb>
<msb>6</msb>
</field>
<field>
<name>gain_ctrl8_gc_rbb1</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>rbb_gain_index4</name>
<description>rbb_gain_index4.</description>
<addressOffset>0x110</addressOffset>
<fields>
<field>
<name>gain_ctrl15_gc_rbb2</name>
<lsb>28</lsb>
<msb>30</msb>
</field>
<field>
<name>gain_ctrl15_gc_rbb1</name>
<lsb>24</lsb>
<msb>25</msb>
</field>
<field>
<name>gain_ctrl14_gc_rbb2</name>
<lsb>20</lsb>
<msb>22</msb>
</field>
<field>
<name>gain_ctrl14_gc_rbb1</name>
<lsb>16</lsb>
<msb>17</msb>
</field>
<field>
<name>gain_ctrl13_gc_rbb2</name>
<lsb>12</lsb>
<msb>14</msb>
</field>
<field>
<name>gain_ctrl13_gc_rbb1</name>
<lsb>8</lsb>
<msb>9</msb>
</field>
<field>
<name>gain_ctrl12_gc_rbb2</name>
<lsb>4</lsb>
<msb>6</msb>
</field>
<field>
<name>gain_ctrl12_gc_rbb1</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>rbb_gain_index5</name>
<description>rbb_gain_index5.</description>
<addressOffset>0x114</addressOffset>
<fields>
<field>
<name>gain_ctrl16_gc_rbb2</name>
<lsb>4</lsb>
<msb>6</msb>
</field>
<field>
<name>gain_ctrl16_gc_rbb1</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>tbb_gain_index1</name>
<description>tbb_gain_index1.</description>
<addressOffset>0x118</addressOffset>
<fields>
<field>
<name>gain_ctrl1_gc_tbb_boost</name>
<lsb>30</lsb>
<msb>31</msb>
</field>
<field>
<name>gain_ctrl1_dac_bias_sel</name>
<lsb>28</lsb>
<msb>29</msb>
</field>
<field>
<name>gain_ctrl1_gc_tmx</name>
<lsb>24</lsb>
<msb>26</msb>
</field>
<field>
<name>gain_ctrl1_gc_tbb</name>
<lsb>16</lsb>
<msb>20</msb>
</field>
<field>
<name>gain_ctrl0_gc_tbb_boost</name>
<lsb>14</lsb>
<msb>15</msb>
</field>
<field>
<name>gain_ctrl0_dac_bias_sel</name>
<lsb>12</lsb>
<msb>13</msb>
</field>
<field>
<name>gain_ctrl0_gc_tmx</name>
<lsb>8</lsb>
<msb>10</msb>
</field>
<field>
<name>gain_ctrl0_gc_tbb</name>
<lsb>0</lsb>
<msb>4</msb>
</field>
</fields>
</register>
<register>
<name>tbb_gain_index2</name>
<description>tbb_gain_index2.</description>
<addressOffset>0x11C</addressOffset>
<fields>
<field>
<name>gain_ctrl3_gc_tbb_boost</name>
<lsb>30</lsb>
<msb>31</msb>
</field>
<field>
<name>gain_ctrl3_dac_bias_sel</name>
<lsb>28</lsb>
<msb>29</msb>
</field>
<field>
<name>gain_ctrl3_gc_tmx</name>
<lsb>24</lsb>
<msb>26</msb>
</field>
<field>
<name>gain_ctrl3_gc_tbb</name>
<lsb>16</lsb>
<msb>20</msb>
</field>
<field>
<name>gain_ctrl2_gc_tbb_boost</name>
<lsb>14</lsb>
<msb>15</msb>
</field>
<field>
<name>gain_ctrl2_dac_bias_sel</name>
<lsb>12</lsb>
<msb>13</msb>
</field>
<field>
<name>gain_ctrl2_gc_tmx</name>
<lsb>8</lsb>
<msb>10</msb>
</field>
<field>
<name>gain_ctrl2_gc_tbb</name>
<lsb>0</lsb>
<msb>4</msb>
</field>
</fields>
</register>
<register>
<name>tbb_gain_index3</name>
<description>tbb_gain_index3.</description>
<addressOffset>0x120</addressOffset>
<fields>
<field>
<name>gain_ctrl5_gc_tbb_boost</name>
<lsb>30</lsb>
<msb>31</msb>
</field>
<field>
<name>gain_ctrl5_dac_bias_sel</name>
<lsb>28</lsb>
<msb>29</msb>
</field>
<field>
<name>gain_ctrl5_gc_tmx</name>
<lsb>24</lsb>
<msb>26</msb>
</field>
<field>
<name>gain_ctrl5_gc_tbb</name>
<lsb>16</lsb>
<msb>20</msb>
</field>
<field>
<name>gain_ctrl4_gc_tbb_boost</name>
<lsb>14</lsb>
<msb>15</msb>
</field>
<field>
<name>gain_ctrl4_dac_bias_sel</name>
<lsb>12</lsb>
<msb>13</msb>
</field>
<field>
<name>gain_ctrl4_gc_tmx</name>
<lsb>8</lsb>
<msb>10</msb>
</field>
<field>
<name>gain_ctrl4_gc_tbb</name>
<lsb>0</lsb>
<msb>4</msb>
</field>
</fields>
</register>
<register>
<name>tbb_gain_index4</name>
<description>tbb_gain_index4.</description>
<addressOffset>0x124</addressOffset>
<fields>
<field>
<name>gain_ctrl7_gc_tbb_boost</name>
<lsb>30</lsb>
<msb>31</msb>
</field>
<field>
<name>gain_ctrl7_dac_bias_sel</name>
<lsb>28</lsb>
<msb>29</msb>
</field>
<field>
<name>gain_ctrl7_gc_tmx</name>
<lsb>24</lsb>
<msb>26</msb>
</field>
<field>
<name>gain_ctrl7_gc_tbb</name>
<lsb>16</lsb>
<msb>20</msb>
</field>
<field>
<name>gain_ctrl6_gc_tbb_boost</name>
<lsb>14</lsb>
<msb>15</msb>
</field>
<field>
<name>gain_ctrl6_dac_bias_sel</name>
<lsb>12</lsb>
<msb>13</msb>
</field>
<field>
<name>gain_ctrl6_gc_tmx</name>
<lsb>8</lsb>
<msb>10</msb>
</field>
<field>
<name>gain_ctrl6_gc_tbb</name>
<lsb>0</lsb>
<msb>4</msb>
</field>
</fields>
</register>
<register>
<name>pa_reg_ctrl_hw1</name>
<description>pa_reg_ctrl_hw1.</description>
<addressOffset>0x128</addressOffset>
<fields>
<field>
<name>pa_vbcas_11n</name>
<lsb>20</lsb>
<msb>22</msb>
</field>
<field>
<name>pa_vbcore_11n</name>
<lsb>16</lsb>
<msb>19</msb>
</field>
<field>
<name>pa_iet_11n</name>
<lsb>12</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>pa_reg_ctrl_hw2</name>
<description>pa_reg_ctrl_hw2.</description>
<addressOffset>0x12C</addressOffset>
<fields>
<field>
<name>pa_vbcas_11b</name>
<lsb>20</lsb>
<msb>22</msb>
</field>
<field>
<name>pa_vbcore_11b</name>
<lsb>16</lsb>
<msb>19</msb>
</field>
<field>
<name>pa_iet_11b</name>
<lsb>12</lsb>
<msb>15</msb>
</field>
<field>
<name>pa_vbcas_11g</name>
<lsb>8</lsb>
<msb>10</msb>
</field>
<field>
<name>pa_vbcore_11g</name>
<lsb>4</lsb>
<msb>7</msb>
</field>
<field>
<name>pa_iet_11g</name>
<lsb>0</lsb>
<msb>3</msb>
</field>
</fields>
</register>
<register>
<name>pa_reg_wifi_ctrl_hw</name>
<description>pa_reg_wifi_ctrl_hw.</description>
<addressOffset>0x130</addressOffset>
<fields>
<field>
<name>pa_ib_fix_wifi</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>pa_etb_en_wifi</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>pa_half_on_wifi</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>adda_reg_ctrl_hw</name>
<description>adda_reg_ctrl_hw.</description>
<addressOffset>0x134</addressOffset>
<fields>
<field>
<name>adda_ldo_dvdd_sel_tx</name>
<lsb>4</lsb>
<msb>6</msb>
</field>
<field>
<name>adda_ldo_dvdd_sel_rx</name>
<lsb>0</lsb>
<msb>2</msb>
</field>
</fields>
</register>
<register>
<name>lo_reg_ctrl_hw1</name>
<description>lo_reg_ctrl_hw1.</description>
<addressOffset>0x138</addressOffset>
<fields>
<field>
<name>lo_lf_r4_tx</name>
<lsb>24</lsb>
<msb>25</msb>
</field>
<field>
<name>lo_lf_r4_rx</name>
<lsb>20</lsb>
<msb>21</msb>
</field>
<field>
<name>lo_lf_rz_tx</name>
<lsb>16</lsb>
<msb>17</msb>
</field>
<field>
<name>lo_lf_rz_rx</name>
<lsb>12</lsb>
<msb>13</msb>
</field>
<field>
<name>lo_lf_cz_tx</name>
<lsb>8</lsb>
<msb>9</msb>
</field>
<field>
<name>lo_lf_cz_rx</name>
<lsb>4</lsb>
<msb>5</msb>
</field>
<field>
<name>lo_cp_sel_tx</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>lo_cp_sel_rx</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>lo_fbdv_halfstep_en_tx</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>lo_fbdv_halfstep_en_rx</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>lo_cal_ctrl_hw1</name>
<description>lo_cal_ctrl_hw1.</description>
<addressOffset>0x13C</addressOffset>
<fields>
<field>
<name>lo_vco_freq_cw_2408</name>
<lsb>24</lsb>
<msb>31</msb>
</field>
<field>
<name>lo_vco_idac_cw_2408</name>
<lsb>16</lsb>
<msb>20</msb>
</field>
<field>
<name>lo_vco_freq_cw_2404</name>
<lsb>8</lsb>
<msb>15</msb>
</field>
<field>
<name>lo_vco_idac_cw_2404</name>
<lsb>0</lsb>
<msb>4</msb>
</field>
</fields>
</register>
<register>
<name>lo_cal_ctrl_hw2</name>
<description>lo_cal_ctrl_hw2.</description>
<addressOffset>0x140</addressOffset>
<fields>
<field>
<name>lo_vco_freq_cw_2416</name>
<lsb>24</lsb>
<msb>31</msb>
</field>
<field>
<name>lo_vco_idac_cw_2416</name>
<lsb>16</lsb>
<msb>20</msb>
</field>
<field>
<name>lo_vco_freq_cw_2412</name>
<lsb>8</lsb>
<msb>15</msb>
</field>
<field>
<name>lo_vco_idac_cw_2412</name>
<lsb>0</lsb>
<msb>4</msb>
</field>
</fields>
</register>
<register>
<name>lo_cal_ctrl_hw3</name>
<description>lo_cal_ctrl_hw3.</description>
<addressOffset>0x144</addressOffset>
<fields>
<field>
<name>lo_vco_freq_cw_2424</name>
<lsb>24</lsb>
<msb>31</msb>
</field>
<field>
<name>lo_vco_idac_cw_2424</name>
<lsb>16</lsb>
<msb>20</msb>
</field>
<field>
<name>lo_vco_freq_cw_2420</name>
<lsb>8</lsb>
<msb>15</msb>
</field>
<field>
<name>lo_vco_idac_cw_2420</name>
<lsb>0</lsb>
<msb>4</msb>
</field>
</fields>
</register>
<register>
<name>lo_cal_ctrl_hw4</name>
<description>lo_cal_ctrl_hw4.</description>
<addressOffset>0x148</addressOffset>
<fields>
<field>
<name>lo_vco_freq_cw_2432</name>
<lsb>24</lsb>
<msb>31</msb>
</field>
<field>
<name>lo_vco_idac_cw_2432</name>
<lsb>16</lsb>
<msb>20</msb>
</field>
<field>
<name>lo_vco_freq_cw_2428</name>
<lsb>8</lsb>
<msb>15</msb>
</field>
<field>
<name>lo_vco_idac_cw_2428</name>
<lsb>0</lsb>
<msb>4</msb>
</field>
</fields>
</register>
<register>
<name>lo_cal_ctrl_hw5</name>
<description>lo_cal_ctrl_hw5.</description>
<addressOffset>0x14C</addressOffset>
<fields>
<field>
<name>lo_vco_freq_cw_2440</name>
<lsb>24</lsb>
<msb>31</msb>
</field>
<field>
<name>lo_vco_idac_cw_2440</name>
<lsb>16</lsb>
<msb>20</msb>
</field>
<field>
<name>lo_vco_freq_cw_2436</name>
<lsb>8</lsb>
<msb>15</msb>
</field>
<field>
<name>lo_vco_idac_cw_2436</name>
<lsb>0</lsb>
<msb>4</msb>
</field>
</fields>
</register>
<register>
<name>lo_cal_ctrl_hw6</name>
<description>lo_cal_ctrl_hw6.</description>
<addressOffset>0x150</addressOffset>
<fields>
<field>
<name>lo_vco_freq_cw_2448</name>
<lsb>24</lsb>
<msb>31</msb>
</field>
<field>
<name>lo_vco_idac_cw_2448</name>
<lsb>16</lsb>
<msb>20</msb>
</field>
<field>
<name>lo_vco_freq_cw_2444</name>
<lsb>8</lsb>
<msb>15</msb>
</field>
<field>
<name>lo_vco_idac_cw_2444</name>
<lsb>0</lsb>
<msb>4</msb>
</field>
</fields>
</register>
<register>
<name>lo_cal_ctrl_hw7</name>
<description>lo_cal_ctrl_hw7.</description>
<addressOffset>0x154</addressOffset>
<fields>
<field>
<name>lo_vco_freq_cw_2456</name>
<lsb>24</lsb>
<msb>31</msb>
</field>
<field>
<name>lo_vco_idac_cw_2456</name>
<lsb>16</lsb>
<msb>20</msb>
</field>
<field>
<name>lo_vco_freq_cw_2452</name>
<lsb>8</lsb>
<msb>15</msb>
</field>
<field>
<name>lo_vco_idac_cw_2452</name>
<lsb>0</lsb>
<msb>4</msb>
</field>
</fields>
</register>
<register>
<name>lo_cal_ctrl_hw8</name>
<description>lo_cal_ctrl_hw8.</description>
<addressOffset>0x158</addressOffset>
<fields>
<field>
<name>lo_vco_freq_cw_2464</name>
<lsb>24</lsb>
<msb>31</msb>
</field>
<field>
<name>lo_vco_idac_cw_2464</name>
<lsb>16</lsb>
<msb>20</msb>
</field>
<field>
<name>lo_vco_freq_cw_2460</name>
<lsb>8</lsb>
<msb>15</msb>
</field>
<field>
<name>lo_vco_idac_cw_2460</name>
<lsb>0</lsb>
<msb>4</msb>
</field>
</fields>
</register>
<register>
<name>lo_cal_ctrl_hw9</name>
<description>lo_cal_ctrl_hw9.</description>
<addressOffset>0x15C</addressOffset>
<fields>
<field>
<name>lo_vco_freq_cw_2472</name>
<lsb>24</lsb>
<msb>31</msb>
</field>
<field>
<name>lo_vco_idac_cw_2472</name>
<lsb>16</lsb>
<msb>20</msb>
</field>
<field>
<name>lo_vco_freq_cw_2468</name>
<lsb>8</lsb>
<msb>15</msb>
</field>
<field>
<name>lo_vco_idac_cw_2468</name>
<lsb>0</lsb>
<msb>4</msb>
</field>
</fields>
</register>
<register>
<name>lo_cal_ctrl_hw10</name>
<description>lo_cal_ctrl_hw10.</description>
<addressOffset>0x160</addressOffset>
<fields>
<field>
<name>lo_vco_freq_cw_2480</name>
<lsb>24</lsb>
<msb>31</msb>
</field>
<field>
<name>lo_vco_idac_cw_2480</name>
<lsb>16</lsb>
<msb>20</msb>
</field>
<field>
<name>lo_vco_freq_cw_2476</name>
<lsb>8</lsb>
<msb>15</msb>
</field>
<field>
<name>lo_vco_idac_cw_2476</name>
<lsb>0</lsb>
<msb>4</msb>
</field>
</fields>
</register>
<register>
<name>lo_cal_ctrl_hw11</name>
<description>lo_cal_ctrl_hw11.</description>
<addressOffset>0x164</addressOffset>
<fields>
<field>
<name>lo_vco_freq_cw_2484</name>
<lsb>8</lsb>
<msb>15</msb>
</field>
<field>
<name>lo_vco_idac_cw_2484</name>
<lsb>0</lsb>
<msb>4</msb>
</field>
</fields>
</register>
<register>
<name>rosdac_ctrl_hw1</name>
<description>rosdac_ctrl_hw1.</description>
<addressOffset>0x168</addressOffset>
<fields>
<field>
<name>rosdac_q_gc1</name>
<lsb>24</lsb>
<msb>29</msb>
</field>
<field>
<name>rosdac_i_gc1</name>
<lsb>16</lsb>
<msb>21</msb>
</field>
<field>
<name>rosdac_q_gc0</name>
<lsb>8</lsb>
<msb>13</msb>
</field>
<field>
<name>rosdac_i_gc0</name>
<lsb>0</lsb>
<msb>5</msb>
</field>
</fields>
</register>
<register>
<name>rosdac_ctrl_hw2</name>
<description>rosdac_ctrl_hw2.</description>
<addressOffset>0x16C</addressOffset>
<fields>
<field>
<name>rosdac_q_gc3</name>
<lsb>24</lsb>
<msb>29</msb>
</field>
<field>
<name>rosdac_i_gc3</name>
<lsb>16</lsb>
<msb>21</msb>
</field>
<field>
<name>rosdac_q_gc2</name>
<lsb>8</lsb>
<msb>13</msb>
</field>
<field>
<name>rosdac_i_gc2</name>
<lsb>0</lsb>
<msb>5</msb>
</field>
</fields>
</register>
<register>
<name>rxiq_ctrl_hw1</name>
<description>rxiq_ctrl_hw1.</description>
<addressOffset>0x170</addressOffset>
<fields>
<field>
<name>rx_iq_gain_comp_gc0</name>
<lsb>16</lsb>
<msb>26</msb>
</field>
<field>
<name>rx_iq_phase_comp_gc0</name>
<lsb>0</lsb>
<msb>9</msb>
</field>
</fields>
</register>
<register>
<name>rxiq_ctrl_hw2</name>
<description>rxiq_ctrl_hw2.</description>
<addressOffset>0x174</addressOffset>
<fields>
<field>
<name>rx_iq_gain_comp_gc1</name>
<lsb>16</lsb>
<msb>26</msb>
</field>
<field>
<name>rx_iq_phase_comp_gc1</name>
<lsb>0</lsb>
<msb>9</msb>
</field>
</fields>
</register>
<register>
<name>rxiq_ctrl_hw3</name>
<description>rxiq_ctrl_hw3.</description>
<addressOffset>0x178</addressOffset>
<fields>
<field>
<name>rx_iq_gain_comp_gc2</name>
<lsb>16</lsb>
<msb>26</msb>
</field>
<field>
<name>rx_iq_phase_comp_gc2</name>
<lsb>0</lsb>
<msb>9</msb>
</field>
</fields>
</register>
<register>
<name>rxiq_ctrl_hw4</name>
<description>rxiq_ctrl_hw4.</description>
<addressOffset>0x17C</addressOffset>
<fields>
<field>
<name>rx_iq_gain_comp_gc3</name>
<lsb>16</lsb>
<msb>26</msb>
</field>
<field>
<name>rx_iq_phase_comp_gc3</name>
<lsb>0</lsb>
<msb>9</msb>
</field>
</fields>
</register>
<register>
<name>tosdac_ctrl_hw1</name>
<description>tosdac_ctrl_hw1.</description>
<addressOffset>0x180</addressOffset>
<fields>
<field>
<name>tbb_tosdac_q_gc1</name>
<lsb>24</lsb>
<msb>29</msb>
</field>
<field>
<name>tbb_tosdac_i_gc1</name>
<lsb>16</lsb>
<msb>21</msb>
</field>
<field>
<name>tbb_tosdac_q_gc0</name>
<lsb>8</lsb>
<msb>13</msb>
</field>
<field>
<name>tbb_tosdac_i_gc0</name>
<lsb>0</lsb>
<msb>5</msb>
</field>
</fields>
</register>
<register>
<name>tosdac_ctrl_hw2</name>
<description>tosdac_ctrl_hw2.</description>
<addressOffset>0x184</addressOffset>
<fields>
<field>
<name>tbb_tosdac_q_gc3</name>
<lsb>24</lsb>
<msb>29</msb>
</field>
<field>
<name>tbb_tosdac_i_gc3</name>
<lsb>16</lsb>
<msb>21</msb>
</field>
<field>
<name>tbb_tosdac_q_gc2</name>
<lsb>8</lsb>
<msb>13</msb>
</field>
<field>
<name>tbb_tosdac_i_gc2</name>
<lsb>0</lsb>
<msb>5</msb>
</field>
</fields>
</register>
<register>
<name>tosdac_ctrl_hw3</name>
<description>tosdac_ctrl_hw3.</description>
<addressOffset>0x188</addressOffset>
<fields>
<field>
<name>tbb_tosdac_q_gc5</name>
<lsb>24</lsb>
<msb>29</msb>
</field>
<field>
<name>tbb_tosdac_i_gc5</name>
<lsb>16</lsb>
<msb>21</msb>
</field>
<field>
<name>tbb_tosdac_q_gc4</name>
<lsb>8</lsb>
<msb>13</msb>
</field>
<field>
<name>tbb_tosdac_i_gc4</name>
<lsb>0</lsb>
<msb>5</msb>
</field>
</fields>
</register>
<register>
<name>tosdac_ctrl_hw4</name>
<description>tosdac_ctrl_hw4.</description>
<addressOffset>0x18C</addressOffset>
<fields>
<field>
<name>tbb_tosdac_q_gc7</name>
<lsb>24</lsb>
<msb>29</msb>
</field>
<field>
<name>tbb_tosdac_i_gc7</name>
<lsb>16</lsb>
<msb>21</msb>
</field>
<field>
<name>tbb_tosdac_q_gc6</name>
<lsb>8</lsb>
<msb>13</msb>
</field>
<field>
<name>tbb_tosdac_i_gc6</name>
<lsb>0</lsb>
<msb>5</msb>
</field>
</fields>
</register>
<register>
<name>tx_iq_gain_hw0</name>
<description>tx_iq_gain_hw0.</description>
<addressOffset>0x190</addressOffset>
<fields>
<field>
<name>tx_iq_gain_comp_gc0</name>
<lsb>16</lsb>
<msb>26</msb>
</field>
<field>
<name>tx_iq_phase_comp_gc0</name>
<lsb>0</lsb>
<msb>9</msb>
</field>
</fields>
</register>
<register>
<name>tx_iq_gain_hw1</name>
<description>tx_iq_gain_hw1.</description>
<addressOffset>0x194</addressOffset>
<fields>
<field>
<name>tx_iq_gain_comp_gc1</name>
<lsb>16</lsb>
<msb>26</msb>
</field>
<field>
<name>tx_iq_phase_comp_gc1</name>
<lsb>0</lsb>
<msb>9</msb>
</field>
</fields>
</register>
<register>
<name>tx_iq_gain_hw2</name>
<description>tx_iq_gain_hw2.</description>
<addressOffset>0x198</addressOffset>
<fields>
<field>
<name>tx_iq_gain_comp_gc2</name>
<lsb>16</lsb>
<msb>26</msb>
</field>
<field>
<name>tx_iq_phase_comp_gc2</name>
<lsb>0</lsb>
<msb>9</msb>
</field>
</fields>
</register>
<register>
<name>tx_iq_gain_hw3</name>
<description>tx_iq_gain_hw3.</description>
<addressOffset>0x19C</addressOffset>
<fields>
<field>
<name>tx_iq_gain_comp_gc3</name>
<lsb>16</lsb>
<msb>26</msb>
</field>
<field>
<name>tx_iq_phase_comp_gc3</name>
<lsb>0</lsb>
<msb>9</msb>
</field>
</fields>
</register>
<register>
<name>tx_iq_gain_hw4</name>
<description>tx_iq_gain_hw4.</description>
<addressOffset>0x1A0</addressOffset>
<fields>
<field>
<name>tx_iq_gain_comp_gc4</name>
<lsb>16</lsb>
<msb>26</msb>
</field>
<field>
<name>tx_iq_phase_comp_gc4</name>
<lsb>0</lsb>
<msb>9</msb>
</field>
</fields>
</register>
<register>
<name>tx_iq_gain_hw5</name>
<description>tx_iq_gain_hw5.</description>
<addressOffset>0x1A4</addressOffset>
<fields>
<field>
<name>tx_iq_gain_comp_gc5</name>
<lsb>16</lsb>
<msb>26</msb>
</field>
<field>
<name>tx_iq_phase_comp_gc5</name>
<lsb>0</lsb>
<msb>9</msb>
</field>
</fields>
</register>
<register>
<name>tx_iq_gain_hw6</name>
<description>tx_iq_gain_hw6.</description>
<addressOffset>0x1A8</addressOffset>
<fields>
<field>
<name>tx_iq_gain_comp_gc6</name>
<lsb>16</lsb>
<msb>26</msb>
</field>
<field>
<name>tx_iq_phase_comp_gc6</name>
<lsb>0</lsb>
<msb>9</msb>
</field>
</fields>
</register>
<register>
<name>tx_iq_gain_hw7</name>
<description>tx_iq_gain_hw7.</description>
<addressOffset>0x1AC</addressOffset>
<fields>
<field>
<name>tx_iq_gain_comp_gc7</name>
<lsb>16</lsb>
<msb>26</msb>
</field>
<field>
<name>tx_iq_phase_comp_gc7</name>
<lsb>0</lsb>
<msb>9</msb>
</field>
</fields>
</register>
<register>
<name>lo_sdm_ctrl_hw1</name>
<description>lo_sdm_ctrl_hw1.</description>
<addressOffset>0x1B0</addressOffset>
<fields>
<field>
<name>lo_sdm_dither_sel_wlan_2484</name>
<lsb>26</lsb>
<msb>27</msb>
</field>
<field>
<name>lo_sdm_dither_sel_wlan_2472</name>
<lsb>24</lsb>
<msb>25</msb>
</field>
<field>
<name>lo_sdm_dither_sel_wlan_2467</name>
<lsb>22</lsb>
<msb>23</msb>
</field>
<field>
<name>lo_sdm_dither_sel_wlan_2462</name>
<lsb>20</lsb>
<msb>21</msb>
</field>
<field>
<name>lo_sdm_dither_sel_wlan_2457</name>
<lsb>18</lsb>
<msb>19</msb>
</field>
<field>
<name>lo_sdm_dither_sel_wlan_2452</name>
<lsb>16</lsb>
<msb>17</msb>
</field>
<field>
<name>lo_sdm_dither_sel_wlan_2447</name>
<lsb>14</lsb>
<msb>15</msb>
</field>
<field>
<name>lo_sdm_dither_sel_wlan_2442</name>
<lsb>12</lsb>
<msb>13</msb>
</field>
<field>
<name>lo_sdm_dither_sel_wlan_2437</name>
<lsb>10</lsb>
<msb>11</msb>
</field>
<field>
<name>lo_sdm_dither_sel_wlan_2432</name>
<lsb>8</lsb>
<msb>9</msb>
</field>
<field>
<name>lo_sdm_dither_sel_wlan_2427</name>
<lsb>6</lsb>
<msb>7</msb>
</field>
<field>
<name>lo_sdm_dither_sel_wlan_2422</name>
<lsb>4</lsb>
<msb>5</msb>
</field>
<field>
<name>lo_sdm_dither_sel_wlan_2417</name>
<lsb>2</lsb>
<msb>3</msb>
</field>
<field>
<name>lo_sdm_dither_sel_wlan_2412</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>lo_sdm_ctrl_hw2</name>
<description>lo_sdm_ctrl_hw2.</description>
<addressOffset>0x1B4</addressOffset>
<fields>
<field>
<name>lo_sdm_dither_sel_ble_2432</name>
<lsb>30</lsb>
<msb>31</msb>
</field>
<field>
<name>lo_sdm_dither_sel_ble_2430</name>
<lsb>28</lsb>
<msb>29</msb>
</field>
<field>
<name>lo_sdm_dither_sel_ble_2428</name>
<lsb>26</lsb>
<msb>27</msb>
</field>
<field>
<name>lo_sdm_dither_sel_ble_2426</name>
<lsb>24</lsb>
<msb>25</msb>
</field>
<field>
<name>lo_sdm_dither_sel_ble_2424</name>
<lsb>22</lsb>
<msb>23</msb>
</field>
<field>
<name>lo_sdm_dither_sel_ble_2422</name>
<lsb>20</lsb>
<msb>21</msb>
</field>
<field>
<name>lo_sdm_dither_sel_ble_2420</name>
<lsb>18</lsb>
<msb>19</msb>
</field>
<field>
<name>lo_sdm_dither_sel_ble_2418</name>
<lsb>16</lsb>
<msb>17</msb>
</field>
<field>
<name>lo_sdm_dither_sel_ble_2416</name>
<lsb>14</lsb>
<msb>15</msb>
</field>
<field>
<name>lo_sdm_dither_sel_ble_2414</name>
<lsb>12</lsb>
<msb>13</msb>
</field>
<field>
<name>lo_sdm_dither_sel_ble_2412</name>
<lsb>10</lsb>
<msb>11</msb>
</field>
<field>
<name>lo_sdm_dither_sel_ble_2410</name>
<lsb>8</lsb>
<msb>9</msb>
</field>
<field>
<name>lo_sdm_dither_sel_ble_2408</name>
<lsb>6</lsb>
<msb>7</msb>
</field>
<field>
<name>lo_sdm_dither_sel_ble_2406</name>
<lsb>4</lsb>
<msb>5</msb>
</field>
<field>
<name>lo_sdm_dither_sel_ble_2404</name>
<lsb>2</lsb>
<msb>3</msb>
</field>
<field>
<name>lo_sdm_dither_sel_ble_2402</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>lo_sdm_ctrl_hw3</name>
<description>lo_sdm_ctrl_hw3.</description>
<addressOffset>0x1B8</addressOffset>
<fields>
<field>
<name>lo_sdm_dither_sel_ble_2464</name>
<lsb>30</lsb>
<msb>31</msb>
</field>
<field>
<name>lo_sdm_dither_sel_ble_2462</name>
<lsb>28</lsb>
<msb>29</msb>
</field>
<field>
<name>lo_sdm_dither_sel_ble_2460</name>
<lsb>26</lsb>
<msb>27</msb>
</field>
<field>
<name>lo_sdm_dither_sel_ble_2458</name>
<lsb>24</lsb>
<msb>25</msb>
</field>
<field>
<name>lo_sdm_dither_sel_ble_2456</name>
<lsb>22</lsb>
<msb>23</msb>
</field>
<field>
<name>lo_sdm_dither_sel_ble_2454</name>
<lsb>20</lsb>
<msb>21</msb>
</field>
<field>
<name>lo_sdm_dither_sel_ble_2452</name>
<lsb>18</lsb>
<msb>19</msb>
</field>
<field>
<name>lo_sdm_dither_sel_ble_2450</name>
<lsb>16</lsb>
<msb>17</msb>
</field>
<field>
<name>lo_sdm_dither_sel_ble_2448</name>
<lsb>14</lsb>
<msb>15</msb>
</field>
<field>
<name>lo_sdm_dither_sel_ble_2446</name>
<lsb>12</lsb>
<msb>13</msb>
</field>
<field>
<name>lo_sdm_dither_sel_ble_2444</name>
<lsb>10</lsb>
<msb>11</msb>
</field>
<field>
<name>lo_sdm_dither_sel_ble_2442</name>
<lsb>8</lsb>
<msb>9</msb>
</field>
<field>
<name>lo_sdm_dither_sel_ble_2440</name>
<lsb>6</lsb>
<msb>7</msb>
</field>
<field>
<name>lo_sdm_dither_sel_ble_2438</name>
<lsb>4</lsb>
<msb>5</msb>
</field>
<field>
<name>lo_sdm_dither_sel_ble_2436</name>
<lsb>2</lsb>
<msb>3</msb>
</field>
<field>
<name>lo_sdm_dither_sel_ble_2434</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>lo_sdm_ctrl_hw4</name>
<description>lo_sdm_ctrl_hw4.</description>
<addressOffset>0x1BC</addressOffset>
<fields>
<field>
<name>lo_sdm_dither_sel_ble_tx</name>
<lsb>16</lsb>
<msb>17</msb>
</field>
<field>
<name>lo_sdm_dither_sel_ble_2480</name>
<lsb>14</lsb>
<msb>15</msb>
</field>
<field>
<name>lo_sdm_dither_sel_ble_2478</name>
<lsb>12</lsb>
<msb>13</msb>
</field>
<field>
<name>lo_sdm_dither_sel_ble_2476</name>
<lsb>10</lsb>
<msb>11</msb>
</field>
<field>
<name>lo_sdm_dither_sel_ble_2474</name>
<lsb>8</lsb>
<msb>9</msb>
</field>
<field>
<name>lo_sdm_dither_sel_ble_2472</name>
<lsb>6</lsb>
<msb>7</msb>
</field>
<field>
<name>lo_sdm_dither_sel_ble_2470</name>
<lsb>4</lsb>
<msb>5</msb>
</field>
<field>
<name>lo_sdm_dither_sel_ble_2468</name>
<lsb>2</lsb>
<msb>3</msb>
</field>
<field>
<name>lo_sdm_dither_sel_ble_2466</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>lo_sdm_ctrl_hw5</name>
<description>lo_sdm_ctrl_hw5.</description>
<addressOffset>0x1C0</addressOffset>
<fields>
<field>
<name>lo_sdm_bypass_mode</name>
<lsb>12</lsb>
<msb>17</msb>
</field>
<field>
<name>lo_center_freq_mhz</name>
<lsb>0</lsb>
<msb>11</msb>
</field>
</fields>
</register>
<register>
<name>lo_sdm_ctrl_hw6</name>
<description>lo_sdm_ctrl_hw6.</description>
<addressOffset>0x1C4</addressOffset>
<fields>
<field>
<name>lo_sdmin_center</name>
<lsb>0</lsb>
<msb>28</msb>
</field>
</fields>
</register>
<register>
<name>lo_sdm_ctrl_hw7</name>
<description>lo_sdm_ctrl_hw7.</description>
<addressOffset>0x1C8</addressOffset>
<fields>
<field>
<name>lo_sdmin_1m</name>
<lsb>0</lsb>
<msb>19</msb>
</field>
</fields>
</register>
<register>
<name>lo_sdm_ctrl_hw8</name>
<description>lo_sdm_ctrl_hw8.</description>
<addressOffset>0x1CC</addressOffset>
<fields>
<field>
<name>lo_sdmin_if</name>
<lsb>0</lsb>
<msb>19</msb>
</field>
</fields>
</register>
<register>
<name>rbb_bw_ctrl_hw</name>
<description>rbb_bw_ctrl_hw.</description>
<addressOffset>0x1D0</addressOffset>
<fields>
<field>
<name>rbb_bt_mode_ble</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>singen_ctrl0</name>
<description>singen_ctrl0.</description>
<addressOffset>0x20C</addressOffset>
<fields>
<field>
<name>singen_en</name>
<lsb>31</lsb>
<msb>31</msb>
</field>
<field>
<name>singen_clkdiv_n</name>
<lsb>29</lsb>
<msb>30</msb>
</field>
<field>
<name>singen_unsign_en</name>
<lsb>28</lsb>
<msb>28</msb>
</field>
<field>
<name>singen_inc_step0</name>
<lsb>16</lsb>
<msb>25</msb>
</field>
<field>
<name>singen_inc_step1</name>
<lsb>0</lsb>
<msb>9</msb>
</field>
</fields>
</register>
<register>
<name>singen_ctrl1</name>
<description>singen_ctrl1.</description>
<addressOffset>0x210</addressOffset>
<fields>
<field>
<name>singen_mode_i</name>
<lsb>28</lsb>
<msb>31</msb>
</field>
<field>
<name>singen_clkdiv_i</name>
<lsb>16</lsb>
<msb>25</msb>
</field>
<field>
<name>singen_mode_q</name>
<lsb>12</lsb>
<msb>15</msb>
</field>
<field>
<name>singen_clkdiv_q</name>
<lsb>0</lsb>
<msb>9</msb>
</field>
</fields>
</register>
<register>
<name>singen_ctrl2</name>
<description>singen_ctrl2.</description>
<addressOffset>0x214</addressOffset>
<fields>
<field>
<name>singen_start_addr0_i</name>
<lsb>22</lsb>
<msb>31</msb>
</field>
<field>
<name>singen_start_addr1_i</name>
<lsb>12</lsb>
<msb>21</msb>
</field>
<field>
<name>singen_gain_i</name>
<lsb>0</lsb>
<msb>10</msb>
</field>
</fields>
</register>
<register>
<name>singen_ctrl3</name>
<description>singen_ctrl3.</description>
<addressOffset>0x218</addressOffset>
<fields>
<field>
<name>singen_start_addr0_q</name>
<lsb>22</lsb>
<msb>31</msb>
</field>
<field>
<name>singen_start_addr1_q</name>
<lsb>12</lsb>
<msb>21</msb>
</field>
<field>
<name>singen_gain_q</name>
<lsb>0</lsb>
<msb>10</msb>
</field>
</fields>
</register>
<register>
<name>singen_ctrl4</name>
<description>singen_ctrl4.</description>
<addressOffset>0x21C</addressOffset>
<fields>
<field>
<name>singen_fix_en_i</name>
<lsb>28</lsb>
<msb>28</msb>
</field>
<field>
<name>singen_fix_i</name>
<lsb>16</lsb>
<msb>27</msb>
</field>
<field>
<name>singen_fix_en_q</name>
<lsb>12</lsb>
<msb>12</msb>
</field>
<field>
<name>singen_fix_q</name>
<lsb>0</lsb>
<msb>11</msb>
</field>
</fields>
</register>
<register>
<name>rfif_dfe_ctrl0</name>
<description>rfif_dfe_ctrl0.</description>
<addressOffset>0x220</addressOffset>
<fields>
<field>
<name>test_sel</name>
<lsb>28</lsb>
<msb>31</msb>
</field>
<field>
<name>bbmode_4s_en</name>
<lsb>27</lsb>
<msb>27</msb>
</field>
<field>
<name>bbmode_4s</name>
<lsb>26</lsb>
<msb>26</msb>
</field>
<field>
<name>wifimode_4s_en</name>
<lsb>25</lsb>
<msb>25</msb>
</field>
<field>
<name>wifimode_4s</name>
<lsb>23</lsb>
<msb>24</msb>
</field>
<field>
<name>rf_ch_ind_ble_4s_en</name>
<lsb>22</lsb>
<msb>22</msb>
</field>
<field>
<name>rf_ch_ind_ble_4s</name>
<lsb>15</lsb>
<msb>21</msb>
</field>
<field>
<name>pad_dac_clkout_inv_en</name>
<lsb>14</lsb>
<msb>14</msb>
</field>
<field>
<name>pad_adc_clkout_inv_en</name>
<lsb>13</lsb>
<msb>13</msb>
</field>
<field>
<name>tx_test_sel</name>
<lsb>11</lsb>
<msb>12</msb>
</field>
<field>
<name>rx_test_sel</name>
<lsb>9</lsb>
<msb>10</msb>
</field>
<field>
<name>tx_dfe_en_4s_en</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>tx_dfe_en_4s</name>
<lsb>7</lsb>
<msb>7</msb>
</field>
<field>
<name>rx_dfe_en_4s_en</name>
<lsb>6</lsb>
<msb>6</msb>
</field>
<field>
<name>rx_dfe_en_4s</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>rfckg_dac_afifo_inv</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>rfckg_adc_clkout_sel</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>rfckg_adc_afifo_inv</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>rfckg_txclk_4s_on</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>rfckg_rxclk_4s_on</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>rfif_test_read</name>
<description>rfif_test_read.</description>
<addressOffset>0x224</addressOffset>
<fields>
<field>
<name>test_read</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>rfif_dig_ctrl</name>
<description>rfif_dig_ctrl.</description>
<addressOffset>0x228</addressOffset>
<fields>
<field>
<name>rfif_ppud_manaual_en</name>
<lsb>30</lsb>
<msb>30</msb>
</field>
<field>
<name>rfif_ppud_cnt1</name>
<lsb>25</lsb>
<msb>29</msb>
</field>
<field>
<name>rfif_ppud_cnt2</name>
<lsb>16</lsb>
<msb>24</msb>
</field>
<field>
<name>rfif_int_lo_unlocked_mask</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>rfckg_rxclk_div2_mode</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>test_gc_from_pad_en</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>test_from_pad_en</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>rf_data_temp_0</name>
<description>rf_data_temp_0.</description>
<addressOffset>0x22C</addressOffset>
<fields>
<field>
<name>rf_data_temp_0</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>rf_data_temp_1</name>
<description>rf_data_temp_1.</description>
<addressOffset>0x230</addressOffset>
<fields>
<field>
<name>rf_data_temp_1</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>rf_data_temp_2</name>
<description>rf_data_temp_2.</description>
<addressOffset>0x234</addressOffset>
<fields>
<field>
<name>rf_data_temp_2</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>rf_data_temp_3</name>
<description>rf_data_temp_3.</description>
<addressOffset>0x238</addressOffset>
<fields>
<field>
<name>rf_data_temp_3</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>rf_sram_ctrl0</name>
<description>rf_sram_ctrl0.</description>
<addressOffset>0x23C</addressOffset>
<fields>
<field>
<name>rf_sram_ext_clr</name>
<lsb>19</lsb>
<msb>19</msb>
</field>
<field>
<name>rf_sram_swap</name>
<lsb>18</lsb>
<msb>18</msb>
</field>
<field>
<name>rf_sram_link_mode</name>
<lsb>16</lsb>
<msb>17</msb>
</field>
<field>
<name>rf_sram_link_dly</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>rf_sram_ctrl1</name>
<description>rf_sram_ctrl1.</description>
<addressOffset>0x240</addressOffset>
<fields>
<field>
<name>rf_sram_adc_done_cnt</name>
<lsb>16</lsb>
<msb>31</msb>
</field>
<field>
<name>rf_sram_adc_sts_clr</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>rf_sram_adc_loop_en</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>rf_sram_adc_en</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>rf_sram_adc_done</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>rf_sram_ctrl2</name>
<description>rf_sram_ctrl2.</description>
<addressOffset>0x244</addressOffset>
<fields>
<field>
<name>rf_sram_adc_addr_start</name>
<lsb>16</lsb>
<msb>31</msb>
</field>
<field>
<name>rf_sram_adc_addr_end</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>rf_sram_ctrl3</name>
<description>rf_sram_ctrl3.</description>
<addressOffset>0x248</addressOffset>
<fields>
<field>
<name>rf_sram_adc_sts</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>rf_sram_ctrl4</name>
<description>rf_sram_ctrl4.</description>
<addressOffset>0x24C</addressOffset>
<fields>
<field>
<name>rf_sram_dac_done_cnt</name>
<lsb>16</lsb>
<msb>31</msb>
</field>
<field>
<name>rf_sram_dac_sts_clr</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>rf_sram_dac_loop_en</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>rf_sram_dac_en</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>rf_sram_dac_done</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>rf_sram_ctrl5</name>
<description>rf_sram_ctrl5.</description>
<addressOffset>0x250</addressOffset>
<fields>
<field>
<name>rf_sram_dac_addr_start</name>
<lsb>16</lsb>
<msb>31</msb>
</field>
<field>
<name>rf_sram_dac_addr_end</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>rf_sram_ctrl6</name>
<description>rf_sram_ctrl6.</description>
<addressOffset>0x254</addressOffset>
<fields>
<field>
<name>rf_sram_dac_sts</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>rf_ical_ctrl0</name>
<description>rf_ical_ctrl0.</description>
<addressOffset>0x258</addressOffset>
<fields>
<field>
<name>rf_ical_f_ud_inv_en</name>
<lsb>31</lsb>
<msb>31</msb>
</field>
<field>
<name>rf_ical_a_ud_inv_en</name>
<lsb>30</lsb>
<msb>30</msb>
</field>
<field>
<name>rf_ical_f_cnt_n</name>
<lsb>20</lsb>
<msb>29</msb>
</field>
<field>
<name>rf_ical_a_cnt_n</name>
<lsb>10</lsb>
<msb>19</msb>
</field>
<field>
<name>rf_ical_r_cnt_n</name>
<lsb>0</lsb>
<msb>9</msb>
</field>
</fields>
</register>
<register>
<name>rf_ical_ctrl1</name>
<description>rf_ical_ctrl1.</description>
<addressOffset>0x25C</addressOffset>
<fields>
<field>
<name>rf_ical_r_os_i</name>
<lsb>20</lsb>
<msb>29</msb>
</field>
<field>
<name>rf_ical_r_os_q</name>
<lsb>10</lsb>
<msb>19</msb>
</field>
<field>
<name>rf_ical_r_avg_n</name>
<lsb>0</lsb>
<msb>4</msb>
</field>
</fields>
</register>
<register>
<name>rf_ical_ctrl2</name>
<description>rf_ical_ctrl2.</description>
<addressOffset>0x260</addressOffset>
<fields>
<field>
<name>rf_ical_period_n</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>rf_fsm_ctrl0</name>
<description>rf_fsm_ctrl0.</description>
<addressOffset>0x264</addressOffset>
<fields>
<field>
<name>rf_ch_ind_wifi</name>
<lsb>0</lsb>
<msb>11</msb>
</field>
</fields>
</register>
<register>
<name>rf_fsm_ctrl1</name>
<description>rf_fsm_ctrl1.</description>
<addressOffset>0x268</addressOffset>
<fields>
<field>
<name>rf_fsm_pu_pa_dly_n</name>
<lsb>20</lsb>
<msb>29</msb>
</field>
<field>
<name>rf_fsm_lo_rdy_sbclr</name>
<lsb>19</lsb>
<msb>19</msb>
</field>
<field>
<name>rf_fsm_lo_rdy_4s_1</name>
<lsb>18</lsb>
<msb>18</msb>
</field>
<field>
<name>rf_fsm_lo_rdy_rst</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>rf_fsm_lo_rdy</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>rf_fsm_lo_time</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>rf_fsm_ctrl2</name>
<description>rf_fsm_ctrl2.</description>
<addressOffset>0x26C</addressOffset>
<fields>
<field>
<name>rf_fsm_dfe_rx_dly_n</name>
<lsb>20</lsb>
<msb>29</msb>
</field>
<field>
<name>rf_fsm_dfe_tx_dly_n</name>
<lsb>10</lsb>
<msb>19</msb>
</field>
<field>
<name>rf_trx_ble_4s_en</name>
<lsb>6</lsb>
<msb>6</msb>
</field>
<field>
<name>rf_trx_sw_ble_4s</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>rf_trx_en_ble_4s</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>rf_fsm_st_dbg_en</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>rf_fsm_st_dbg</name>
<lsb>0</lsb>
<msb>2</msb>
</field>
</fields>
</register>
<register>
<name>rf_pkdet_ctrl0</name>
<description>rf_pkdet_ctrl0.</description>
<addressOffset>0x270</addressOffset>
<fields>
<field>
<name>pkdet_out_mode</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>pkdet_out_cnt_en</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>pkdet_out_cnt_sts</name>
<lsb>0</lsb>
<msb>3</msb>
</field>
</fields>
</register>
<register>
<name>dfe_ctrl_0</name>
<description>dfe_ctrl_0.</description>
<addressOffset>0x600</addressOffset>
<fields>
<field>
<name>tx_dvga_gain_ctrl_hw</name>
<lsb>31</lsb>
<msb>31</msb>
</field>
<field>
<name>tx_dvga_gain_qdb</name>
<lsb>24</lsb>
<msb>30</msb>
</field>
<field>
<name>tx_iqc_gain_en</name>
<lsb>23</lsb>
<msb>23</msb>
</field>
<field>
<name>tx_iqc_gain</name>
<lsb>12</lsb>
<msb>22</msb>
</field>
<field>
<name>tx_iqc_phase_en</name>
<lsb>10</lsb>
<msb>10</msb>
</field>
<field>
<name>tx_iqc_phase</name>
<lsb>0</lsb>
<msb>9</msb>
</field>
</fields>
</register>
<register>
<name>dfe_ctrl_1</name>
<description>dfe_ctrl_1.</description>
<addressOffset>0x604</addressOffset>
<fields>
<field>
<name>tx_dac_iq_swap</name>
<lsb>31</lsb>
<msb>31</msb>
</field>
<field>
<name>tx_dac_dat_format</name>
<lsb>30</lsb>
<msb>30</msb>
</field>
<field>
<name>tx_dac_os_q</name>
<lsb>16</lsb>
<msb>27</msb>
</field>
<field>
<name>tx_dac_os_i</name>
<lsb>0</lsb>
<msb>11</msb>
</field>
</fields>
</register>
<register>
<name>dfe_ctrl_2</name>
<description>dfe_ctrl_2.</description>
<addressOffset>0x608</addressOffset>
<fields>
<field>
<name>rx_adc_iq_swap</name>
<lsb>31</lsb>
<msb>31</msb>
</field>
<field>
<name>rx_adc_dat_format</name>
<lsb>30</lsb>
<msb>30</msb>
</field>
<field>
<name>rx_adc_low_pow_en</name>
<lsb>29</lsb>
<msb>29</msb>
</field>
<field>
<name>rx_adc_dce_flt_en</name>
<lsb>28</lsb>
<msb>28</msb>
</field>
<field>
<name>rx_adc_os_q</name>
<lsb>16</lsb>
<msb>25</msb>
</field>
<field>
<name>rx_adc_os_i</name>
<lsb>0</lsb>
<msb>9</msb>
</field>
</fields>
</register>
<register>
<name>dfe_ctrl_3</name>
<description>dfe_ctrl_3.</description>
<addressOffset>0x60C</addressOffset>
<fields>
<field>
<name>rx_adc_4s_q_en</name>
<lsb>26</lsb>
<msb>26</msb>
</field>
<field>
<name>rx_adc_4s_q_val</name>
<lsb>16</lsb>
<msb>25</msb>
</field>
<field>
<name>rx_adc_4s_i_en</name>
<lsb>10</lsb>
<msb>10</msb>
</field>
<field>
<name>rx_adc_4s_i_val</name>
<lsb>0</lsb>
<msb>9</msb>
</field>
</fields>
</register>
<register>
<name>dfe_ctrl_4</name>
<description>dfe_ctrl_4.</description>
<addressOffset>0x610</addressOffset>
<fields>
<field>
<name>rx_pf_i_en</name>
<lsb>31</lsb>
<msb>31</msb>
</field>
<field>
<name>rx_pf_q_en</name>
<lsb>30</lsb>
<msb>30</msb>
</field>
<field>
<name>rx_pf_th1</name>
<lsb>16</lsb>
<msb>25</msb>
</field>
<field>
<name>rx_pf_th2</name>
<lsb>0</lsb>
<msb>9</msb>
</field>
</fields>
</register>
<register>
<name>dfe_ctrl_5</name>
<description>dfe_ctrl_5.</description>
<addressOffset>0x614</addressOffset>
<fields>
<field>
<name>rx_iqc_gain_en</name>
<lsb>23</lsb>
<msb>23</msb>
</field>
<field>
<name>rx_iqc_gain</name>
<lsb>12</lsb>
<msb>22</msb>
</field>
<field>
<name>rx_iqc_phase_en</name>
<lsb>10</lsb>
<msb>10</msb>
</field>
<field>
<name>rx_iqc_phase</name>
<lsb>0</lsb>
<msb>9</msb>
</field>
</fields>
</register>
<register>
<name>dfe_ctrl_6</name>
<description>dfe_ctrl_6.</description>
<addressOffset>0x618</addressOffset>
<fields>
<field>
<name>rx_pm_in_sel</name>
<lsb>30</lsb>
<msb>31</msb>
</field>
<field>
<name>rx_pm_en</name>
<lsb>29</lsb>
<msb>29</msb>
</field>
<field>
<name>rx_pm_done</name>
<lsb>28</lsb>
<msb>28</msb>
</field>
<field>
<name>rx_pm_freqshift_en</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>rx_pm_freqshift_cw</name>
<lsb>0</lsb>
<msb>19</msb>
</field>
</fields>
</register>
<register>
<name>dfe_ctrl_7</name>
<description>dfe_ctrl_7.</description>
<addressOffset>0x61C</addressOffset>
<fields>
<field>
<name>rx_pm_acc_len</name>
<lsb>16</lsb>
<msb>31</msb>
</field>
<field>
<name>rx_pm_start_ofs</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>dfe_ctrl_8</name>
<description>dfe_ctrl_8.</description>
<addressOffset>0x620</addressOffset>
<fields>
<field>
<name>rx_pm_iqacc_i</name>
<lsb>0</lsb>
<msb>24</msb>
</field>
</fields>
</register>
<register>
<name>dfe_ctrl_9</name>
<description>dfe_ctrl_9.</description>
<addressOffset>0x624</addressOffset>
<fields>
<field>
<name>rx_pm_iqacc_q</name>
<lsb>0</lsb>
<msb>24</msb>
</field>
</fields>
</register>
<register>
<name>dfe_ctrl_10</name>
<description>dfe_ctrl_10.</description>
<addressOffset>0x628</addressOffset>
<fields>
<field>
<name>dfe_dac_raw_q</name>
<lsb>16</lsb>
<msb>26</msb>
</field>
<field>
<name>dfe_dac_raw_i</name>
<lsb>0</lsb>
<msb>10</msb>
</field>
</fields>
</register>
<register>
<name>dfe_ctrl_11</name>
<description>dfe_ctrl_11.</description>
<addressOffset>0x62C</addressOffset>
<fields>
<field>
<name>dfe_adc_raw_q</name>
<lsb>16</lsb>
<msb>25</msb>
</field>
<field>
<name>dfe_adc_raw_i</name>
<lsb>0</lsb>
<msb>9</msb>
</field>
</fields>
</register>
<register>
<name>dfe_ctrl_12</name>
<description>dfe_ctrl_12.</description>
<addressOffset>0x630</addressOffset>
<fields>
<field>
<name>tx_dvga_gain_qdb_gc3</name>
<lsb>24</lsb>
<msb>30</msb>
</field>
<field>
<name>tx_dvga_gain_qdb_gc2</name>
<lsb>16</lsb>
<msb>22</msb>
</field>
<field>
<name>tx_dvga_gain_qdb_gc1</name>
<lsb>8</lsb>
<msb>14</msb>
</field>
<field>
<name>tx_dvga_gain_qdb_gc0</name>
<lsb>0</lsb>
<msb>6</msb>
</field>
</fields>
</register>
<register>
<name>dfe_ctrl_13</name>
<description>dfe_ctrl_13.</description>
<addressOffset>0x634</addressOffset>
<fields>
<field>
<name>tx_dvga_gain_qdb_gc7</name>
<lsb>24</lsb>
<msb>30</msb>
</field>
<field>
<name>tx_dvga_gain_qdb_gc6</name>
<lsb>16</lsb>
<msb>22</msb>
</field>
<field>
<name>tx_dvga_gain_qdb_gc5</name>
<lsb>8</lsb>
<msb>14</msb>
</field>
<field>
<name>tx_dvga_gain_qdb_gc4</name>
<lsb>0</lsb>
<msb>6</msb>
</field>
</fields>
</register>
<register>
<name>dfe_ctrl_14</name>
<description>dfe_ctrl_14.</description>
<addressOffset>0x638</addressOffset>
<fields>
<field>
<name>tx_dvga_gain_qdb_gc11</name>
<lsb>24</lsb>
<msb>30</msb>
</field>
<field>
<name>tx_dvga_gain_qdb_gc10</name>
<lsb>16</lsb>
<msb>22</msb>
</field>
<field>
<name>tx_dvga_gain_qdb_gc9</name>
<lsb>8</lsb>
<msb>14</msb>
</field>
<field>
<name>tx_dvga_gain_qdb_gc8</name>
<lsb>0</lsb>
<msb>6</msb>
</field>
</fields>
</register>
<register>
<name>dfe_ctrl_15</name>
<description>dfe_ctrl_15.</description>
<addressOffset>0x63C</addressOffset>
<fields>
<field>
<name>tx_dvga_gain_qdb_gc15</name>
<lsb>24</lsb>
<msb>30</msb>
</field>
<field>
<name>tx_dvga_gain_qdb_gc14</name>
<lsb>16</lsb>
<msb>22</msb>
</field>
<field>
<name>tx_dvga_gain_qdb_gc13</name>
<lsb>8</lsb>
<msb>14</msb>
</field>
<field>
<name>tx_dvga_gain_qdb_gc12</name>
<lsb>0</lsb>
<msb>6</msb>
</field>
</fields>
</register>
<register>
<name>dfe_ctrl_16</name>
<description>dfe_ctrl_16.</description>
<addressOffset>0x640</addressOffset>
<fields>
<field>
<name>rf_tbb_ind_gc7</name>
<lsb>28</lsb>
<msb>30</msb>
</field>
<field>
<name>rf_tbb_ind_gc6</name>
<lsb>24</lsb>
<msb>26</msb>
</field>
<field>
<name>rf_tbb_ind_gc5</name>
<lsb>20</lsb>
<msb>22</msb>
</field>
<field>
<name>rf_tbb_ind_gc4</name>
<lsb>16</lsb>
<msb>18</msb>
</field>
<field>
<name>rf_tbb_ind_gc3</name>
<lsb>12</lsb>
<msb>14</msb>
</field>
<field>
<name>rf_tbb_ind_gc2</name>
<lsb>8</lsb>
<msb>10</msb>
</field>
<field>
<name>rf_tbb_ind_gc1</name>
<lsb>4</lsb>
<msb>6</msb>
</field>
<field>
<name>rf_tbb_ind_gc0</name>
<lsb>0</lsb>
<msb>2</msb>
</field>
</fields>
</register>
<register>
<name>dfe_ctrl_17</name>
<description>dfe_ctrl_17.</description>
<addressOffset>0x644</addressOffset>
<fields>
<field>
<name>rf_tbb_ind_gc15</name>
<lsb>28</lsb>
<msb>30</msb>
</field>
<field>
<name>rf_tbb_ind_gc14</name>
<lsb>24</lsb>
<msb>26</msb>
</field>
<field>
<name>rf_tbb_ind_gc13</name>
<lsb>20</lsb>
<msb>22</msb>
</field>
<field>
<name>rf_tbb_ind_gc12</name>
<lsb>16</lsb>
<msb>18</msb>
</field>
<field>
<name>rf_tbb_ind_gc11</name>
<lsb>12</lsb>
<msb>14</msb>
</field>
<field>
<name>rf_tbb_ind_gc10</name>
<lsb>8</lsb>
<msb>10</msb>
</field>
<field>
<name>rf_tbb_ind_gc9</name>
<lsb>4</lsb>
<msb>6</msb>
</field>
<field>
<name>rf_tbb_ind_gc8</name>
<lsb>0</lsb>
<msb>2</msb>
</field>
</fields>
</register>
<register>
<name>dfe_ctrl_18</name>
<description>dfe_ctrl_18.</description>
<addressOffset>0x648</addressOffset>
<fields>
<field>
<name>tx_dvga_gain_qdb_ble_gc2</name>
<lsb>16</lsb>
<msb>22</msb>
</field>
<field>
<name>tx_dvga_gain_qdb_ble_gc1</name>
<lsb>8</lsb>
<msb>14</msb>
</field>
<field>
<name>tx_dvga_gain_qdb_ble_gc0</name>
<lsb>0</lsb>
<msb>6</msb>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>gpip</name>
<description>gpip.</description>
<baseAddress>0x40002000</baseAddress>
<groupName>gpip</groupName>
<size>32</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>gpadc_config</name>
<description>gpadc_config.</description>
<addressOffset>0x0</addressOffset>
<fields>
<field>
<name>rsvd_31_24</name>
<lsb>24</lsb>
<msb>31</msb>
</field>
<field>
<name>gpadc_fifo_thl</name>
<lsb>22</lsb>
<msb>23</msb>
</field>
<field>
<name>gpadc_fifo_data_count</name>
<lsb>16</lsb>
<msb>21</msb>
</field>
<field>
<name>gpadc_fifo_underrun_mask</name>
<lsb>14</lsb>
<msb>14</msb>
</field>
<field>
<name>gpadc_fifo_overrun_mask</name>
<lsb>13</lsb>
<msb>13</msb>
</field>
<field>
<name>gpadc_rdy_mask</name>
<lsb>12</lsb>
<msb>12</msb>
</field>
<field>
<name>gpadc_fifo_underrun_clr</name>
<lsb>10</lsb>
<msb>10</msb>
</field>
<field>
<name>gpadc_fifo_overrun_clr</name>
<lsb>9</lsb>
<msb>9</msb>
</field>
<field>
<name>gpadc_rdy_clr</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>gpadc_fifo_underrun</name>
<lsb>6</lsb>
<msb>6</msb>
</field>
<field>
<name>gpadc_fifo_overrun</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>gpadc_rdy</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>gpadc_fifo_full</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>gpadc_fifo_ne</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>gpadc_fifo_clr</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>gpadc_dma_en</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>gpadc_dma_rdata</name>
<description>gpadc_dma_rdata.</description>
<addressOffset>0x4</addressOffset>
<fields>
<field>
<name>rsvd_31_26</name>
<lsb>26</lsb>
<msb>31</msb>
</field>
<field>
<name>gpadc_dma_rdata</name>
<lsb>0</lsb>
<msb>25</msb>
</field>
</fields>
</register>
<register>
<name>gpdac_config</name>
<description>gpdac_config.</description>
<addressOffset>0x40</addressOffset>
<fields>
<field>
<name>rsvd_31_24</name>
<lsb>24</lsb>
<msb>31</msb>
</field>
<field>
<name>gpdac_ch_b_sel</name>
<lsb>20</lsb>
<msb>23</msb>
</field>
<field>
<name>gpdac_ch_a_sel</name>
<lsb>16</lsb>
<msb>19</msb>
</field>
<field>
<name>gpdac_mode</name>
<lsb>8</lsb>
<msb>10</msb>
</field>
<field>
<name>dsm_mode</name>
<lsb>4</lsb>
<msb>5</msb>
</field>
<field>
<name>gpdac_en2</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>gpdac_en</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>gpdac_dma_config</name>
<description>gpdac_dma_config.</description>
<addressOffset>0x44</addressOffset>
<fields>
<field>
<name>gpdac_dma_format</name>
<lsb>4</lsb>
<msb>5</msb>
</field>
<field>
<name>gpdac_dma_tx_en</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>gpdac_dma_wdata</name>
<description>gpdac_dma_wdata.</description>
<addressOffset>0x48</addressOffset>
<fields>
<field>
<name>gpdac_dma_wdata</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>gpdac_tx_fifo_status</name>
<description>gpdac_tx_fifo_status.</description>
<addressOffset>0x4C</addressOffset>
<fields>
<field>
<name>TxFifoWrPtr</name>
<lsb>8</lsb>
<msb>9</msb>
</field>
<field>
<name>TxFifoRdPtr</name>
<lsb>4</lsb>
<msb>6</msb>
</field>
<field>
<name>tx_cs</name>
<lsb>2</lsb>
<msb>3</msb>
</field>
<field>
<name>tx_fifo_full</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>tx_fifo_empty</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>sec_dbg</name>
<description>sec_dbg.</description>
<baseAddress>0x40003000</baseAddress>
<groupName>sec_dbg</groupName>
<size>32</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>sd_chip_id_low</name>
<description>sd_chip_id_low.</description>
<addressOffset>0x0</addressOffset>
<fields>
<field>
<name>sd_chip_id_low</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sd_chip_id_high</name>
<description>sd_chip_id_high.</description>
<addressOffset>0x4</addressOffset>
<fields>
<field>
<name>sd_chip_id_high</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sd_wifi_mac_low</name>
<description>sd_wifi_mac_low.</description>
<addressOffset>0x8</addressOffset>
<fields>
<field>
<name>sd_wifi_mac_low</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sd_wifi_mac_high</name>
<description>sd_wifi_mac_high.</description>
<addressOffset>0xC</addressOffset>
<fields>
<field>
<name>sd_wifi_mac_high</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sd_dbg_pwd_low</name>
<description>sd_dbg_pwd_low.</description>
<addressOffset>0x10</addressOffset>
<fields>
<field>
<name>sd_dbg_pwd_low</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sd_dbg_pwd_high</name>
<description>sd_dbg_pwd_high.</description>
<addressOffset>0x14</addressOffset>
<fields>
<field>
<name>sd_dbg_pwd_high</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sd_status</name>
<description>sd_status.</description>
<addressOffset>0x18</addressOffset>
<fields>
<field>
<name>sd_dbg_ena</name>
<lsb>28</lsb>
<msb>31</msb>
</field>
<field>
<name>sd_dbg_mode</name>
<lsb>24</lsb>
<msb>27</msb>
</field>
<field>
<name>sd_dbg_pwd_cnt</name>
<lsb>4</lsb>
<msb>23</msb>
</field>
<field>
<name>sd_dbg_cci_clk_sel</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>sd_dbg_cci_read_en</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>sd_dbg_pwd_trig</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>sd_dbg_pwd_busy</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>sd_dbg_reserved</name>
<description>sd_dbg_reserved.</description>
<addressOffset>0x1C</addressOffset>
<fields>
<field>
<name>sd_dbg_reserved</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>sec_eng</name>
<description>sec_eng.</description>
<baseAddress>0x40004000</baseAddress>
<groupName>sec_eng</groupName>
<size>32</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>se_sha_0_ctrl</name>
<description>se_sha_0_ctrl.</description>
<addressOffset>0x0</addressOffset>
<fields>
<field>
<name>se_sha_0_msg_len</name>
<lsb>16</lsb>
<msb>31</msb>
</field>
<field>
<name>se_sha_0_link_mode</name>
<lsb>15</lsb>
<msb>15</msb>
</field>
<field>
<name>se_sha_0_int_mask</name>
<lsb>11</lsb>
<msb>11</msb>
</field>
<field>
<name>se_sha_0_int_set_1t</name>
<lsb>10</lsb>
<msb>10</msb>
</field>
<field>
<name>se_sha_0_int_clr_1t</name>
<lsb>9</lsb>
<msb>9</msb>
</field>
<field>
<name>se_sha_0_int</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>se_sha_0_hash_sel</name>
<lsb>6</lsb>
<msb>6</msb>
</field>
<field>
<name>se_sha_0_en</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>se_sha_0_mode</name>
<lsb>2</lsb>
<msb>4</msb>
</field>
<field>
<name>se_sha_0_trig_1t</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>se_sha_0_busy</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>se_sha_0_msa</name>
<description>se_sha_0_msa.</description>
<addressOffset>0x4</addressOffset>
<fields>
<field>
<name>se_sha_0_msa</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_sha_0_status</name>
<description>se_sha_0_status.</description>
<addressOffset>0x8</addressOffset>
<fields>
<field>
<name>se_sha_0_status</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_sha_0_endian</name>
<description>se_sha_0_endian.</description>
<addressOffset>0xC</addressOffset>
<fields>
<field>
<name>se_sha_0_dout_endian</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>se_sha_0_hash_l_0</name>
<description>se_sha_0_hash_l_0.</description>
<addressOffset>0x10</addressOffset>
<fields>
<field>
<name>se_sha_0_hash_l_0</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_sha_0_hash_l_1</name>
<description>se_sha_0_hash_l_1.</description>
<addressOffset>0x14</addressOffset>
<fields>
<field>
<name>se_sha_0_hash_l_1</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_sha_0_hash_l_2</name>
<description>se_sha_0_hash_l_2.</description>
<addressOffset>0x18</addressOffset>
<fields>
<field>
<name>se_sha_0_hash_l_2</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_sha_0_hash_l_3</name>
<description>se_sha_0_hash_l_3.</description>
<addressOffset>0x1C</addressOffset>
<fields>
<field>
<name>se_sha_0_hash_l_3</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_sha_0_hash_l_4</name>
<description>se_sha_0_hash_l_4.</description>
<addressOffset>0x20</addressOffset>
<fields>
<field>
<name>se_sha_0_hash_l_4</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_sha_0_hash_l_5</name>
<description>se_sha_0_hash_l_5.</description>
<addressOffset>0x24</addressOffset>
<fields>
<field>
<name>se_sha_0_hash_l_5</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_sha_0_hash_l_6</name>
<description>se_sha_0_hash_l_6.</description>
<addressOffset>0x28</addressOffset>
<fields>
<field>
<name>se_sha_0_hash_l_6</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_sha_0_hash_l_7</name>
<description>se_sha_0_hash_l_7.</description>
<addressOffset>0x2C</addressOffset>
<fields>
<field>
<name>se_sha_0_hash_l_7</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_sha_0_hash_h_0</name>
<description>se_sha_0_hash_h_0.</description>
<addressOffset>0x30</addressOffset>
<fields>
<field>
<name>se_sha_0_hash_h_0</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_sha_0_hash_h_1</name>
<description>se_sha_0_hash_h_1.</description>
<addressOffset>0x34</addressOffset>
<fields>
<field>
<name>se_sha_0_hash_h_1</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_sha_0_hash_h_2</name>
<description>se_sha_0_hash_h_2.</description>
<addressOffset>0x38</addressOffset>
<fields>
<field>
<name>se_sha_0_hash_h_2</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_sha_0_hash_h_3</name>
<description>se_sha_0_hash_h_3.</description>
<addressOffset>0x3C</addressOffset>
<fields>
<field>
<name>se_sha_0_hash_h_3</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_sha_0_hash_h_4</name>
<description>se_sha_0_hash_h_4.</description>
<addressOffset>0x40</addressOffset>
<fields>
<field>
<name>se_sha_0_hash_h_4</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_sha_0_hash_h_5</name>
<description>se_sha_0_hash_h_5.</description>
<addressOffset>0x44</addressOffset>
<fields>
<field>
<name>se_sha_0_hash_h_5</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_sha_0_hash_h_6</name>
<description>se_sha_0_hash_h_6.</description>
<addressOffset>0x48</addressOffset>
<fields>
<field>
<name>se_sha_0_hash_h_6</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_sha_0_hash_h_7</name>
<description>se_sha_0_hash_h_7.</description>
<addressOffset>0x4C</addressOffset>
<fields>
<field>
<name>se_sha_0_hash_h_7</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_sha_0_link</name>
<description>se_sha_0_link.</description>
<addressOffset>0x50</addressOffset>
<fields>
<field>
<name>se_sha_0_lca</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_sha_0_ctrl_prot</name>
<description>se_sha_0_ctrl_prot.</description>
<addressOffset>0xFC</addressOffset>
<fields>
<field>
<name>se_sha_id1_en</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>se_sha_id0_en</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>se_sha_prot_en</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>se_aes_0_ctrl</name>
<description>se_aes_0_ctrl.</description>
<addressOffset>0x100</addressOffset>
<fields>
<field>
<name>se_aes_0_msg_len</name>
<lsb>16</lsb>
<msb>31</msb>
</field>
<field>
<name>se_aes_0_link_mode</name>
<lsb>15</lsb>
<msb>15</msb>
</field>
<field>
<name>se_aes_0_iv_sel</name>
<lsb>14</lsb>
<msb>14</msb>
</field>
<field>
<name>se_aes_0_block_mode</name>
<lsb>12</lsb>
<msb>13</msb>
</field>
<field>
<name>se_aes_0_int_mask</name>
<lsb>11</lsb>
<msb>11</msb>
</field>
<field>
<name>se_aes_0_int_set_1t</name>
<lsb>10</lsb>
<msb>10</msb>
</field>
<field>
<name>se_aes_0_int_clr_1t</name>
<lsb>9</lsb>
<msb>9</msb>
</field>
<field>
<name>se_aes_0_int</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>se_aes_0_hw_key_en</name>
<lsb>7</lsb>
<msb>7</msb>
</field>
<field>
<name>se_aes_0_dec_key_sel</name>
<lsb>6</lsb>
<msb>6</msb>
</field>
<field>
<name>se_aes_0_dec_en</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>se_aes_0_mode</name>
<lsb>3</lsb>
<msb>4</msb>
</field>
<field>
<name>se_aes_0_en</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>se_aes_0_trig_1t</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>se_aes_0_busy</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>se_aes_0_msa</name>
<description>se_aes_0_msa.</description>
<addressOffset>0x104</addressOffset>
<fields>
<field>
<name>se_aes_0_msa</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_aes_0_mda</name>
<description>se_aes_0_mda.</description>
<addressOffset>0x108</addressOffset>
<fields>
<field>
<name>se_aes_0_mda</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_aes_0_status</name>
<description>se_aes_0_status.</description>
<addressOffset>0x10C</addressOffset>
<fields>
<field>
<name>se_aes_0_status</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_aes_0_iv_0</name>
<description>se_aes_0_iv_0.</description>
<addressOffset>0x110</addressOffset>
<fields>
<field>
<name>se_aes_0_iv_0</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_aes_0_iv_1</name>
<description>se_aes_0_iv_1.</description>
<addressOffset>0x114</addressOffset>
<fields>
<field>
<name>se_aes_0_iv_1</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_aes_0_iv_2</name>
<description>se_aes_0_iv_2.</description>
<addressOffset>0x118</addressOffset>
<fields>
<field>
<name>se_aes_0_iv_2</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_aes_0_iv_3</name>
<description>se_aes_0_iv_3.</description>
<addressOffset>0x11C</addressOffset>
<fields>
<field>
<name>se_aes_0_iv_3</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_aes_0_key_0</name>
<description>se_aes_0_key_0.</description>
<addressOffset>0x120</addressOffset>
<fields>
<field>
<name>se_aes_0_key_0</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_aes_0_key_1</name>
<description>se_aes_0_key_1.</description>
<addressOffset>0x124</addressOffset>
<fields>
<field>
<name>se_aes_0_key_1</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_aes_0_key_2</name>
<description>se_aes_0_key_2.</description>
<addressOffset>0x128</addressOffset>
<fields>
<field>
<name>se_aes_0_key_2</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_aes_0_key_3</name>
<description>se_aes_0_key_3.</description>
<addressOffset>0x12C</addressOffset>
<fields>
<field>
<name>se_aes_0_key_3</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_aes_0_key_4</name>
<description>se_aes_0_key_4.</description>
<addressOffset>0x130</addressOffset>
<fields>
<field>
<name>se_aes_0_key_4</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_aes_0_key_5</name>
<description>se_aes_0_key_5.</description>
<addressOffset>0x134</addressOffset>
<fields>
<field>
<name>se_aes_0_key_5</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_aes_0_key_6</name>
<description>se_aes_0_key_6.</description>
<addressOffset>0x138</addressOffset>
<fields>
<field>
<name>se_aes_0_key_6</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_aes_0_key_7</name>
<description>se_aes_0_key_7.</description>
<addressOffset>0x13C</addressOffset>
<fields>
<field>
<name>se_aes_0_key_7</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_aes_0_key_sel_0</name>
<description>se_aes_0_key_sel_0.</description>
<addressOffset>0x140</addressOffset>
<fields>
<field>
<name>se_aes_0_key_sel_0</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>se_aes_0_key_sel_1</name>
<description>se_aes_0_key_sel_1.</description>
<addressOffset>0x144</addressOffset>
<fields>
<field>
<name>se_aes_0_key_sel_1</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>se_aes_0_endian</name>
<description>se_aes_0_endian.</description>
<addressOffset>0x148</addressOffset>
<fields>
<field>
<name>se_aes_0_ctr_len</name>
<lsb>30</lsb>
<msb>31</msb>
</field>
<field>
<name>se_aes_0_iv_endian</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>se_aes_0_key_endian</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>se_aes_0_din_endian</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>se_aes_0_dout_endian</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>se_aes_0_sboot</name>
<description>se_aes_0_sboot.</description>
<addressOffset>0x14C</addressOffset>
<fields>
<field>
<name>se_aes_0_sboot_key_sel</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>se_aes_0_link</name>
<description>se_aes_0_link.</description>
<addressOffset>0x150</addressOffset>
<fields>
<field>
<name>se_aes_0_lca</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_aes_0_ctrl_prot</name>
<description>se_aes_0_ctrl_prot.</description>
<addressOffset>0x1FC</addressOffset>
<fields>
<field>
<name>se_aes_id1_en</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>se_aes_id0_en</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>se_aes_prot_en</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>se_trng_0_ctrl_0</name>
<description>se_trng_0_ctrl_0.</description>
<addressOffset>0x200</addressOffset>
<fields>
<field>
<name>se_trng_0_manual_en</name>
<lsb>15</lsb>
<msb>15</msb>
</field>
<field>
<name>se_trng_0_manual_reseed</name>
<lsb>14</lsb>
<msb>14</msb>
</field>
<field>
<name>se_trng_0_manual_fun_sel</name>
<lsb>13</lsb>
<msb>13</msb>
</field>
<field>
<name>se_trng_0_int_mask</name>
<lsb>11</lsb>
<msb>11</msb>
</field>
<field>
<name>se_trng_0_int_set_1t</name>
<lsb>10</lsb>
<msb>10</msb>
</field>
<field>
<name>se_trng_0_int_clr_1t</name>
<lsb>9</lsb>
<msb>9</msb>
</field>
<field>
<name>se_trng_0_int</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>se_trng_0_ht_error</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>se_trng_0_dout_clr_1t</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>se_trng_0_en</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>se_trng_0_trig_1t</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>se_trng_0_busy</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>se_trng_0_status</name>
<description>se_trng_0_status.</description>
<addressOffset>0x204</addressOffset>
<fields>
<field>
<name>se_trng_0_status</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_trng_0_dout_0</name>
<description>se_trng_0_dout_0.</description>
<addressOffset>0x208</addressOffset>
<fields>
<field>
<name>se_trng_0_dout_0</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_trng_0_dout_1</name>
<description>se_trng_0_dout_1.</description>
<addressOffset>0x20C</addressOffset>
<fields>
<field>
<name>se_trng_0_dout_1</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_trng_0_dout_2</name>
<description>se_trng_0_dout_2.</description>
<addressOffset>0x210</addressOffset>
<fields>
<field>
<name>se_trng_0_dout_2</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_trng_0_dout_3</name>
<description>se_trng_0_dout_3.</description>
<addressOffset>0x214</addressOffset>
<fields>
<field>
<name>se_trng_0_dout_3</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_trng_0_dout_4</name>
<description>se_trng_0_dout_4.</description>
<addressOffset>0x218</addressOffset>
<fields>
<field>
<name>se_trng_0_dout_4</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_trng_0_dout_5</name>
<description>se_trng_0_dout_5.</description>
<addressOffset>0x21C</addressOffset>
<fields>
<field>
<name>se_trng_0_dout_5</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_trng_0_dout_6</name>
<description>se_trng_0_dout_6.</description>
<addressOffset>0x220</addressOffset>
<fields>
<field>
<name>se_trng_0_dout_6</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_trng_0_dout_7</name>
<description>se_trng_0_dout_7.</description>
<addressOffset>0x224</addressOffset>
<fields>
<field>
<name>se_trng_0_dout_7</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_trng_0_test</name>
<description>se_trng_0_test.</description>
<addressOffset>0x228</addressOffset>
<fields>
<field>
<name>se_trng_0_ht_alarm_n</name>
<lsb>4</lsb>
<msb>11</msb>
</field>
<field>
<name>se_trng_0_ht_dis</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>se_trng_0_cp_bypass</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>se_trng_0_cp_test_en</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>se_trng_0_test_en</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>se_trng_0_ctrl_1</name>
<description>se_trng_0_ctrl_1.</description>
<addressOffset>0x22C</addressOffset>
<fields>
<field>
<name>se_trng_0_reseed_n_lsb</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_trng_0_ctrl_2</name>
<description>se_trng_0_ctrl_2.</description>
<addressOffset>0x230</addressOffset>
<fields>
<field>
<name>se_trng_0_reseed_n_msb</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>se_trng_0_ctrl_3</name>
<description>se_trng_0_ctrl_3.</description>
<addressOffset>0x234</addressOffset>
<fields>
<field>
<name>se_trng_0_rosc_en</name>
<lsb>31</lsb>
<msb>31</msb>
</field>
<field>
<name>se_trng_0_ht_od_en</name>
<lsb>26</lsb>
<msb>26</msb>
</field>
<field>
<name>se_trng_0_ht_apt_c</name>
<lsb>16</lsb>
<msb>25</msb>
</field>
<field>
<name>se_trng_0_ht_rct_c</name>
<lsb>8</lsb>
<msb>15</msb>
</field>
<field>
<name>se_trng_0_cp_ratio</name>
<lsb>0</lsb>
<msb>7</msb>
</field>
</fields>
</register>
<register>
<name>se_trng_0_test_out_0</name>
<description>se_trng_0_test_out_0.</description>
<addressOffset>0x240</addressOffset>
<fields>
<field>
<name>se_trng_0_test_out_0</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_trng_0_test_out_1</name>
<description>se_trng_0_test_out_1.</description>
<addressOffset>0x244</addressOffset>
<fields>
<field>
<name>se_trng_0_test_out_1</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_trng_0_test_out_2</name>
<description>se_trng_0_test_out_2.</description>
<addressOffset>0x248</addressOffset>
<fields>
<field>
<name>se_trng_0_test_out_2</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_trng_0_test_out_3</name>
<description>se_trng_0_test_out_3.</description>
<addressOffset>0x24C</addressOffset>
<fields>
<field>
<name>se_trng_0_test_out_3</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_trng_0_ctrl_prot</name>
<description>se_trng_0_ctrl_prot.</description>
<addressOffset>0x2FC</addressOffset>
<fields>
<field>
<name>se_trng_id1_en</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>se_trng_id0_en</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>se_trng_prot_en</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>se_pka_0_ctrl_0</name>
<description>se_pka_0_ctrl_0.</description>
<addressOffset>0x300</addressOffset>
<fields>
<field>
<name>se_pka_0_status</name>
<lsb>17</lsb>
<msb>31</msb>
</field>
<field>
<name>se_pka_0_status_clr_1t</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>se_pka_0_ram_clr_md</name>
<lsb>13</lsb>
<msb>13</msb>
</field>
<field>
<name>se_pka_0_endian</name>
<lsb>12</lsb>
<msb>12</msb>
</field>
<field>
<name>se_pka_0_int_mask</name>
<lsb>11</lsb>
<msb>11</msb>
</field>
<field>
<name>se_pka_0_int_set</name>
<lsb>10</lsb>
<msb>10</msb>
</field>
<field>
<name>se_pka_0_int_clr_1t</name>
<lsb>9</lsb>
<msb>9</msb>
</field>
<field>
<name>se_pka_0_int</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>se_pka_0_prot_md</name>
<lsb>4</lsb>
<msb>7</msb>
</field>
<field>
<name>se_pka_0_en</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>se_pka_0_busy</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>se_pka_0_done_clr_1t</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>se_pka_0_done</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>se_pka_0_seed</name>
<description>se_pka_0_seed.</description>
<addressOffset>0x30C</addressOffset>
<fields>
<field>
<name>se_pka_0_seed</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_pka_0_ctrl_1</name>
<description>se_pka_0_ctrl_1.</description>
<addressOffset>0x310</addressOffset>
<fields>
<field>
<name>se_pka_0_hbypass</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>se_pka_0_hburst</name>
<lsb>0</lsb>
<msb>2</msb>
</field>
</fields>
</register>
<register>
<name>se_pka_0_rw</name>
<description>se_pka_0_rw.</description>
<addressOffset>0x340</addressOffset>
<fields/>
</register>
<register>
<name>se_pka_0_rw_burst</name>
<description>se_pka_0_rw_burst.</description>
<addressOffset>0x360</addressOffset>
<fields/>
</register>
<register>
<name>se_pka_0_ctrl_prot</name>
<description>se_pka_0_ctrl_prot.</description>
<addressOffset>0x3FC</addressOffset>
<fields>
<field>
<name>se_pka_id1_en</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>se_pka_id0_en</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>se_pka_prot_en</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>se_cdet_0_ctrl_0</name>
<description>se_cdet_0_ctrl_0.</description>
<addressOffset>0x400</addressOffset>
<fields>
<field>
<name>se_cdet_0_g_loop_min</name>
<lsb>24</lsb>
<msb>31</msb>
</field>
<field>
<name>se_cdet_0_g_loop_max</name>
<lsb>16</lsb>
<msb>23</msb>
</field>
<field>
<name>se_cdet_0_status</name>
<lsb>2</lsb>
<msb>15</msb>
</field>
<field>
<name>se_cdet_0_error</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>se_cdet_0_en</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>se_cdet_0_ctrl_1</name>
<description>se_cdet_0_ctrl_1.</description>
<addressOffset>0x404</addressOffset>
<fields>
<field>
<name>se_cdet_0_g_slp_n</name>
<lsb>16</lsb>
<msb>23</msb>
</field>
<field>
<name>se_cdet_0_t_dly_n</name>
<lsb>8</lsb>
<msb>15</msb>
</field>
<field>
<name>se_cdet_0_t_loop_n</name>
<lsb>0</lsb>
<msb>7</msb>
</field>
</fields>
</register>
<register>
<name>se_cdet_0_ctrl_prot</name>
<description>se_cdet_0_ctrl_prot.</description>
<addressOffset>0x4FC</addressOffset>
<fields>
<field>
<name>se_cdet_id1_en</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>se_cdet_id0_en</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>se_cdet_prot_en</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>se_gmac_0_ctrl_0</name>
<description>se_gmac_0_ctrl_0.</description>
<addressOffset>0x500</addressOffset>
<fields>
<field>
<name>se_gmac_0_x_endian</name>
<lsb>14</lsb>
<msb>14</msb>
</field>
<field>
<name>se_gmac_0_h_endian</name>
<lsb>13</lsb>
<msb>13</msb>
</field>
<field>
<name>se_gmac_0_t_endian</name>
<lsb>12</lsb>
<msb>12</msb>
</field>
<field>
<name>se_gmac_0_int_mask</name>
<lsb>11</lsb>
<msb>11</msb>
</field>
<field>
<name>se_gmac_0_int_set_1t</name>
<lsb>10</lsb>
<msb>10</msb>
</field>
<field>
<name>se_gmac_0_int_clr_1t</name>
<lsb>9</lsb>
<msb>9</msb>
</field>
<field>
<name>se_gmac_0_int</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>se_gmac_0_en</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>se_gmac_0_trig_1t</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>se_gmac_0_busy</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>se_gmac_0_lca</name>
<description>se_gmac_0_lca.</description>
<addressOffset>0x504</addressOffset>
<fields>
<field>
<name>se_gmac_0_lca</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_gmac_0_status</name>
<description>se_gmac_0_status.</description>
<addressOffset>0x508</addressOffset>
<fields>
<field>
<name>se_gmac_0_status</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_gmac_0_ctrl_prot</name>
<description>se_gmac_0_ctrl_prot.</description>
<addressOffset>0x5FC</addressOffset>
<fields>
<field>
<name>se_gmac_id1_en</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>se_gmac_id0_en</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>se_gmac_prot_en</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>se_ctrl_prot_rd</name>
<description>se_ctrl_prot_rd.</description>
<addressOffset>0xF00</addressOffset>
<fields>
<field>
<name>se_dbg_dis</name>
<lsb>31</lsb>
<msb>31</msb>
</field>
<field>
<name>se_gmac_id1_en_rd</name>
<lsb>22</lsb>
<msb>22</msb>
</field>
<field>
<name>se_gmac_id0_en_rd</name>
<lsb>21</lsb>
<msb>21</msb>
</field>
<field>
<name>se_gmac_prot_en_rd</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>se_cdet_id1_en_rd</name>
<lsb>18</lsb>
<msb>18</msb>
</field>
<field>
<name>se_cdet_id0_en_rd</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>se_cdet_prot_en_rd</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>se_pka_id1_en_rd</name>
<lsb>14</lsb>
<msb>14</msb>
</field>
<field>
<name>se_pka_id0_en_rd</name>
<lsb>13</lsb>
<msb>13</msb>
</field>
<field>
<name>se_pka_prot_en_rd</name>
<lsb>12</lsb>
<msb>12</msb>
</field>
<field>
<name>se_trng_id1_en_rd</name>
<lsb>10</lsb>
<msb>10</msb>
</field>
<field>
<name>se_trng_id0_en_rd</name>
<lsb>9</lsb>
<msb>9</msb>
</field>
<field>
<name>se_trng_prot_en_rd</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>se_aes_id1_en_rd</name>
<lsb>6</lsb>
<msb>6</msb>
</field>
<field>
<name>se_aes_id0_en_rd</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>se_aes_prot_en_rd</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>se_sha_id1_en_rd</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>se_sha_id0_en_rd</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>se_sha_prot_en_rd</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>se_ctrl_reserved_0</name>
<description>se_ctrl_reserved_0.</description>
<addressOffset>0xF04</addressOffset>
<fields>
<field>
<name>se_ctrl_reserved_0</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_ctrl_reserved_1</name>
<description>se_ctrl_reserved_1.</description>
<addressOffset>0xF08</addressOffset>
<fields>
<field>
<name>se_ctrl_reserved_1</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>se_ctrl_reserved_2</name>
<description>se_ctrl_reserved_2.</description>
<addressOffset>0xF0C</addressOffset>
<fields>
<field>
<name>se_ctrl_reserved_2</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>tzc_sec</name>
<description>tzc_sec.</description>
<baseAddress>0x40005000</baseAddress>
<groupName>tzc_sec</groupName>
<size>32</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>tzc_rom_ctrl</name>
<description>tzc_rom_ctrl.</description>
<addressOffset>0x40</addressOffset>
<fields>
<field>
<name>tzc_sboot_done</name>
<lsb>28</lsb>
<msb>31</msb>
</field>
<field>
<name>tzc_rom1_r1_lock</name>
<lsb>27</lsb>
<msb>27</msb>
</field>
<field>
<name>tzc_rom1_r0_lock</name>
<lsb>26</lsb>
<msb>26</msb>
</field>
<field>
<name>tzc_rom0_r1_lock</name>
<lsb>25</lsb>
<msb>25</msb>
</field>
<field>
<name>tzc_rom0_r0_lock</name>
<lsb>24</lsb>
<msb>24</msb>
</field>
<field>
<name>tzc_rom1_r1_en</name>
<lsb>19</lsb>
<msb>19</msb>
</field>
<field>
<name>tzc_rom1_r0_en</name>
<lsb>18</lsb>
<msb>18</msb>
</field>
<field>
<name>tzc_rom0_r1_en</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>tzc_rom0_r0_en</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>tzc_rom1_r1_id1_en</name>
<lsb>11</lsb>
<msb>11</msb>
</field>
<field>
<name>tzc_rom1_r0_id1_en</name>
<lsb>10</lsb>
<msb>10</msb>
</field>
<field>
<name>tzc_rom0_r1_id1_en</name>
<lsb>9</lsb>
<msb>9</msb>
</field>
<field>
<name>tzc_rom0_r0_id1_en</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>tzc_rom1_r1_id0_en</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>tzc_rom1_r0_id0_en</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>tzc_rom0_r1_id0_en</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>tzc_rom0_r0_id0_en</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>tzc_rom0_r0</name>
<description>tzc_rom0_r0.</description>
<addressOffset>0x44</addressOffset>
<fields>
<field>
<name>tzc_rom0_r0_start</name>
<lsb>16</lsb>
<msb>31</msb>
</field>
<field>
<name>tzc_rom0_r0_end</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>tzc_rom0_r1</name>
<description>tzc_rom0_r1.</description>
<addressOffset>0x48</addressOffset>
<fields>
<field>
<name>tzc_rom0_r1_start</name>
<lsb>16</lsb>
<msb>31</msb>
</field>
<field>
<name>tzc_rom0_r1_end</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>tzc_rom1_r0</name>
<description>tzc_rom1_r0.</description>
<addressOffset>0x4C</addressOffset>
<fields>
<field>
<name>tzc_rom1_r0_start</name>
<lsb>16</lsb>
<msb>31</msb>
</field>
<field>
<name>tzc_rom1_r0_end</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>tzc_rom1_r1</name>
<description>tzc_rom1_r1.</description>
<addressOffset>0x50</addressOffset>
<fields>
<field>
<name>tzc_rom1_r1_start</name>
<lsb>16</lsb>
<msb>31</msb>
</field>
<field>
<name>tzc_rom1_r1_end</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>tzc_nsec</name>
<description>tzc_nsec.</description>
<baseAddress>0x40006000</baseAddress>
<groupName>tzc_nsec</groupName>
<size>32</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>tzc_rom_ctrl</name>
<description>tzc_rom_ctrl.</description>
<addressOffset>0x40</addressOffset>
<fields>
<field>
<name>tzc_sboot_done</name>
<lsb>28</lsb>
<msb>31</msb>
</field>
<field>
<name>tzc_rom1_r1_lock</name>
<lsb>27</lsb>
<msb>27</msb>
</field>
<field>
<name>tzc_rom1_r0_lock</name>
<lsb>26</lsb>
<msb>26</msb>
</field>
<field>
<name>tzc_rom0_r1_lock</name>
<lsb>25</lsb>
<msb>25</msb>
</field>
<field>
<name>tzc_rom0_r0_lock</name>
<lsb>24</lsb>
<msb>24</msb>
</field>
<field>
<name>tzc_rom1_r1_en</name>
<lsb>19</lsb>
<msb>19</msb>
</field>
<field>
<name>tzc_rom1_r0_en</name>
<lsb>18</lsb>
<msb>18</msb>
</field>
<field>
<name>tzc_rom0_r1_en</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>tzc_rom0_r0_en</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>tzc_rom1_r1_id1_en</name>
<lsb>11</lsb>
<msb>11</msb>
</field>
<field>
<name>tzc_rom1_r0_id1_en</name>
<lsb>10</lsb>
<msb>10</msb>
</field>
<field>
<name>tzc_rom0_r1_id1_en</name>
<lsb>9</lsb>
<msb>9</msb>
</field>
<field>
<name>tzc_rom0_r0_id1_en</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>tzc_rom1_r1_id0_en</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>tzc_rom1_r0_id0_en</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>tzc_rom0_r1_id0_en</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>tzc_rom0_r0_id0_en</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>tzc_rom0_r0</name>
<description>tzc_rom0_r0.</description>
<addressOffset>0x44</addressOffset>
<fields>
<field>
<name>tzc_rom0_r0_start</name>
<lsb>16</lsb>
<msb>31</msb>
</field>
<field>
<name>tzc_rom0_r0_end</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>tzc_rom0_r1</name>
<description>tzc_rom0_r1.</description>
<addressOffset>0x48</addressOffset>
<fields>
<field>
<name>tzc_rom0_r1_start</name>
<lsb>16</lsb>
<msb>31</msb>
</field>
<field>
<name>tzc_rom0_r1_end</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>tzc_rom1_r0</name>
<description>tzc_rom1_r0.</description>
<addressOffset>0x4C</addressOffset>
<fields>
<field>
<name>tzc_rom1_r0_start</name>
<lsb>16</lsb>
<msb>31</msb>
</field>
<field>
<name>tzc_rom1_r0_end</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>tzc_rom1_r1</name>
<description>tzc_rom1_r1.</description>
<addressOffset>0x50</addressOffset>
<fields>
<field>
<name>tzc_rom1_r1_start</name>
<lsb>16</lsb>
<msb>31</msb>
</field>
<field>
<name>tzc_rom1_r1_end</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>ef_data_0</name>
<description>ef_data_0.</description>
<baseAddress>0x40007000</baseAddress>
<groupName>ef_data_0</groupName>
<size>32</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>ef_cfg_0</name>
<description>ef_cfg_0.</description>
<addressOffset>0x0</addressOffset>
<fields>
<field>
<name>ef_dbg_mode</name>
<lsb>28</lsb>
<msb>31</msb>
</field>
<field>
<name>ef_dbg_jtag_0_dis</name>
<lsb>26</lsb>
<msb>27</msb>
</field>
<field>
<name>ef_dbg_jtag_1_dis</name>
<lsb>24</lsb>
<msb>25</msb>
</field>
<field>
<name>ef_efuse_dbg_dis</name>
<lsb>23</lsb>
<msb>23</msb>
</field>
<field>
<name>ef_se_dbg_dis</name>
<lsb>22</lsb>
<msb>22</msb>
</field>
<field>
<name>ef_cpu_rst_dbg_dis</name>
<lsb>21</lsb>
<msb>21</msb>
</field>
<field>
<name>ef_cpu1_dis</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>ef_sf_dis</name>
<lsb>19</lsb>
<msb>19</msb>
</field>
<field>
<name>ef_cam_dis</name>
<lsb>18</lsb>
<msb>18</msb>
</field>
<field>
<name>ef_0_key_enc_en</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>ef_wifi_dis</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>ef_ble_dis</name>
<lsb>15</lsb>
<msb>15</msb>
</field>
<field>
<name>ef_sdu_dis</name>
<lsb>14</lsb>
<msb>14</msb>
</field>
<field>
<name>ef_sw_usage_1</name>
<lsb>12</lsb>
<msb>13</msb>
</field>
<field>
<name>ef_boot_sel</name>
<lsb>8</lsb>
<msb>11</msb>
</field>
<field>
<name>ef_cpu0_enc_en</name>
<lsb>7</lsb>
<msb>7</msb>
</field>
<field>
<name>ef_cpu1_enc_en</name>
<lsb>6</lsb>
<msb>6</msb>
</field>
<field>
<name>ef_sboot_en</name>
<lsb>4</lsb>
<msb>5</msb>
</field>
<field>
<name>ef_sboot_sign_mode</name>
<lsb>2</lsb>
<msb>3</msb>
</field>
<field>
<name>ef_sf_aes_mode</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>ef_dbg_pwd_low</name>
<description>ef_dbg_pwd_low.</description>
<addressOffset>0x4</addressOffset>
<fields>
<field>
<name>ef_dbg_pwd_low</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>ef_dbg_pwd_high</name>
<description>ef_dbg_pwd_high.</description>
<addressOffset>0x8</addressOffset>
<fields>
<field>
<name>ef_dbg_pwd_high</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>ef_ana_trim_0</name>
<description>ef_ana_trim_0.</description>
<addressOffset>0xC</addressOffset>
<fields>
<field>
<name>ef_ana_trim_0</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>ef_sw_usage_0</name>
<description>ef_sw_usage_0.</description>
<addressOffset>0x10</addressOffset>
<fields>
<field>
<name>ef_sw_usage_0</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>ef_wifi_mac_low</name>
<description>ef_wifi_mac_low.</description>
<addressOffset>0x14</addressOffset>
<fields>
<field>
<name>ef_wifi_mac_low</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>ef_wifi_mac_high</name>
<description>ef_wifi_mac_high.</description>
<addressOffset>0x18</addressOffset>
<fields>
<field>
<name>ef_wifi_mac_high</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>ef_key_slot_0_w0</name>
<description>ef_key_slot_0_w0.</description>
<addressOffset>0x1C</addressOffset>
<fields>
<field>
<name>ef_key_slot_0_w0</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>ef_key_slot_0_w1</name>
<description>ef_key_slot_0_w1.</description>
<addressOffset>0x20</addressOffset>
<fields>
<field>
<name>ef_key_slot_0_w1</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>ef_key_slot_0_w2</name>
<description>ef_key_slot_0_w2.</description>
<addressOffset>0x24</addressOffset>
<fields>
<field>
<name>ef_key_slot_0_w2</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>ef_key_slot_0_w3</name>
<description>ef_key_slot_0_w3.</description>
<addressOffset>0x28</addressOffset>
<fields>
<field>
<name>ef_key_slot_0_w3</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>ef_key_slot_1_w0</name>
<description>ef_key_slot_1_w0.</description>
<addressOffset>0x2C</addressOffset>
<fields>
<field>
<name>ef_key_slot_1_w0</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>ef_key_slot_1_w1</name>
<description>ef_key_slot_1_w1.</description>
<addressOffset>0x30</addressOffset>
<fields>
<field>
<name>ef_key_slot_1_w1</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>ef_key_slot_1_w2</name>
<description>ef_key_slot_1_w2.</description>
<addressOffset>0x34</addressOffset>
<fields>
<field>
<name>ef_key_slot_1_w2</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>ef_key_slot_1_w3</name>
<description>ef_key_slot_1_w3.</description>
<addressOffset>0x38</addressOffset>
<fields>
<field>
<name>ef_key_slot_1_w3</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>ef_key_slot_2_w0</name>
<description>ef_key_slot_2_w0.</description>
<addressOffset>0x3C</addressOffset>
<fields>
<field>
<name>ef_key_slot_2_w0</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>ef_key_slot_2_w1</name>
<description>ef_key_slot_2_w1.</description>
<addressOffset>0x40</addressOffset>
<fields>
<field>
<name>ef_key_slot_2_w1</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>ef_key_slot_2_w2</name>
<description>ef_key_slot_2_w2.</description>
<addressOffset>0x44</addressOffset>
<fields>
<field>
<name>ef_key_slot_2_w2</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>ef_key_slot_2_w3</name>
<description>ef_key_slot_2_w3.</description>
<addressOffset>0x48</addressOffset>
<fields>
<field>
<name>ef_key_slot_2_w3</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>ef_key_slot_3_w0</name>
<description>ef_key_slot_3_w0.</description>
<addressOffset>0x4C</addressOffset>
<fields>
<field>
<name>ef_key_slot_3_w0</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>ef_key_slot_3_w1</name>
<description>ef_key_slot_3_w1.</description>
<addressOffset>0x50</addressOffset>
<fields>
<field>
<name>ef_key_slot_3_w1</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>ef_key_slot_3_w2</name>
<description>ef_key_slot_3_w2.</description>
<addressOffset>0x54</addressOffset>
<fields>
<field>
<name>ef_key_slot_3_w2</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>ef_key_slot_3_w3</name>
<description>ef_key_slot_3_w3.</description>
<addressOffset>0x58</addressOffset>
<fields>
<field>
<name>ef_key_slot_3_w3</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>ef_key_slot_4_w0</name>
<description>ef_key_slot_4_w0.</description>
<addressOffset>0x5C</addressOffset>
<fields>
<field>
<name>ef_key_slot_4_w0</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>ef_key_slot_4_w1</name>
<description>ef_key_slot_4_w1.</description>
<addressOffset>0x60</addressOffset>
<fields>
<field>
<name>ef_key_slot_4_w1</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>ef_key_slot_4_w2</name>
<description>ef_key_slot_4_w2.</description>
<addressOffset>0x64</addressOffset>
<fields>
<field>
<name>ef_key_slot_4_w2</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>ef_key_slot_4_w3</name>
<description>ef_key_slot_4_w3.</description>
<addressOffset>0x68</addressOffset>
<fields>
<field>
<name>ef_key_slot_4_w3</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>ef_key_slot_5_w0</name>
<description>ef_key_slot_5_w0.</description>
<addressOffset>0x6C</addressOffset>
<fields>
<field>
<name>ef_key_slot_5_w0</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>ef_key_slot_5_w1</name>
<description>ef_key_slot_5_w1.</description>
<addressOffset>0x70</addressOffset>
<fields>
<field>
<name>ef_key_slot_5_w1</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>ef_key_slot_5_w2</name>
<description>ef_key_slot_5_w2.</description>
<addressOffset>0x74</addressOffset>
<fields>
<field>
<name>ef_key_slot_5_w2</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>ef_key_slot_5_w3</name>
<description>ef_key_slot_5_w3.</description>
<addressOffset>0x78</addressOffset>
<fields>
<field>
<name>ef_key_slot_5_w3</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>ef_data_0_lock</name>
<description>ef_data_0_lock.</description>
<addressOffset>0x7C</addressOffset>
<fields>
<field>
<name>rd_lock_key_slot_5</name>
<lsb>31</lsb>
<msb>31</msb>
</field>
<field>
<name>rd_lock_key_slot_4</name>
<lsb>30</lsb>
<msb>30</msb>
</field>
<field>
<name>rd_lock_key_slot_3</name>
<lsb>29</lsb>
<msb>29</msb>
</field>
<field>
<name>rd_lock_key_slot_2</name>
<lsb>28</lsb>
<msb>28</msb>
</field>
<field>
<name>rd_lock_key_slot_1</name>
<lsb>27</lsb>
<msb>27</msb>
</field>
<field>
<name>rd_lock_key_slot_0</name>
<lsb>26</lsb>
<msb>26</msb>
</field>
<field>
<name>rd_lock_dbg_pwd</name>
<lsb>25</lsb>
<msb>25</msb>
</field>
<field>
<name>wr_lock_key_slot_5_h</name>
<lsb>24</lsb>
<msb>24</msb>
</field>
<field>
<name>wr_lock_key_slot_4_h</name>
<lsb>23</lsb>
<msb>23</msb>
</field>
<field>
<name>wr_lock_key_slot_3</name>
<lsb>22</lsb>
<msb>22</msb>
</field>
<field>
<name>wr_lock_key_slot_2</name>
<lsb>21</lsb>
<msb>21</msb>
</field>
<field>
<name>wr_lock_key_slot_1</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>wr_lock_key_slot_0</name>
<lsb>19</lsb>
<msb>19</msb>
</field>
<field>
<name>wr_lock_wifi_mac</name>
<lsb>18</lsb>
<msb>18</msb>
</field>
<field>
<name>wr_lock_sw_usage_0</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>wr_lock_dbg_pwd</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>wr_lock_boot_mode</name>
<lsb>15</lsb>
<msb>15</msb>
</field>
<field>
<name>wr_lock_key_slot_5_l</name>
<lsb>14</lsb>
<msb>14</msb>
</field>
<field>
<name>wr_lock_key_slot_4_l</name>
<lsb>13</lsb>
<msb>13</msb>
</field>
<field>
<name>ef_ana_trim_1</name>
<lsb>0</lsb>
<msb>12</msb>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>ef_data_1</name>
<description>ef_data_1.</description>
<baseAddress>0x40007000</baseAddress>
<groupName>ef_data_1</groupName>
<size>32</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>reg_key_slot_6_w0</name>
<description>reg_key_slot_6_w0.</description>
<addressOffset>0x80</addressOffset>
<fields>
<field>
<name>reg_key_slot_6_w0</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>reg_key_slot_6_w1</name>
<description>reg_key_slot_6_w1.</description>
<addressOffset>0x84</addressOffset>
<fields>
<field>
<name>reg_key_slot_6_w1</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>reg_key_slot_6_w2</name>
<description>reg_key_slot_6_w2.</description>
<addressOffset>0x88</addressOffset>
<fields>
<field>
<name>reg_key_slot_6_w2</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>reg_key_slot_6_w3</name>
<description>reg_key_slot_6_w3.</description>
<addressOffset>0x8C</addressOffset>
<fields>
<field>
<name>reg_key_slot_6_w3</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>reg_key_slot_7_w0</name>
<description>reg_key_slot_7_w0.</description>
<addressOffset>0x90</addressOffset>
<fields>
<field>
<name>reg_key_slot_7_w0</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>reg_key_slot_7_w1</name>
<description>reg_key_slot_7_w1.</description>
<addressOffset>0x94</addressOffset>
<fields>
<field>
<name>reg_key_slot_7_w1</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>reg_key_slot_7_w2</name>
<description>reg_key_slot_7_w2.</description>
<addressOffset>0x98</addressOffset>
<fields>
<field>
<name>reg_key_slot_7_w2</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>reg_key_slot_7_w3</name>
<description>reg_key_slot_7_w3.</description>
<addressOffset>0x9C</addressOffset>
<fields>
<field>
<name>reg_key_slot_7_w3</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>reg_key_slot_8_w0</name>
<description>reg_key_slot_8_w0.</description>
<addressOffset>0xA0</addressOffset>
<fields>
<field>
<name>reg_key_slot_8_w0</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>reg_key_slot_8_w1</name>
<description>reg_key_slot_8_w1.</description>
<addressOffset>0xA4</addressOffset>
<fields>
<field>
<name>reg_key_slot_8_w1</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>reg_key_slot_8_w2</name>
<description>reg_key_slot_8_w2.</description>
<addressOffset>0xA8</addressOffset>
<fields>
<field>
<name>reg_key_slot_8_w2</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>reg_key_slot_8_w3</name>
<description>reg_key_slot_8_w3.</description>
<addressOffset>0xAC</addressOffset>
<fields>
<field>
<name>reg_key_slot_8_w3</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>reg_key_slot_9_w0</name>
<description>reg_key_slot_9_w0.</description>
<addressOffset>0xB0</addressOffset>
<fields>
<field>
<name>reg_key_slot_9_w0</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>reg_key_slot_9_w1</name>
<description>reg_key_slot_9_w1.</description>
<addressOffset>0xB4</addressOffset>
<fields>
<field>
<name>reg_key_slot_9_w1</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>reg_key_slot_9_w2</name>
<description>reg_key_slot_9_w2.</description>
<addressOffset>0xB8</addressOffset>
<fields>
<field>
<name>reg_key_slot_9_w2</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>reg_key_slot_9_w3</name>
<description>reg_key_slot_9_w3.</description>
<addressOffset>0xBC</addressOffset>
<fields>
<field>
<name>reg_key_slot_9_w3</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>reg_key_slot_10_w0</name>
<description>reg_key_slot_10_w0.</description>
<addressOffset>0xC0</addressOffset>
<fields/>
</register>
<register>
<name>reg_key_slot_10_w1</name>
<description>reg_key_slot_10_w1.</description>
<addressOffset>0xC4</addressOffset>
<fields/>
</register>
<register>
<name>reg_key_slot_10_w2</name>
<description>reg_key_slot_10_w2.</description>
<addressOffset>0xC8</addressOffset>
<fields/>
</register>
<register>
<name>reg_key_slot_10_w3</name>
<description>reg_key_slot_10_w3.</description>
<addressOffset>0xCC</addressOffset>
<fields/>
</register>
<register>
<name>reg_key_slot_11_w0</name>
<description>reg_key_slot_11_w0.</description>
<addressOffset>0xD0</addressOffset>
<fields/>
</register>
<register>
<name>reg_key_slot_11_w1</name>
<description>reg_key_slot_11_w1.</description>
<addressOffset>0xD4</addressOffset>
<fields/>
</register>
<register>
<name>reg_key_slot_11_w2</name>
<description>reg_key_slot_11_w2.</description>
<addressOffset>0xD8</addressOffset>
<fields/>
</register>
<register>
<name>reg_key_slot_11_w3</name>
<description>reg_key_slot_11_w3.</description>
<addressOffset>0xDC</addressOffset>
<fields/>
</register>
<register>
<name>reg_data_1_lock</name>
<description>reg_data_1_lock.</description>
<addressOffset>0xE0</addressOffset>
<fields>
<field>
<name>rd_lock_key_slot_9</name>
<lsb>29</lsb>
<msb>29</msb>
</field>
<field>
<name>rd_lock_key_slot_8</name>
<lsb>28</lsb>
<msb>28</msb>
</field>
<field>
<name>rd_lock_key_slot_7</name>
<lsb>27</lsb>
<msb>27</msb>
</field>
<field>
<name>rd_lock_key_slot_6</name>
<lsb>26</lsb>
<msb>26</msb>
</field>
<field>
<name>RESERVED_25_16</name>
<lsb>16</lsb>
<msb>25</msb>
</field>
<field>
<name>wr_lock_key_slot_9</name>
<lsb>13</lsb>
<msb>13</msb>
</field>
<field>
<name>wr_lock_key_slot_8</name>
<lsb>12</lsb>
<msb>12</msb>
</field>
<field>
<name>wr_lock_key_slot_7</name>
<lsb>11</lsb>
<msb>11</msb>
</field>
<field>
<name>wr_lock_key_slot_6</name>
<lsb>10</lsb>
<msb>10</msb>
</field>
<field>
<name>RESERVED_9_0</name>
<lsb>0</lsb>
<msb>9</msb>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>ef_ctrl</name>
<description>ef_ctrl.</description>
<baseAddress>0x40007000</baseAddress>
<groupName>ef_ctrl</groupName>
<size>32</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>ef_if_ctrl_0</name>
<description>ef_if_ctrl_0.</description>
<addressOffset>0x800</addressOffset>
<fields>
<field>
<name>ef_if_prot_code_cyc</name>
<lsb>24</lsb>
<msb>31</msb>
</field>
<field>
<name>ef_if_0_int_set</name>
<lsb>22</lsb>
<msb>22</msb>
</field>
<field>
<name>ef_if_0_int_clr</name>
<lsb>21</lsb>
<msb>21</msb>
</field>
<field>
<name>ef_if_0_int</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>ef_if_cyc_modify_lock</name>
<lsb>19</lsb>
<msb>19</msb>
</field>
<field>
<name>ef_if_auto_rd_en</name>
<lsb>18</lsb>
<msb>18</msb>
</field>
<field>
<name>ef_clk_sahb_data_gate</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>ef_if_por_dig</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>ef_if_prot_code_ctrl</name>
<lsb>8</lsb>
<msb>15</msb>
</field>
<field>
<name>ef_clk_sahb_data_sel</name>
<lsb>7</lsb>
<msb>7</msb>
</field>
<field>
<name>ef_if_0_cyc_modify</name>
<lsb>6</lsb>
<msb>6</msb>
</field>
<field>
<name>ef_if_0_manual_en</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>ef_if_0_trig</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>ef_if_0_rw</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>ef_if_0_busy</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>ef_if_0_autoload_done</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>ef_if_0_autoload_p1_done</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>ef_if_cyc_0</name>
<description>ef_if_cyc_0.</description>
<addressOffset>0x804</addressOffset>
<fields>
<field>
<name>ef_if_cyc_pd_cs_s</name>
<lsb>24</lsb>
<msb>31</msb>
</field>
<field>
<name>ef_if_cyc_cs</name>
<lsb>18</lsb>
<msb>23</msb>
</field>
<field>
<name>ef_if_cyc_rd_adr</name>
<lsb>12</lsb>
<msb>17</msb>
</field>
<field>
<name>ef_if_cyc_rd_dat</name>
<lsb>6</lsb>
<msb>11</msb>
</field>
<field>
<name>ef_if_cyc_rd_dmy</name>
<lsb>0</lsb>
<msb>5</msb>
</field>
</fields>
</register>
<register>
<name>ef_if_cyc_1</name>
<description>ef_if_cyc_1.</description>
<addressOffset>0x808</addressOffset>
<fields>
<field>
<name>ef_if_cyc_pd_cs_h</name>
<lsb>26</lsb>
<msb>31</msb>
</field>
<field>
<name>ef_if_cyc_ps_cs</name>
<lsb>20</lsb>
<msb>25</msb>
</field>
<field>
<name>ef_if_cyc_wr_adr</name>
<lsb>14</lsb>
<msb>19</msb>
</field>
<field>
<name>ef_if_cyc_pp</name>
<lsb>6</lsb>
<msb>13</msb>
</field>
<field>
<name>ef_if_cyc_pi</name>
<lsb>0</lsb>
<msb>5</msb>
</field>
</fields>
</register>
<register>
<name>ef_if_0_manual</name>
<description>ef_if_0_manual.</description>
<addressOffset>0x80C</addressOffset>
<fields>
<field>
<name>ef_if_prot_code_manual</name>
<lsb>24</lsb>
<msb>31</msb>
</field>
<field>
<name>ef_if_0_q</name>
<lsb>16</lsb>
<msb>23</msb>
</field>
<field>
<name>ef_if_csb</name>
<lsb>15</lsb>
<msb>15</msb>
</field>
<field>
<name>ef_if_load</name>
<lsb>14</lsb>
<msb>14</msb>
</field>
<field>
<name>ef_if_pgenb</name>
<lsb>13</lsb>
<msb>13</msb>
</field>
<field>
<name>ef_if_strobe</name>
<lsb>12</lsb>
<msb>12</msb>
</field>
<field>
<name>ef_if_ps</name>
<lsb>11</lsb>
<msb>11</msb>
</field>
<field>
<name>ef_if_pd</name>
<lsb>10</lsb>
<msb>10</msb>
</field>
<field>
<name>ef_if_a</name>
<lsb>0</lsb>
<msb>9</msb>
</field>
</fields>
</register>
<register>
<name>ef_if_0_status</name>
<description>ef_if_0_status.</description>
<addressOffset>0x810</addressOffset>
<fields>
<field>
<name>ef_if_0_status</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>ef_if_cfg_0</name>
<description>ef_if_cfg_0.</description>
<addressOffset>0x814</addressOffset>
<fields>
<field>
<name>ef_if_dbg_mode</name>
<lsb>28</lsb>
<msb>31</msb>
</field>
<field>
<name>ef_if_dbg_jtag_0_dis</name>
<lsb>26</lsb>
<msb>27</msb>
</field>
<field>
<name>ef_if_dbg_jtag_1_dis</name>
<lsb>24</lsb>
<msb>25</msb>
</field>
<field>
<name>ef_if_efuse_dbg_dis</name>
<lsb>23</lsb>
<msb>23</msb>
</field>
<field>
<name>ef_if_se_dbg_dis</name>
<lsb>22</lsb>
<msb>22</msb>
</field>
<field>
<name>ef_if_cpu_rst_dbg_dis</name>
<lsb>21</lsb>
<msb>21</msb>
</field>
<field>
<name>ef_if_cpu1_dis</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>ef_if_sf_dis</name>
<lsb>19</lsb>
<msb>19</msb>
</field>
<field>
<name>ef_if_cam_dis</name>
<lsb>18</lsb>
<msb>18</msb>
</field>
<field>
<name>ef_if_0_key_enc_en</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>ef_if_wifi_dis</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>ef_if_ble_dis</name>
<lsb>15</lsb>
<msb>15</msb>
</field>
<field>
<name>ef_if_sdu_dis</name>
<lsb>14</lsb>
<msb>14</msb>
</field>
<field>
<name>ef_if_sw_usage_1</name>
<lsb>12</lsb>
<msb>13</msb>
</field>
<field>
<name>ef_if_boot_sel</name>
<lsb>8</lsb>
<msb>11</msb>
</field>
<field>
<name>ef_if_cpu0_enc_en</name>
<lsb>7</lsb>
<msb>7</msb>
</field>
<field>
<name>ef_if_cpu1_enc_en</name>
<lsb>6</lsb>
<msb>6</msb>
</field>
<field>
<name>ef_if_sboot_en</name>
<lsb>4</lsb>
<msb>5</msb>
</field>
<field>
<name>ef_if_sboot_sign_mode</name>
<lsb>2</lsb>
<msb>3</msb>
</field>
<field>
<name>ef_if_sf_aes_mode</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>ef_sw_cfg_0</name>
<description>ef_sw_cfg_0.</description>
<addressOffset>0x818</addressOffset>
<fields>
<field>
<name>ef_sw_dbg_mode</name>
<lsb>28</lsb>
<msb>31</msb>
</field>
<field>
<name>ef_sw_dbg_jtag_0_dis</name>
<lsb>26</lsb>
<msb>27</msb>
</field>
<field>
<name>ef_sw_dbg_jtag_1_dis</name>
<lsb>24</lsb>
<msb>25</msb>
</field>
<field>
<name>ef_sw_efuse_dbg_dis</name>
<lsb>23</lsb>
<msb>23</msb>
</field>
<field>
<name>ef_sw_se_dbg_dis</name>
<lsb>22</lsb>
<msb>22</msb>
</field>
<field>
<name>ef_sw_cpu_rst_dbg_dis</name>
<lsb>21</lsb>
<msb>21</msb>
</field>
<field>
<name>ef_sw_cpu1_dis</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>ef_sw_sf_dis</name>
<lsb>19</lsb>
<msb>19</msb>
</field>
<field>
<name>ef_sw_cam_dis</name>
<lsb>18</lsb>
<msb>18</msb>
</field>
<field>
<name>ef_sw_0_key_enc_en</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>ef_sw_wifi_dis</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>ef_sw_ble_dis</name>
<lsb>15</lsb>
<msb>15</msb>
</field>
<field>
<name>ef_sw_sdu_dis</name>
<lsb>14</lsb>
<msb>14</msb>
</field>
<field>
<name>ef_sw_sw_usage_1</name>
<lsb>12</lsb>
<msb>13</msb>
</field>
<field>
<name>ef_sw_cpu0_enc_en</name>
<lsb>7</lsb>
<msb>7</msb>
</field>
<field>
<name>ef_sw_cpu1_enc_en</name>
<lsb>6</lsb>
<msb>6</msb>
</field>
<field>
<name>ef_sw_sboot_en</name>
<lsb>4</lsb>
<msb>5</msb>
</field>
<field>
<name>ef_sw_sboot_sign_mode</name>
<lsb>2</lsb>
<msb>3</msb>
</field>
<field>
<name>ef_sw_sf_aes_mode</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>ef_reserved</name>
<description>ef_reserved.</description>
<addressOffset>0x81C</addressOffset>
<fields>
<field>
<name>ef_reserved</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>ef_if_ana_trim_0</name>
<description>ef_if_ana_trim_0.</description>
<addressOffset>0x820</addressOffset>
<fields>
<field>
<name>ef_if_ana_trim_0</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>ef_if_sw_usage_0</name>
<description>ef_if_sw_usage_0.</description>
<addressOffset>0x824</addressOffset>
<fields>
<field>
<name>ef_if_sw_usage_0</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>ef_crc_ctrl_0</name>
<description>ef_crc_ctrl_0.</description>
<addressOffset>0xA00</addressOffset>
<fields>
<field>
<name>ef_crc_slp_n</name>
<lsb>16</lsb>
<msb>31</msb>
</field>
<field>
<name>ef_crc_lock</name>
<lsb>11</lsb>
<msb>11</msb>
</field>
<field>
<name>ef_crc_int_set</name>
<lsb>10</lsb>
<msb>10</msb>
</field>
<field>
<name>ef_crc_int_clr</name>
<lsb>9</lsb>
<msb>9</msb>
</field>
<field>
<name>ef_crc_int</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>ef_crc_din_endian</name>
<lsb>7</lsb>
<msb>7</msb>
</field>
<field>
<name>ef_crc_dout_endian</name>
<lsb>6</lsb>
<msb>6</msb>
</field>
<field>
<name>ef_crc_dout_inv_en</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>ef_crc_error</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>ef_crc_mode</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>ef_crc_en</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>ef_crc_trig</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>ef_crc_busy</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>ef_crc_ctrl_1</name>
<description>ef_crc_ctrl_1.</description>
<addressOffset>0xA04</addressOffset>
<fields>
<field>
<name>ef_crc_data_0_en</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>ef_crc_ctrl_2</name>
<description>ef_crc_ctrl_2.</description>
<addressOffset>0xA08</addressOffset>
<fields>
<field>
<name>ef_crc_data_1_en</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>ef_crc_ctrl_3</name>
<description>ef_crc_ctrl_3.</description>
<addressOffset>0xA0C</addressOffset>
<fields>
<field>
<name>ef_crc_iv</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>ef_crc_ctrl_4</name>
<description>ef_crc_ctrl_4.</description>
<addressOffset>0xA10</addressOffset>
<fields>
<field>
<name>ef_crc_golden</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>ef_crc_ctrl_5</name>
<description>ef_crc_ctrl_5.</description>
<addressOffset>0xA14</addressOffset>
<fields>
<field>
<name>ef_crc_dout</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>cci</name>
<description>cci.</description>
<baseAddress>0x40008000</baseAddress>
<groupName>cci</groupName>
<size>32</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>cci_cfg</name>
<description>cci_cfg.</description>
<addressOffset>0x0</addressOffset>
<fields>
<field>
<name>reg_mcci_clk_inv</name>
<lsb>9</lsb>
<msb>9</msb>
</field>
<field>
<name>reg_scci_clk_inv</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>cfg_cci1_pre_read</name>
<lsb>7</lsb>
<msb>7</msb>
</field>
<field>
<name>reg_div_m_cci_sclk</name>
<lsb>5</lsb>
<msb>6</msb>
</field>
<field>
<name>reg_m_cci_sclk_en</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>cci_mas_hw_mode</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>cci_mas_sel_cci2</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>cci_slv_sel_cci2</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>cci_en</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>cci_addr</name>
<description>cci_addr.</description>
<addressOffset>0x4</addressOffset>
<fields>
<field>
<name>apb_cci_addr</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>cci_wdata</name>
<description>cci_wdata.</description>
<addressOffset>0x8</addressOffset>
<fields>
<field>
<name>apb_cci_wdata</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>cci_rdata</name>
<description>cci_rdata.</description>
<addressOffset>0xC</addressOffset>
<fields>
<field>
<name>apb_cci_rdata</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>cci_ctl</name>
<description>cci_ctl.</description>
<addressOffset>0x10</addressOffset>
<fields>
<field>
<name>ahb_state</name>
<lsb>2</lsb>
<msb>3</msb>
</field>
<field>
<name>cci_read_flag</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>cci_write_flag</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>l1c</name>
<description>l1c.</description>
<baseAddress>0x40009000</baseAddress>
<groupName>l1c</groupName>
<size>32</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>l1c_config</name>
<description>l1c_config.</description>
<addressOffset>0x0</addressOffset>
<fields>
<field>
<name>wrap_dis</name>
<lsb>26</lsb>
<msb>26</msb>
</field>
<field>
<name>early_resp_dis</name>
<lsb>25</lsb>
<msb>25</msb>
</field>
<field>
<name>l1c_bmx_busy_option_dis</name>
<lsb>24</lsb>
<msb>24</msb>
</field>
<field>
<name>l1c_bmx_timeout_en</name>
<lsb>20</lsb>
<msb>23</msb>
</field>
<field>
<name>l1c_bmx_arb_mode</name>
<lsb>16</lsb>
<msb>17</msb>
</field>
<field>
<name>l1c_bmx_err_en</name>
<lsb>15</lsb>
<msb>15</msb>
</field>
<field>
<name>l1c_bypass</name>
<lsb>14</lsb>
<msb>14</msb>
</field>
<field>
<name>irom_2t_access</name>
<lsb>12</lsb>
<msb>12</msb>
</field>
<field>
<name>l1c_way_dis</name>
<lsb>8</lsb>
<msb>11</msb>
</field>
<field>
<name>l1c_invalid_done</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>l1c_invalid_en</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>l1c_cnt_en</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>l1c_cacheable</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>hit_cnt_lsb</name>
<description>hit_cnt_lsb.</description>
<addressOffset>0x4</addressOffset>
<fields>
<field>
<name>hit_cnt_lsb</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>hit_cnt_msb</name>
<description>hit_cnt_msb.</description>
<addressOffset>0x8</addressOffset>
<fields>
<field>
<name>hit_cnt_msb</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>miss_cnt</name>
<description>miss_cnt.</description>
<addressOffset>0xC</addressOffset>
<fields>
<field>
<name>miss_cnt</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>l1c_range</name>
<description>l1c_range.</description>
<addressOffset>0x10</addressOffset>
<fields/>
</register>
<register>
<name>l1c_bmx_err_addr_en</name>
<description>l1c_bmx_err_addr_en.</description>
<addressOffset>0x200</addressOffset>
<fields>
<field>
<name>l1c_hsel_option</name>
<lsb>16</lsb>
<msb>19</msb>
</field>
<field>
<name>l1c_bmx_err_tz</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>l1c_bmx_err_dec</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>l1c_bmx_err_addr_dis</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>l1c_bmx_err_addr</name>
<description>l1c_bmx_err_addr.</description>
<addressOffset>0x204</addressOffset>
<fields>
<field>
<name>l1c_bmx_err_addr</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>irom1_misr_dataout_0</name>
<description>irom1_misr_dataout_0.</description>
<addressOffset>0x208</addressOffset>
<fields>
<field>
<name>irom1_misr_dataout_0</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>irom1_misr_dataout_1</name>
<description>irom1_misr_dataout_1.</description>
<addressOffset>0x20C</addressOffset>
<fields/>
</register>
<register>
<name>cpu_clk_gate</name>
<description>cpu_clk_gate.</description>
<addressOffset>0x210</addressOffset>
<fields>
<field>
<name>force_e21_clock_on_2</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>force_e21_clock_on_1</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>force_e21_clock_on_0</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>uart</name>
<description>uart.</description>
<baseAddress>0x4000A000</baseAddress>
<groupName>uart</groupName>
<size>32</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>utx_config</name>
<description>utx_config.</description>
<addressOffset>0x0</addressOffset>
<fields>
<field>
<name>cr_utx_len</name>
<lsb>16</lsb>
<msb>31</msb>
</field>
<field>
<name>cr_utx_bit_cnt_p</name>
<lsb>12</lsb>
<msb>13</msb>
</field>
<field>
<name>cr_utx_bit_cnt_d</name>
<lsb>8</lsb>
<msb>10</msb>
</field>
<field>
<name>cr_utx_ir_inv</name>
<lsb>7</lsb>
<msb>7</msb>
</field>
<field>
<name>cr_utx_ir_en</name>
<lsb>6</lsb>
<msb>6</msb>
</field>
<field>
<name>cr_utx_prt_sel</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>cr_utx_prt_en</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>cr_utx_frm_en</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>cr_utx_cts_en</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>cr_utx_en</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>urx_config</name>
<description>urx_config.</description>
<addressOffset>0x4</addressOffset>
<fields>
<field>
<name>cr_urx_len</name>
<lsb>16</lsb>
<msb>31</msb>
</field>
<field>
<name>cr_urx_deg_cnt</name>
<lsb>12</lsb>
<msb>15</msb>
</field>
<field>
<name>cr_urx_deg_en</name>
<lsb>11</lsb>
<msb>11</msb>
</field>
<field>
<name>cr_urx_bit_cnt_d</name>
<lsb>8</lsb>
<msb>10</msb>
</field>
<field>
<name>cr_urx_ir_inv</name>
<lsb>7</lsb>
<msb>7</msb>
</field>
<field>
<name>cr_urx_ir_en</name>
<lsb>6</lsb>
<msb>6</msb>
</field>
<field>
<name>cr_urx_prt_sel</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>cr_urx_prt_en</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>cr_urx_abr_en</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>cr_urx_rts_sw_val</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>cr_urx_rts_sw_mode</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>cr_urx_en</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>uart_bit_prd</name>
<description>uart_bit_prd.</description>
<addressOffset>0x8</addressOffset>
<fields>
<field>
<name>cr_urx_bit_prd</name>
<lsb>16</lsb>
<msb>31</msb>
</field>
<field>
<name>cr_utx_bit_prd</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>data_config</name>
<description>data_config.</description>
<addressOffset>0xC</addressOffset>
<fields>
<field>
<name>cr_uart_bit_inv</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>utx_ir_position</name>
<description>utx_ir_position.</description>
<addressOffset>0x10</addressOffset>
<fields>
<field>
<name>cr_utx_ir_pos_p</name>
<lsb>16</lsb>
<msb>31</msb>
</field>
<field>
<name>cr_utx_ir_pos_s</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>urx_ir_position</name>
<description>urx_ir_position.</description>
<addressOffset>0x14</addressOffset>
<fields>
<field>
<name>cr_urx_ir_pos_s</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>urx_rto_timer</name>
<description>urx_rto_timer.</description>
<addressOffset>0x18</addressOffset>
<fields>
<field>
<name>cr_urx_rto_value</name>
<lsb>0</lsb>
<msb>7</msb>
</field>
</fields>
</register>
<register>
<name>uart_int_sts</name>
<description>UART interrupt status</description>
<addressOffset>0x20</addressOffset>
<fields>
<field>
<name>urx_fer_int</name>
<lsb>7</lsb>
<msb>7</msb>
</field>
<field>
<name>utx_fer_int</name>
<lsb>6</lsb>
<msb>6</msb>
</field>
<field>
<name>urx_pce_int</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>urx_rto_int</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>urx_fifo_int</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>utx_fifo_int</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>urx_end_int</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>utx_end_int</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>uart_int_mask</name>
<description>UART interrupt mask</description>
<addressOffset>0x24</addressOffset>
<fields>
<field>
<name>cr_urx_fer_mask</name>
<lsb>7</lsb>
<msb>7</msb>
</field>
<field>
<name>cr_utx_fer_mask</name>
<lsb>6</lsb>
<msb>6</msb>
</field>
<field>
<name>cr_urx_pce_mask</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>cr_urx_rto_mask</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>cr_urx_fifo_mask</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>cr_utx_fifo_mask</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>cr_urx_end_mask</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>cr_utx_end_mask</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>uart_int_clear</name>
<description>UART interrupt clear</description>
<addressOffset>0x28</addressOffset>
<fields>
<field>
<name>rsvd_7</name>
<lsb>7</lsb>
<msb>7</msb>
</field>
<field>
<name>rsvd_6</name>
<lsb>6</lsb>
<msb>6</msb>
</field>
<field>
<name>cr_urx_pce_clr</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>cr_urx_rto_clr</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>rsvd_3</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>rsvd_2</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>cr_urx_end_clr</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>cr_utx_end_clr</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>uart_int_en</name>
<description>UART interrupt enable</description>
<addressOffset>0x2C</addressOffset>
<fields>
<field>
<name>cr_urx_fer_en</name>
<lsb>7</lsb>
<msb>7</msb>
</field>
<field>
<name>cr_utx_fer_en</name>
<lsb>6</lsb>
<msb>6</msb>
</field>
<field>
<name>cr_urx_pce_en</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>cr_urx_rto_en</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>cr_urx_fifo_en</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>cr_utx_fifo_en</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>cr_urx_end_en</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>cr_utx_end_en</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>uart_status</name>
<description>uart_status.</description>
<addressOffset>0x30</addressOffset>
<fields>
<field>
<name>sts_urx_bus_busy</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>sts_utx_bus_busy</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>sts_urx_abr_prd</name>
<description>sts_urx_abr_prd.</description>
<addressOffset>0x34</addressOffset>
<fields>
<field>
<name>sts_urx_abr_prd_0x55</name>
<lsb>16</lsb>
<msb>31</msb>
</field>
<field>
<name>sts_urx_abr_prd_start</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>uart_fifo_config_0</name>
<description>uart_fifo_config_0.</description>
<addressOffset>0x80</addressOffset>
<fields>
<field>
<name>rx_fifo_underflow</name>
<lsb>7</lsb>
<msb>7</msb>
</field>
<field>
<name>rx_fifo_overflow</name>
<lsb>6</lsb>
<msb>6</msb>
</field>
<field>
<name>tx_fifo_underflow</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>tx_fifo_overflow</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>rx_fifo_clr</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>tx_fifo_clr</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>uart_dma_rx_en</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>uart_dma_tx_en</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>uart_fifo_config_1</name>
<description>uart_fifo_config_1.</description>
<addressOffset>0x84</addressOffset>
<fields>
<field>
<name>rx_fifo_th</name>
<lsb>24</lsb>
<msb>28</msb>
</field>
<field>
<name>tx_fifo_th</name>
<lsb>16</lsb>
<msb>20</msb>
</field>
<field>
<name>rx_fifo_cnt</name>
<lsb>8</lsb>
<msb>13</msb>
</field>
<field>
<name>tx_fifo_cnt</name>
<lsb>0</lsb>
<msb>5</msb>
</field>
</fields>
</register>
<register>
<name>uart_fifo_wdata</name>
<description>uart_fifo_wdata.</description>
<addressOffset>0x88</addressOffset>
<fields>
<field>
<name>uart_fifo_wdata</name>
<lsb>0</lsb>
<msb>7</msb>
</field>
</fields>
</register>
<register>
<name>uart_fifo_rdata</name>
<description>uart_fifo_rdata.</description>
<addressOffset>0x8C</addressOffset>
<fields>
<field>
<name>uart_fifo_rdata</name>
<lsb>0</lsb>
<msb>7</msb>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>spi</name>
<description>spi.</description>
<baseAddress>0x4000A200</baseAddress>
<groupName>spi</groupName>
<size>32</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>spi_config</name>
<description>spi_config.</description>
<addressOffset>0x0</addressOffset>
<fields>
<field>
<name>cr_spi_deg_cnt</name>
<lsb>12</lsb>
<msb>15</msb>
</field>
<field>
<name>cr_spi_deg_en</name>
<lsb>11</lsb>
<msb>11</msb>
</field>
<field>
<name>cr_spi_m_cont_en</name>
<lsb>9</lsb>
<msb>9</msb>
</field>
<field>
<name>cr_spi_rxd_ignr_en</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>cr_spi_byte_inv</name>
<lsb>7</lsb>
<msb>7</msb>
</field>
<field>
<name>cr_spi_bit_inv</name>
<lsb>6</lsb>
<msb>6</msb>
</field>
<field>
<name>cr_spi_sclk_ph</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>cr_spi_sclk_pol</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>cr_spi_frame_size</name>
<lsb>2</lsb>
<msb>3</msb>
</field>
<field>
<name>cr_spi_s_en</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>cr_spi_m_en</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>spi_int_sts</name>
<description>spi_int_sts.</description>
<addressOffset>0x4</addressOffset>
<fields>
<field>
<name>cr_spi_fer_en</name>
<lsb>29</lsb>
<msb>29</msb>
</field>
<field>
<name>cr_spi_txu_en</name>
<lsb>28</lsb>
<msb>28</msb>
</field>
<field>
<name>cr_spi_sto_en</name>
<lsb>27</lsb>
<msb>27</msb>
</field>
<field>
<name>cr_spi_rxf_en</name>
<lsb>26</lsb>
<msb>26</msb>
</field>
<field>
<name>cr_spi_txf_en</name>
<lsb>25</lsb>
<msb>25</msb>
</field>
<field>
<name>cr_spi_end_en</name>
<lsb>24</lsb>
<msb>24</msb>
</field>
<field>
<name>rsvd_21</name>
<lsb>21</lsb>
<msb>21</msb>
</field>
<field>
<name>cr_spi_txu_clr</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>cr_spi_sto_clr</name>
<lsb>19</lsb>
<msb>19</msb>
</field>
<field>
<name>rsvd_18</name>
<lsb>18</lsb>
<msb>18</msb>
</field>
<field>
<name>rsvd_17</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>cr_spi_end_clr</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>cr_spi_fer_mask</name>
<lsb>13</lsb>
<msb>13</msb>
</field>
<field>
<name>cr_spi_txu_mask</name>
<lsb>12</lsb>
<msb>12</msb>
</field>
<field>
<name>cr_spi_sto_mask</name>
<lsb>11</lsb>
<msb>11</msb>
</field>
<field>
<name>cr_spi_rxf_mask</name>
<lsb>10</lsb>
<msb>10</msb>
</field>
<field>
<name>cr_spi_txf_mask</name>
<lsb>9</lsb>
<msb>9</msb>
</field>
<field>
<name>cr_spi_end_mask</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>spi_fer_int</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>spi_txu_int</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>spi_sto_int</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>spi_rxf_int</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>spi_txf_int</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>spi_end_int</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>spi_bus_busy</name>
<description>spi_bus_busy.</description>
<addressOffset>0x8</addressOffset>
<fields>
<field>
<name>sts_spi_bus_busy</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>spi_prd_0</name>
<description>spi_prd_0.</description>
<addressOffset>0x10</addressOffset>
<fields>
<field>
<name>cr_spi_prd_d_ph_1</name>
<lsb>24</lsb>
<msb>31</msb>
</field>
<field>
<name>cr_spi_prd_d_ph_0</name>
<lsb>16</lsb>
<msb>23</msb>
</field>
<field>
<name>cr_spi_prd_p</name>
<lsb>8</lsb>
<msb>15</msb>
</field>
<field>
<name>cr_spi_prd_s</name>
<lsb>0</lsb>
<msb>7</msb>
</field>
</fields>
</register>
<register>
<name>spi_prd_1</name>
<description>spi_prd_1.</description>
<addressOffset>0x14</addressOffset>
<fields>
<field>
<name>cr_spi_prd_i</name>
<lsb>0</lsb>
<msb>7</msb>
</field>
</fields>
</register>
<register>
<name>spi_rxd_ignr</name>
<description>spi_rxd_ignr.</description>
<addressOffset>0x18</addressOffset>
<fields>
<field>
<name>cr_spi_rxd_ignr_s</name>
<lsb>16</lsb>
<msb>20</msb>
</field>
<field>
<name>cr_spi_rxd_ignr_p</name>
<lsb>0</lsb>
<msb>4</msb>
</field>
</fields>
</register>
<register>
<name>spi_sto_value</name>
<description>spi_sto_value.</description>
<addressOffset>0x1C</addressOffset>
<fields>
<field>
<name>cr_spi_sto_value</name>
<lsb>0</lsb>
<msb>11</msb>
</field>
</fields>
</register>
<register>
<name>spi_fifo_config_0</name>
<description>spi_fifo_config_0.</description>
<addressOffset>0x80</addressOffset>
<fields>
<field>
<name>rx_fifo_underflow</name>
<lsb>7</lsb>
<msb>7</msb>
</field>
<field>
<name>rx_fifo_overflow</name>
<lsb>6</lsb>
<msb>6</msb>
</field>
<field>
<name>tx_fifo_underflow</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>tx_fifo_overflow</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>rx_fifo_clr</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>tx_fifo_clr</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>spi_dma_rx_en</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>spi_dma_tx_en</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>spi_fifo_config_1</name>
<description>spi_fifo_config_1.</description>
<addressOffset>0x84</addressOffset>
<fields>
<field>
<name>rx_fifo_th</name>
<lsb>24</lsb>
<msb>25</msb>
</field>
<field>
<name>tx_fifo_th</name>
<lsb>16</lsb>
<msb>17</msb>
</field>
<field>
<name>rx_fifo_cnt</name>
<lsb>8</lsb>
<msb>10</msb>
</field>
<field>
<name>tx_fifo_cnt</name>
<lsb>0</lsb>
<msb>2</msb>
</field>
</fields>
</register>
<register>
<name>spi_fifo_wdata</name>
<description>spi_fifo_wdata.</description>
<addressOffset>0x88</addressOffset>
<fields>
<field>
<name>spi_fifo_wdata</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>spi_fifo_rdata</name>
<description>spi_fifo_rdata.</description>
<addressOffset>0x8C</addressOffset>
<fields>
<field>
<name>spi_fifo_rdata</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>i2c</name>
<description>i2c.</description>
<baseAddress>0x4000A300</baseAddress>
<groupName>i2c</groupName>
<size>32</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>i2c_config</name>
<description>i2c_config.</description>
<addressOffset>0x0</addressOffset>
<fields>
<field>
<name>cr_i2c_deg_cnt</name>
<lsb>28</lsb>
<msb>31</msb>
</field>
<field>
<name>cr_i2c_pkt_len</name>
<lsb>16</lsb>
<msb>23</msb>
</field>
<field>
<name>cr_i2c_slv_addr</name>
<lsb>8</lsb>
<msb>14</msb>
</field>
<field>
<name>cr_i2c_sub_addr_bc</name>
<lsb>5</lsb>
<msb>6</msb>
</field>
<field>
<name>cr_i2c_sub_addr_en</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>cr_i2c_scl_sync_en</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>cr_i2c_deg_en</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>cr_i2c_pkt_dir</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>cr_i2c_m_en</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>i2c_int_sts</name>
<description>i2c_int_sts.</description>
<addressOffset>0x4</addressOffset>
<fields>
<field>
<name>cr_i2c_fer_en</name>
<lsb>29</lsb>
<msb>29</msb>
</field>
<field>
<name>cr_i2c_arb_en</name>
<lsb>28</lsb>
<msb>28</msb>
</field>
<field>
<name>cr_i2c_nak_en</name>
<lsb>27</lsb>
<msb>27</msb>
</field>
<field>
<name>cr_i2c_rxf_en</name>
<lsb>26</lsb>
<msb>26</msb>
</field>
<field>
<name>cr_i2c_txf_en</name>
<lsb>25</lsb>
<msb>25</msb>
</field>
<field>
<name>cr_i2c_end_en</name>
<lsb>24</lsb>
<msb>24</msb>
</field>
<field>
<name>rsvd_21</name>
<lsb>21</lsb>
<msb>21</msb>
</field>
<field>
<name>cr_i2c_arb_clr</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>cr_i2c_nak_clr</name>
<lsb>19</lsb>
<msb>19</msb>
</field>
<field>
<name>rsvd_18</name>
<lsb>18</lsb>
<msb>18</msb>
</field>
<field>
<name>rsvd_17</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>cr_i2c_end_clr</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>cr_i2c_fer_mask</name>
<lsb>13</lsb>
<msb>13</msb>
</field>
<field>
<name>cr_i2c_arb_mask</name>
<lsb>12</lsb>
<msb>12</msb>
</field>
<field>
<name>cr_i2c_nak_mask</name>
<lsb>11</lsb>
<msb>11</msb>
</field>
<field>
<name>cr_i2c_rxf_mask</name>
<lsb>10</lsb>
<msb>10</msb>
</field>
<field>
<name>cr_i2c_txf_mask</name>
<lsb>9</lsb>
<msb>9</msb>
</field>
<field>
<name>cr_i2c_end_mask</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>i2c_fer_int</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>i2c_arb_int</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>i2c_nak_int</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>i2c_rxf_int</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>i2c_txf_int</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>i2c_end_int</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>i2c_sub_addr</name>
<description>i2c_sub_addr.</description>
<addressOffset>0x8</addressOffset>
<fields>
<field>
<name>cr_i2c_sub_addr_b3</name>
<lsb>24</lsb>
<msb>31</msb>
</field>
<field>
<name>cr_i2c_sub_addr_b2</name>
<lsb>16</lsb>
<msb>23</msb>
</field>
<field>
<name>cr_i2c_sub_addr_b1</name>
<lsb>8</lsb>
<msb>15</msb>
</field>
<field>
<name>cr_i2c_sub_addr_b0</name>
<lsb>0</lsb>
<msb>7</msb>
</field>
</fields>
</register>
<register>
<name>i2c_bus_busy</name>
<description>i2c_bus_busy.</description>
<addressOffset>0xC</addressOffset>
<fields>
<field>
<name>cr_i2c_bus_busy_clr</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>sts_i2c_bus_busy</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>i2c_prd_start</name>
<description>i2c_prd_start.</description>
<addressOffset>0x10</addressOffset>
<fields>
<field>
<name>cr_i2c_prd_s_ph_3</name>
<lsb>24</lsb>
<msb>31</msb>
</field>
<field>
<name>cr_i2c_prd_s_ph_2</name>
<lsb>16</lsb>
<msb>23</msb>
</field>
<field>
<name>cr_i2c_prd_s_ph_1</name>
<lsb>8</lsb>
<msb>15</msb>
</field>
<field>
<name>cr_i2c_prd_s_ph_0</name>
<lsb>0</lsb>
<msb>7</msb>
</field>
</fields>
</register>
<register>
<name>i2c_prd_stop</name>
<description>i2c_prd_stop.</description>
<addressOffset>0x14</addressOffset>
<fields>
<field>
<name>cr_i2c_prd_p_ph_3</name>
<lsb>24</lsb>
<msb>31</msb>
</field>
<field>
<name>cr_i2c_prd_p_ph_2</name>
<lsb>16</lsb>
<msb>23</msb>
</field>
<field>
<name>cr_i2c_prd_p_ph_1</name>
<lsb>8</lsb>
<msb>15</msb>
</field>
<field>
<name>cr_i2c_prd_p_ph_0</name>
<lsb>0</lsb>
<msb>7</msb>
</field>
</fields>
</register>
<register>
<name>i2c_prd_data</name>
<description>i2c_prd_data.</description>
<addressOffset>0x18</addressOffset>
<fields>
<field>
<name>cr_i2c_prd_d_ph_3</name>
<lsb>24</lsb>
<msb>31</msb>
</field>
<field>
<name>cr_i2c_prd_d_ph_2</name>
<lsb>16</lsb>
<msb>23</msb>
</field>
<field>
<name>cr_i2c_prd_d_ph_1</name>
<lsb>8</lsb>
<msb>15</msb>
</field>
<field>
<name>cr_i2c_prd_d_ph_0</name>
<lsb>0</lsb>
<msb>7</msb>
</field>
</fields>
</register>
<register>
<name>i2c_fifo_config_0</name>
<description>i2c_fifo_config_0.</description>
<addressOffset>0x80</addressOffset>
<fields>
<field>
<name>rx_fifo_underflow</name>
<lsb>7</lsb>
<msb>7</msb>
</field>
<field>
<name>rx_fifo_overflow</name>
<lsb>6</lsb>
<msb>6</msb>
</field>
<field>
<name>tx_fifo_underflow</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>tx_fifo_overflow</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>rx_fifo_clr</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>tx_fifo_clr</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>i2c_dma_rx_en</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>i2c_dma_tx_en</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>i2c_fifo_config_1</name>
<description>i2c_fifo_config_1.</description>
<addressOffset>0x84</addressOffset>
<fields>
<field>
<name>rx_fifo_th</name>
<lsb>24</lsb>
<msb>24</msb>
</field>
<field>
<name>tx_fifo_th</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>rx_fifo_cnt</name>
<lsb>8</lsb>
<msb>9</msb>
</field>
<field>
<name>tx_fifo_cnt</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>i2c_fifo_wdata</name>
<description>i2c_fifo_wdata.</description>
<addressOffset>0x88</addressOffset>
<fields>
<field>
<name>i2c_fifo_wdata</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>i2c_fifo_rdata</name>
<description>i2c_fifo_rdata.</description>
<addressOffset>0x8C</addressOffset>
<fields>
<field>
<name>i2c_fifo_rdata</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>pwm</name>
<description>pwm.</description>
<baseAddress>0x4000A400</baseAddress>
<groupName>pwm</groupName>
<size>32</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>pwm_int_config</name>
<description>pwm_int_config.</description>
<addressOffset>0x0</addressOffset>
<fields>
<field>
<name>pwm_int_clear</name>
<lsb>8</lsb>
<msb>13</msb>
</field>
<field>
<name>pwm_interrupt_sts</name>
<lsb>0</lsb>
<msb>5</msb>
</field>
</fields>
</register>
<register>
<name>pwm0_clkdiv</name>
<description>pwm0_clkdiv.</description>
<addressOffset>0x20</addressOffset>
<fields>
<field>
<name>pwm_clk_div</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>pwm0_thre1</name>
<description>pwm0_thre1.</description>
<addressOffset>0x24</addressOffset>
<fields>
<field>
<name>pwm_thre1</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>pwm0_thre2</name>
<description>pwm0_thre2.</description>
<addressOffset>0x28</addressOffset>
<fields>
<field>
<name>pwm_thre2</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>pwm0_period</name>
<description>pwm0_period.</description>
<addressOffset>0x2C</addressOffset>
<fields>
<field>
<name>pwm_period</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>pwm0_config</name>
<description>pwm0_config.</description>
<addressOffset>0x30</addressOffset>
<fields>
<field>
<name>pwm_sts_top</name>
<lsb>7</lsb>
<msb>7</msb>
</field>
<field>
<name>pwm_stop_en</name>
<lsb>6</lsb>
<msb>6</msb>
</field>
<field>
<name>pwm_sw_mode</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>pwm_sw_force_val</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>pwm_stop_mode</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>pwm_out_inv</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>reg_clk_sel</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>pwm0_interrupt</name>
<description>pwm0_interrupt.</description>
<addressOffset>0x34</addressOffset>
<fields>
<field>
<name>pwm_int_enable</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>pwm_int_period_cnt</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>pwm1_clkdiv</name>
<description>pwm1_clkdiv.</description>
<addressOffset>0x40</addressOffset>
<fields>
<field>
<name>pwm_clk_div</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>pwm1_thre1</name>
<description>pwm1_thre1.</description>
<addressOffset>0x44</addressOffset>
<fields>
<field>
<name>pwm_thre1</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>pwm1_thre2</name>
<description>pwm1_thre2.</description>
<addressOffset>0x48</addressOffset>
<fields>
<field>
<name>pwm_thre2</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>pwm1_period</name>
<description>pwm1_period.</description>
<addressOffset>0x4C</addressOffset>
<fields>
<field>
<name>pwm_period</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>pwm1_config</name>
<description>pwm1_config.</description>
<addressOffset>0x50</addressOffset>
<fields>
<field>
<name>pwm_sts_top</name>
<lsb>7</lsb>
<msb>7</msb>
</field>
<field>
<name>pwm_stop_en</name>
<lsb>6</lsb>
<msb>6</msb>
</field>
<field>
<name>pwm_sw_mode</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>pwm_sw_force_val</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>pwm_stop_mode</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>pwm_out_inv</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>reg_clk_sel</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>pwm1_interrupt</name>
<description>pwm1_interrupt.</description>
<addressOffset>0x54</addressOffset>
<fields>
<field>
<name>pwm_int_enable</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>pwm_int_period_cnt</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>pwm2_clkdiv</name>
<description>pwm2_clkdiv.</description>
<addressOffset>0x60</addressOffset>
<fields>
<field>
<name>pwm_clk_div</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>pwm2_thre1</name>
<description>pwm2_thre1.</description>
<addressOffset>0x64</addressOffset>
<fields>
<field>
<name>pwm_thre1</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>pwm2_thre2</name>
<description>pwm2_thre2.</description>
<addressOffset>0x68</addressOffset>
<fields>
<field>
<name>pwm_thre2</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>pwm2_period</name>
<description>pwm2_period.</description>
<addressOffset>0x6C</addressOffset>
<fields>
<field>
<name>pwm_period</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>pwm2_config</name>
<description>pwm2_config.</description>
<addressOffset>0x70</addressOffset>
<fields>
<field>
<name>pwm_sts_top</name>
<lsb>7</lsb>
<msb>7</msb>
</field>
<field>
<name>pwm_stop_en</name>
<lsb>6</lsb>
<msb>6</msb>
</field>
<field>
<name>pwm_sw_mode</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>pwm_sw_force_val</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>pwm_stop_mode</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>pwm_out_inv</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>reg_clk_sel</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>pwm2_interrupt</name>
<description>pwm2_interrupt.</description>
<addressOffset>0x74</addressOffset>
<fields>
<field>
<name>pwm_int_enable</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>pwm_int_period_cnt</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>pwm3_clkdiv</name>
<description>pwm3_clkdiv.</description>
<addressOffset>0x80</addressOffset>
<fields>
<field>
<name>pwm_clk_div</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>pwm3_thre1</name>
<description>pwm3_thre1.</description>
<addressOffset>0x84</addressOffset>
<fields>
<field>
<name>pwm_thre1</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>pwm3_thre2</name>
<description>pwm3_thre2.</description>
<addressOffset>0x88</addressOffset>
<fields>
<field>
<name>pwm_thre2</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>pwm3_period</name>
<description>pwm3_period.</description>
<addressOffset>0x8C</addressOffset>
<fields>
<field>
<name>pwm_period</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>pwm3_config</name>
<description>pwm3_config.</description>
<addressOffset>0x90</addressOffset>
<fields>
<field>
<name>pwm_sts_top</name>
<lsb>7</lsb>
<msb>7</msb>
</field>
<field>
<name>pwm_stop_en</name>
<lsb>6</lsb>
<msb>6</msb>
</field>
<field>
<name>pwm_sw_mode</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>pwm_sw_force_val</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>pwm_stop_mode</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>pwm_out_inv</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>reg_clk_sel</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>pwm3_interrupt</name>
<description>pwm3_interrupt.</description>
<addressOffset>0x94</addressOffset>
<fields>
<field>
<name>pwm_int_enable</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>pwm_int_period_cnt</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>pwm4_clkdiv</name>
<description>pwm4_clkdiv.</description>
<addressOffset>0xA0</addressOffset>
<fields>
<field>
<name>pwm_clk_div</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>pwm4_thre1</name>
<description>pwm4_thre1.</description>
<addressOffset>0xA4</addressOffset>
<fields>
<field>
<name>pwm_thre1</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>pwm4_thre2</name>
<description>pwm4_thre2.</description>
<addressOffset>0xA8</addressOffset>
<fields>
<field>
<name>pwm_thre2</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>pwm4_period</name>
<description>pwm4_period.</description>
<addressOffset>0xAC</addressOffset>
<fields>
<field>
<name>pwm_period</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>pwm4_config</name>
<description>pwm4_config.</description>
<addressOffset>0xB0</addressOffset>
<fields>
<field>
<name>pwm_sts_top</name>
<lsb>7</lsb>
<msb>7</msb>
</field>
<field>
<name>pwm_stop_en</name>
<lsb>6</lsb>
<msb>6</msb>
</field>
<field>
<name>pwm_sw_mode</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>pwm_sw_force_val</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>pwm_stop_mode</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>pwm_out_inv</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>reg_clk_sel</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>pwm4_interrupt</name>
<description>pwm4_interrupt.</description>
<addressOffset>0xB4</addressOffset>
<fields>
<field>
<name>pwm_int_enable</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>pwm_int_period_cnt</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>timer</name>
<description>timer.</description>
<baseAddress>0x4000A500</baseAddress>
<groupName>timer</groupName>
<size>32</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>TCCR</name>
<description>TCCR.</description>
<addressOffset>0x0</addressOffset>
<fields>
<field>
<name>cs_wdt</name>
<lsb>8</lsb>
<msb>9</msb>
</field>
<field>
<name>RESERVED_7</name>
<lsb>7</lsb>
<msb>7</msb>
</field>
<field>
<name>cs_2</name>
<lsb>5</lsb>
<msb>6</msb>
</field>
<field>
<name>RESERVED_4</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>cs_1</name>
<lsb>2</lsb>
<msb>3</msb>
</field>
</fields>
</register>
<register>
<name>TMR2_0</name>
<description>TMR2_0.</description>
<addressOffset>0x10</addressOffset>
<fields>
<field>
<name>tmr</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>TMR2_1</name>
<description>TMR2_1.</description>
<addressOffset>0x14</addressOffset>
<fields>
<field>
<name>tmr</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>TMR2_2</name>
<description>TMR2_2.</description>
<addressOffset>0x18</addressOffset>
<fields>
<field>
<name>tmr</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>TMR3_0</name>
<description>TMR3_0.</description>
<addressOffset>0x1C</addressOffset>
<fields>
<field>
<name>tmr</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>TMR3_1</name>
<description>TMR3_1.</description>
<addressOffset>0x20</addressOffset>
<fields>
<field>
<name>tmr</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>TMR3_2</name>
<description>TMR3_2.</description>
<addressOffset>0x24</addressOffset>
<fields>
<field>
<name>tmr</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>TCR2</name>
<description>TCR2.</description>
<addressOffset>0x2C</addressOffset>
<fields>
<field>
<name>tcr</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>TCR3</name>
<description>TCR3.</description>
<addressOffset>0x30</addressOffset>
<fields>
<field>
<name>tcr3_counter</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>TMSR2</name>
<description>TMSR2.</description>
<addressOffset>0x38</addressOffset>
<fields>
<field>
<name>tmsr_2</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>tmsr_1</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>tmsr_0</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>TMSR3</name>
<description>TMSR3.</description>
<addressOffset>0x3C</addressOffset>
<fields>
<field>
<name>tmsr_2</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>tmsr_1</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>tmsr_0</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>TIER2</name>
<description>TIER2.</description>
<addressOffset>0x44</addressOffset>
<fields>
<field>
<name>tier_2</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>tier_1</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>tier_0</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>TIER3</name>
<description>TIER3.</description>
<addressOffset>0x48</addressOffset>
<fields>
<field>
<name>tier_2</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>tier_1</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>tier_0</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>TPLVR2</name>
<description>TPLVR2.</description>
<addressOffset>0x50</addressOffset>
<fields>
<field>
<name>tplvr</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>TPLVR3</name>
<description>TPLVR3.</description>
<addressOffset>0x54</addressOffset>
<fields>
<field>
<name>tplvr</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>TPLCR2</name>
<description>TPLCR2.</description>
<addressOffset>0x5C</addressOffset>
<fields>
<field>
<name>tplcr</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>TPLCR3</name>
<description>TPLCR3.</description>
<addressOffset>0x60</addressOffset>
<fields>
<field>
<name>tplcr</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>WMER</name>
<description>WMER.</description>
<addressOffset>0x64</addressOffset>
<fields>
<field>
<name>wrie</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>we</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>WMR</name>
<description>WMR.</description>
<addressOffset>0x68</addressOffset>
<fields>
<field>
<name>wmr</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>WVR</name>
<description>WVR.</description>
<addressOffset>0x6C</addressOffset>
<fields>
<field>
<name>wvr</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>WSR</name>
<description>WSR.</description>
<addressOffset>0x70</addressOffset>
<fields>
<field>
<name>wts</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>TICR2</name>
<description>TICR2.</description>
<addressOffset>0x78</addressOffset>
<fields>
<field>
<name>tclr_2</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>tclr_1</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>tclr_0</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>TICR3</name>
<description>TICR3.</description>
<addressOffset>0x7C</addressOffset>
<fields>
<field>
<name>tclr_2</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>tclr_1</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>tclr_0</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>WICR</name>
<description>WICR.</description>
<addressOffset>0x80</addressOffset>
<fields>
<field>
<name>wiclr</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>TCER</name>
<description>TCER.</description>
<addressOffset>0x84</addressOffset>
<fields>
<field>
<name>timer3_en</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>timer2_en</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>TCMR</name>
<description>TCMR.</description>
<addressOffset>0x88</addressOffset>
<fields>
<field>
<name>timer3_mode</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>timer2_mode</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>TILR2</name>
<description>TILR2.</description>
<addressOffset>0x90</addressOffset>
<fields>
<field>
<name>tilr_2</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>tilr_1</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>tilr_0</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>TILR3</name>
<description>TILR3.</description>
<addressOffset>0x94</addressOffset>
<fields>
<field>
<name>tilr_2</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>tilr_1</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>tilr_0</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>WCR</name>
<description>WCR.</description>
<addressOffset>0x98</addressOffset>
<fields>
<field>
<name>wcr</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>WFAR</name>
<description>WFAR.</description>
<addressOffset>0x9C</addressOffset>
<fields>
<field>
<name>wfar</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>WSAR</name>
<description>WSAR.</description>
<addressOffset>0xA0</addressOffset>
<fields>
<field>
<name>wsar</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>TCVWR2</name>
<description>TCVWR2.</description>
<addressOffset>0xA8</addressOffset>
<fields>
<field>
<name>tcvwr</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>TCVWR3</name>
<description>TCVWR3.</description>
<addressOffset>0xAC</addressOffset>
<fields>
<field>
<name>tcvwr</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>TCVSYN2</name>
<description>TCVSYN2.</description>
<addressOffset>0xB4</addressOffset>
<fields>
<field>
<name>tcvsyn2</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>TCVSYN3</name>
<description>TCVSYN3.</description>
<addressOffset>0xB8</addressOffset>
<fields>
<field>
<name>tcvsyn3</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>TCDR</name>
<description>TCDR.</description>
<addressOffset>0xBC</addressOffset>
<fields>
<field>
<name>wcdr</name>
<lsb>24</lsb>
<msb>31</msb>
</field>
<field>
<name>tcdr3</name>
<lsb>16</lsb>
<msb>23</msb>
</field>
<field>
<name>tcdr2</name>
<lsb>8</lsb>
<msb>15</msb>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>ir</name>
<description>ir.</description>
<baseAddress>0x4000A600</baseAddress>
<groupName>ir</groupName>
<size>32</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>irtx_config</name>
<description>irtx_config.</description>
<addressOffset>0x0</addressOffset>
<fields>
<field>
<name>cr_irtx_data_num</name>
<lsb>12</lsb>
<msb>17</msb>
</field>
<field>
<name>cr_irtx_tail_hl_inv</name>
<lsb>11</lsb>
<msb>11</msb>
</field>
<field>
<name>cr_irtx_tail_en</name>
<lsb>10</lsb>
<msb>10</msb>
</field>
<field>
<name>cr_irtx_head_hl_inv</name>
<lsb>9</lsb>
<msb>9</msb>
</field>
<field>
<name>cr_irtx_head_en</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>cr_irtx_logic1_hl_inv</name>
<lsb>6</lsb>
<msb>6</msb>
</field>
<field>
<name>cr_irtx_logic0_hl_inv</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>cr_irtx_data_en</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>cr_irtx_swm_en</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>cr_irtx_mod_en</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>cr_irtx_out_inv</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>cr_irtx_en</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>irtx_int_sts</name>
<description>irtx_int_sts.</description>
<addressOffset>0x4</addressOffset>
<fields>
<field>
<name>cr_irtx_end_en</name>
<lsb>24</lsb>
<msb>24</msb>
</field>
<field>
<name>cr_irtx_end_clr</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>cr_irtx_end_mask</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>irtx_end_int</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>irtx_data_word0</name>
<description>irtx_data_word0.</description>
<addressOffset>0x8</addressOffset>
<fields>
<field>
<name>cr_irtx_data_word0</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>irtx_data_word1</name>
<description>irtx_data_word1.</description>
<addressOffset>0xC</addressOffset>
<fields>
<field>
<name>cr_irtx_data_word1</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>irtx_pulse_width</name>
<description>irtx_pulse_width.</description>
<addressOffset>0x10</addressOffset>
<fields>
<field>
<name>cr_irtx_mod_ph1_w</name>
<lsb>24</lsb>
<msb>31</msb>
</field>
<field>
<name>cr_irtx_mod_ph0_w</name>
<lsb>16</lsb>
<msb>23</msb>
</field>
<field>
<name>cr_irtx_pw_unit</name>
<lsb>0</lsb>
<msb>11</msb>
</field>
</fields>
</register>
<register>
<name>irtx_pw</name>
<description>irtx_pw.</description>
<addressOffset>0x14</addressOffset>
<fields>
<field>
<name>cr_irtx_tail_ph1_w</name>
<lsb>28</lsb>
<msb>31</msb>
</field>
<field>
<name>cr_irtx_tail_ph0_w</name>
<lsb>24</lsb>
<msb>27</msb>
</field>
<field>
<name>cr_irtx_head_ph1_w</name>
<lsb>20</lsb>
<msb>23</msb>
</field>
<field>
<name>cr_irtx_head_ph0_w</name>
<lsb>16</lsb>
<msb>19</msb>
</field>
<field>
<name>cr_irtx_logic1_ph1_w</name>
<lsb>12</lsb>
<msb>15</msb>
</field>
<field>
<name>cr_irtx_logic1_ph0_w</name>
<lsb>8</lsb>
<msb>11</msb>
</field>
<field>
<name>cr_irtx_logic0_ph1_w</name>
<lsb>4</lsb>
<msb>7</msb>
</field>
<field>
<name>cr_irtx_logic0_ph0_w</name>
<lsb>0</lsb>
<msb>3</msb>
</field>
</fields>
</register>
<register>
<name>irtx_swm_pw_0</name>
<description>irtx_swm_pw_0.</description>
<addressOffset>0x40</addressOffset>
<fields>
<field>
<name>cr_irtx_swm_pw_0</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>irtx_swm_pw_1</name>
<description>irtx_swm_pw_1.</description>
<addressOffset>0x44</addressOffset>
<fields>
<field>
<name>cr_irtx_swm_pw_1</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>irtx_swm_pw_2</name>
<description>irtx_swm_pw_2.</description>
<addressOffset>0x48</addressOffset>
<fields>
<field>
<name>cr_irtx_swm_pw_2</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>irtx_swm_pw_3</name>
<description>irtx_swm_pw_3.</description>
<addressOffset>0x4C</addressOffset>
<fields>
<field>
<name>cr_irtx_swm_pw_3</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>irtx_swm_pw_4</name>
<description>irtx_swm_pw_4.</description>
<addressOffset>0x50</addressOffset>
<fields>
<field>
<name>cr_irtx_swm_pw_4</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>irtx_swm_pw_5</name>
<description>irtx_swm_pw_5.</description>
<addressOffset>0x54</addressOffset>
<fields>
<field>
<name>cr_irtx_swm_pw_5</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>irtx_swm_pw_6</name>
<description>irtx_swm_pw_6.</description>
<addressOffset>0x58</addressOffset>
<fields>
<field>
<name>cr_irtx_swm_pw_6</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>irtx_swm_pw_7</name>
<description>irtx_swm_pw_7.</description>
<addressOffset>0x5C</addressOffset>
<fields>
<field>
<name>cr_irtx_swm_pw_7</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>irrx_config</name>
<description>irrx_config.</description>
<addressOffset>0x80</addressOffset>
<fields>
<field>
<name>cr_irrx_deg_cnt</name>
<lsb>8</lsb>
<msb>11</msb>
</field>
<field>
<name>cr_irrx_deg_en</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>cr_irrx_mode</name>
<lsb>2</lsb>
<msb>3</msb>
</field>
<field>
<name>cr_irrx_in_inv</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>cr_irrx_en</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>irrx_int_sts</name>
<description>irrx_int_sts.</description>
<addressOffset>0x84</addressOffset>
<fields>
<field>
<name>cr_irrx_end_en</name>
<lsb>24</lsb>
<msb>24</msb>
</field>
<field>
<name>cr_irrx_end_clr</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>cr_irrx_end_mask</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>irrx_end_int</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>irrx_pw_config</name>
<description>irrx_pw_config.</description>
<addressOffset>0x88</addressOffset>
<fields>
<field>
<name>cr_irrx_end_th</name>
<lsb>16</lsb>
<msb>31</msb>
</field>
<field>
<name>cr_irrx_data_th</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>irrx_data_count</name>
<description>irrx_data_count.</description>
<addressOffset>0x90</addressOffset>
<fields>
<field>
<name>sts_irrx_data_cnt</name>
<lsb>0</lsb>
<msb>6</msb>
</field>
</fields>
</register>
<register>
<name>irrx_data_word0</name>
<description>irrx_data_word0.</description>
<addressOffset>0x94</addressOffset>
<fields>
<field>
<name>sts_irrx_data_word0</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>irrx_data_word1</name>
<description>irrx_data_word1.</description>
<addressOffset>0x98</addressOffset>
<fields>
<field>
<name>sts_irrx_data_word1</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>irrx_swm_fifo_config_0</name>
<description>irrx_swm_fifo_config_0.</description>
<addressOffset>0xC0</addressOffset>
<fields>
<field>
<name>rx_fifo_cnt</name>
<lsb>4</lsb>
<msb>10</msb>
</field>
<field>
<name>rx_fifo_underflow</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>rx_fifo_overflow</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>rx_fifo_clr</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>irrx_swm_fifo_rdata</name>
<description>irrx_swm_fifo_rdata.</description>
<addressOffset>0xC4</addressOffset>
<fields>
<field>
<name>rx_fifo_rdata</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>cks</name>
<description>cks.</description>
<baseAddress>0x4000A000</baseAddress>
<groupName>cks</groupName>
<size>32</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>cks_config</name>
<description>cks_config.</description>
<addressOffset>0x0</addressOffset>
<fields>
<field>
<name>cr_cks_byte_swap</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>cr_cks_clr</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>data_in</name>
<description>data_in.</description>
<addressOffset>0x4</addressOffset>
<fields>
<field>
<name>data_in</name>
<lsb>0</lsb>
<msb>7</msb>
</field>
</fields>
</register>
<register>
<name>cks_out</name>
<description>cks_out.</description>
<addressOffset>0x8</addressOffset>
<fields>
<field>
<name>cks_out</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>sf_ctrl</name>
<description>sf_ctrl.</description>
<baseAddress>0x4000B000</baseAddress>
<groupName>sf_ctrl</groupName>
<size>32</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>sf_ctrl_0</name>
<description>sf_ctrl_0.</description>
<addressOffset>0x0</addressOffset>
<fields>
<field>
<name>sf_id</name>
<lsb>24</lsb>
<msb>31</msb>
</field>
<field>
<name>sf_aes_iv_endian</name>
<lsb>23</lsb>
<msb>23</msb>
</field>
<field>
<name>sf_aes_key_endian</name>
<lsb>22</lsb>
<msb>22</msb>
</field>
<field>
<name>sf_aes_ctr_plus_en</name>
<lsb>21</lsb>
<msb>21</msb>
</field>
<field>
<name>sf_aes_dout_endian</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>sf_aes_dly_mode</name>
<lsb>19</lsb>
<msb>19</msb>
</field>
<field>
<name>sf_if_int_set</name>
<lsb>18</lsb>
<msb>18</msb>
</field>
<field>
<name>sf_if_int_clr</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>sf_if_int</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>sf_if_read_dly_en</name>
<lsb>11</lsb>
<msb>11</msb>
</field>
<field>
<name>sf_if_read_dly_n</name>
<lsb>8</lsb>
<msb>10</msb>
</field>
<field>
<name>sf_clk_sahb_sram_sel</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>sf_clk_out_inv_sel</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>sf_clk_out_gate_en</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>sf_clk_sf_rx_inv_sel</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
</fields>
</register>
<register>
<name>sf_ctrl_1</name>
<description>sf_ctrl_1.</description>
<addressOffset>0x4</addressOffset>
<fields>
<field>
<name>sf_ahb2sram_en</name>
<lsb>31</lsb>
<msb>31</msb>
</field>
<field>
<name>sf_ahb2sif_en</name>
<lsb>30</lsb>
<msb>30</msb>
</field>
<field>
<name>sf_if_en</name>
<lsb>29</lsb>
<msb>29</msb>
</field>
<field>
<name>sf_if_fn_sel</name>
<lsb>28</lsb>
<msb>28</msb>
</field>
<field>
<name>sf_ahb2sif_stop</name>
<lsb>27</lsb>
<msb>27</msb>
</field>
<field>
<name>sf_ahb2sif_stopped</name>
<lsb>26</lsb>
<msb>26</msb>
</field>
<field>
<name>sf_if_reg_wp</name>
<lsb>25</lsb>
<msb>25</msb>
</field>
<field>
<name>sf_if_reg_hold</name>
<lsb>24</lsb>
<msb>24</msb>
</field>
<field>
<name>sf_if_0_ack_lat</name>
<lsb>20</lsb>
<msb>22</msb>
</field>
<field>
<name>sf_if_sr_int_set</name>
<lsb>18</lsb>
<msb>18</msb>
</field>
<field>
<name>sf_if_sr_int_en</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>sf_if_sr_int</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>sf_if_sr_pat</name>
<lsb>8</lsb>
<msb>15</msb>
</field>
<field>
<name>sf_if_sr_pat_mask</name>
<lsb>0</lsb>
<msb>7</msb>
</field>
</fields>
</register>
<register>
<name>sf_if_sahb_0</name>
<description>sf_if_sahb_0.</description>
<addressOffset>0x8</addressOffset>
<fields>
<field>
<name>sf_if_0_qpi_mode_en</name>
<lsb>31</lsb>
<msb>31</msb>
</field>
<field>
<name>sf_if_0_spi_mode</name>
<lsb>28</lsb>
<msb>30</msb>
</field>
<field>
<name>sf_if_0_cmd_en</name>
<lsb>27</lsb>
<msb>27</msb>
</field>
<field>
<name>sf_if_0_adr_en</name>
<lsb>26</lsb>
<msb>26</msb>
</field>
<field>
<name>sf_if_0_dmy_en</name>
<lsb>25</lsb>
<msb>25</msb>
</field>
<field>
<name>sf_if_0_dat_en</name>
<lsb>24</lsb>
<msb>24</msb>
</field>
<field>
<name>sf_if_0_dat_rw </name>
<lsb>23</lsb>
<msb>23</msb>
</field>
<field>
<name>sf_if_0_cmd_byte</name>
<lsb>20</lsb>
<msb>22</msb>
</field>
<field>
<name>sf_if_0_adr_byte</name>
<lsb>17</lsb>
<msb>19</msb>
</field>
<field>
<name>sf_if_0_dmy_byte</name>
<lsb>12</lsb>
<msb>16</msb>
</field>
<field>
<name>sf_if_0_dat_byte</name>
<lsb>2</lsb>
<msb>11</msb>
</field>
<field>
<name>sf_if_0_trig</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>sf_if_busy</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>sf_if_sahb_1</name>
<description>sf_if_sahb_1.</description>
<addressOffset>0xC</addressOffset>
<fields>
<field>
<name>sf_if_0_cmd_buf_0</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sf_if_sahb_2</name>
<description>sf_if_sahb_2.</description>
<addressOffset>0x10</addressOffset>
<fields>
<field>
<name>sf_if_0_cmd_buf_1</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sf_if_iahb_0</name>
<description>sf_if_iahb_0.</description>
<addressOffset>0x14</addressOffset>
<fields>
<field>
<name>sf_if_1_qpi_mode_en</name>
<lsb>31</lsb>
<msb>31</msb>
</field>
<field>
<name>sf_if_1_spi_mode</name>
<lsb>28</lsb>
<msb>30</msb>
</field>
<field>
<name>sf_if_1_cmd_en</name>
<lsb>27</lsb>
<msb>27</msb>
</field>
<field>
<name>sf_if_1_adr_en</name>
<lsb>26</lsb>
<msb>26</msb>
</field>
<field>
<name>sf_if_1_dmy_en</name>
<lsb>25</lsb>
<msb>25</msb>
</field>
<field>
<name>sf_if_1_dat_en</name>
<lsb>24</lsb>
<msb>24</msb>
</field>
<field>
<name>sf_if_1_dat_rw </name>
<lsb>23</lsb>
<msb>23</msb>
</field>
<field>
<name>sf_if_1_cmd_byte</name>
<lsb>20</lsb>
<msb>22</msb>
</field>
<field>
<name>sf_if_1_adr_byte</name>
<lsb>17</lsb>
<msb>19</msb>
</field>
<field>
<name>sf_if_1_dmy_byte</name>
<lsb>12</lsb>
<msb>16</msb>
</field>
</fields>
</register>
<register>
<name>sf_if_iahb_1</name>
<description>sf_if_iahb_1.</description>
<addressOffset>0x18</addressOffset>
<fields>
<field>
<name>sf_if_1_cmd_buf_0</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sf_if_iahb_2</name>
<description>sf_if_iahb_2.</description>
<addressOffset>0x1C</addressOffset>
<fields>
<field>
<name>sf_if_1_cmd_buf_1</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sf_if_status_0</name>
<description>sf_if_status_0.</description>
<addressOffset>0x20</addressOffset>
<fields>
<field>
<name>sf_if_status_0</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sf_if_status_1</name>
<description>sf_if_status_1.</description>
<addressOffset>0x24</addressOffset>
<fields>
<field>
<name>sf_if_status_1</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sf_aes</name>
<description>sf_aes.</description>
<addressOffset>0x28</addressOffset>
<fields>
<field>
<name>sf_aes_status</name>
<lsb>5</lsb>
<msb>31</msb>
</field>
<field>
<name>sf_aes_pref_busy</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>sf_aes_pref_trig</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>sf_aes_mode</name>
<lsb>1</lsb>
<msb>2</msb>
</field>
<field>
<name>sf_aes_en</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>sf_ahb2sif_status</name>
<description>sf_ahb2sif_status.</description>
<addressOffset>0x2C</addressOffset>
<fields>
<field>
<name>sf_ahb2sif_status</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sf_if_io_dly_0</name>
<description>sf_if_io_dly_0.</description>
<addressOffset>0x30</addressOffset>
<fields>
<field>
<name>sf_dqs_do_dly_sel</name>
<lsb>30</lsb>
<msb>31</msb>
</field>
<field>
<name>sf_dqs_di_dly_sel</name>
<lsb>28</lsb>
<msb>29</msb>
</field>
<field>
<name>sf_dqs_oe_dly_sel</name>
<lsb>26</lsb>
<msb>27</msb>
</field>
<field>
<name>sf_clk_out_dly_sel</name>
<lsb>8</lsb>
<msb>9</msb>
</field>
<field>
<name>sf_cs_dly_sel</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>sf_if_io_dly_1</name>
<description>sf_if_io_dly_1.</description>
<addressOffset>0x34</addressOffset>
<fields>
<field>
<name>sf_io_0_do_dly_sel</name>
<lsb>16</lsb>
<msb>17</msb>
</field>
<field>
<name>sf_io_0_di_dly_sel</name>
<lsb>8</lsb>
<msb>9</msb>
</field>
<field>
<name>sf_io_0_oe_dly_sel</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>sf_if_io_dly_2</name>
<description>sf_if_io_dly_2.</description>
<addressOffset>0x38</addressOffset>
<fields>
<field>
<name>sf_io_1_do_dly_sel</name>
<lsb>16</lsb>
<msb>17</msb>
</field>
<field>
<name>sf_io_1_di_dly_sel</name>
<lsb>8</lsb>
<msb>9</msb>
</field>
<field>
<name>sf_io_1_oe_dly_sel</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>sf_if_io_dly_3</name>
<description>sf_if_io_dly_3.</description>
<addressOffset>0x3C</addressOffset>
<fields>
<field>
<name>sf_io_2_do_dly_sel</name>
<lsb>16</lsb>
<msb>17</msb>
</field>
<field>
<name>sf_io_2_di_dly_sel</name>
<lsb>8</lsb>
<msb>9</msb>
</field>
<field>
<name>sf_io_2_oe_dly_sel</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>sf_if_io_dly_4</name>
<description>sf_if_io_dly_4.</description>
<addressOffset>0x40</addressOffset>
<fields>
<field>
<name>sf_io_3_do_dly_sel</name>
<lsb>16</lsb>
<msb>17</msb>
</field>
<field>
<name>sf_io_3_di_dly_sel</name>
<lsb>8</lsb>
<msb>9</msb>
</field>
<field>
<name>sf_io_3_oe_dly_sel</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>sf_reserved</name>
<description>sf_reserved.</description>
<addressOffset>0x44</addressOffset>
<fields>
<field>
<name>sf_reserved</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sf2_if_io_dly_0</name>
<description>sf2_if_io_dly_0.</description>
<addressOffset>0x48</addressOffset>
<fields>
<field>
<name>sf2_dqs_do_dly_sel</name>
<lsb>30</lsb>
<msb>31</msb>
</field>
<field>
<name>sf2_dqs_di_dly_sel</name>
<lsb>28</lsb>
<msb>29</msb>
</field>
<field>
<name>sf2_dqs_oe_dly_sel</name>
<lsb>26</lsb>
<msb>27</msb>
</field>
<field>
<name>sf2_clk_out_dly_sel</name>
<lsb>8</lsb>
<msb>9</msb>
</field>
<field>
<name>sf2_cs_dly_sel</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>sf2_if_io_dly_1</name>
<description>sf2_if_io_dly_1.</description>
<addressOffset>0x4C</addressOffset>
<fields>
<field>
<name>sf2_io_0_do_dly_sel</name>
<lsb>16</lsb>
<msb>17</msb>
</field>
<field>
<name>sf2_io_0_di_dly_sel</name>
<lsb>8</lsb>
<msb>9</msb>
</field>
<field>
<name>sf2_io_0_oe_dly_sel</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>sf2_if_io_dly_2</name>
<description>sf2_if_io_dly_2.</description>
<addressOffset>0x50</addressOffset>
<fields>
<field>
<name>sf2_io_1_do_dly_sel</name>
<lsb>16</lsb>
<msb>17</msb>
</field>
<field>
<name>sf2_io_1_di_dly_sel</name>
<lsb>8</lsb>
<msb>9</msb>
</field>
<field>
<name>sf2_io_1_oe_dly_sel</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>sf2_if_io_dly_3</name>
<description>sf2_if_io_dly_3.</description>
<addressOffset>0x54</addressOffset>
<fields>
<field>
<name>sf2_io_2_do_dly_sel</name>
<lsb>16</lsb>
<msb>17</msb>
</field>
<field>
<name>sf2_io_2_di_dly_sel</name>
<lsb>8</lsb>
<msb>9</msb>
</field>
<field>
<name>sf2_io_2_oe_dly_sel</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>sf2_if_io_dly_4</name>
<description>sf2_if_io_dly_4.</description>
<addressOffset>0x58</addressOffset>
<fields>
<field>
<name>sf2_io_3_do_dly_sel</name>
<lsb>16</lsb>
<msb>17</msb>
</field>
<field>
<name>sf2_io_3_di_dly_sel</name>
<lsb>8</lsb>
<msb>9</msb>
</field>
<field>
<name>sf2_io_3_oe_dly_sel</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>sf3_if_io_dly_0</name>
<description>sf3_if_io_dly_0.</description>
<addressOffset>0x5C</addressOffset>
<fields>
<field>
<name>sf3_dqs_do_dly_sel</name>
<lsb>30</lsb>
<msb>31</msb>
</field>
<field>
<name>sf3_dqs_di_dly_sel</name>
<lsb>28</lsb>
<msb>29</msb>
</field>
<field>
<name>sf3_dqs_oe_dly_sel</name>
<lsb>26</lsb>
<msb>27</msb>
</field>
<field>
<name>sf3_clk_out_dly_sel</name>
<lsb>8</lsb>
<msb>9</msb>
</field>
<field>
<name>sf3_cs_dly_sel</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>sf3_if_io_dly_1</name>
<description>sf3_if_io_dly_1.</description>
<addressOffset>0x60</addressOffset>
<fields>
<field>
<name>sf3_io_0_do_dly_sel</name>
<lsb>16</lsb>
<msb>17</msb>
</field>
<field>
<name>sf3_io_0_di_dly_sel</name>
<lsb>8</lsb>
<msb>9</msb>
</field>
<field>
<name>sf3_io_0_oe_dly_sel</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>sf3_if_io_dly_2</name>
<description>sf3_if_io_dly_2.</description>
<addressOffset>0x64</addressOffset>
<fields>
<field>
<name>sf3_io_1_do_dly_sel</name>
<lsb>16</lsb>
<msb>17</msb>
</field>
<field>
<name>sf3_io_1_di_dly_sel</name>
<lsb>8</lsb>
<msb>9</msb>
</field>
<field>
<name>sf3_io_1_oe_dly_sel</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>sf3_if_io_dly_3</name>
<description>sf3_if_io_dly_3.</description>
<addressOffset>0x68</addressOffset>
<fields>
<field>
<name>sf3_io_2_do_dly_sel</name>
<lsb>16</lsb>
<msb>17</msb>
</field>
<field>
<name>sf3_io_2_di_dly_sel</name>
<lsb>8</lsb>
<msb>9</msb>
</field>
<field>
<name>sf3_io_2_oe_dly_sel</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>sf3_if_io_dly_4</name>
<description>sf3_if_io_dly_4.</description>
<addressOffset>0x6C</addressOffset>
<fields>
<field>
<name>sf3_io_3_do_dly_sel</name>
<lsb>16</lsb>
<msb>17</msb>
</field>
<field>
<name>sf3_io_3_di_dly_sel</name>
<lsb>8</lsb>
<msb>9</msb>
</field>
<field>
<name>sf3_io_3_oe_dly_sel</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>sf_ctrl_2</name>
<description>sf_ctrl_2.</description>
<addressOffset>0x70</addressOffset>
<fields>
<field>
<name>sf_if_dqs_en</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>sf_if_dtr_en</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>sf_if_pad_sel_lock</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>sf_if_pad_sel</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>sf_ctrl_3</name>
<description>sf_ctrl_3.</description>
<addressOffset>0x74</addressOffset>
<fields>
<field>
<name>sf_if_1_ack_lat</name>
<lsb>29</lsb>
<msb>31</msb>
</field>
<field>
<name>sf_cmds_wrap_mode</name>
<lsb>10</lsb>
<msb>10</msb>
</field>
<field>
<name>sf_cmds_wrap_q_ini</name>
<lsb>9</lsb>
<msb>9</msb>
</field>
<field>
<name>sf_cmds_bt_en</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>sf_cmds_bt_dly</name>
<lsb>5</lsb>
<msb>7</msb>
</field>
<field>
<name>sf_cmds_en</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>sf_cmds_wrap_len</name>
<lsb>0</lsb>
<msb>3</msb>
</field>
</fields>
</register>
<register>
<name>sf_if_iahb_3</name>
<description>sf_if_iahb_3.</description>
<addressOffset>0x78</addressOffset>
<fields>
<field>
<name>sf_if_2_qpi_mode_en</name>
<lsb>31</lsb>
<msb>31</msb>
</field>
<field>
<name>sf_if_2_spi_mode</name>
<lsb>28</lsb>
<msb>30</msb>
</field>
<field>
<name>sf_if_2_cmd_en</name>
<lsb>27</lsb>
<msb>27</msb>
</field>
<field>
<name>sf_if_2_adr_en</name>
<lsb>26</lsb>
<msb>26</msb>
</field>
<field>
<name>sf_if_2_dmy_en</name>
<lsb>25</lsb>
<msb>25</msb>
</field>
<field>
<name>sf_if_2_dat_en</name>
<lsb>24</lsb>
<msb>24</msb>
</field>
<field>
<name>sf_if_2_dat_rw </name>
<lsb>23</lsb>
<msb>23</msb>
</field>
<field>
<name>sf_if_2_cmd_byte</name>
<lsb>20</lsb>
<msb>22</msb>
</field>
<field>
<name>sf_if_2_adr_byte</name>
<lsb>17</lsb>
<msb>19</msb>
</field>
<field>
<name>sf_if_2_dmy_byte</name>
<lsb>12</lsb>
<msb>16</msb>
</field>
</fields>
</register>
<register>
<name>sf_if_iahb_4</name>
<description>sf_if_iahb_4.</description>
<addressOffset>0x7C</addressOffset>
<fields>
<field>
<name>sf_if_2_cmd_buf_0</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sf_if_iahb_5</name>
<description>sf_if_iahb_5.</description>
<addressOffset>0x80</addressOffset>
<fields>
<field>
<name>sf_if_2_cmd_buf_1</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sf_if_iahb_6</name>
<description>sf_if_iahb_6.</description>
<addressOffset>0x84</addressOffset>
<fields>
<field>
<name>sf_if_3_qpi_mode_en</name>
<lsb>31</lsb>
<msb>31</msb>
</field>
<field>
<name>sf_if_3_spi_mode</name>
<lsb>28</lsb>
<msb>30</msb>
</field>
<field>
<name>sf_if_3_cmd_byte</name>
<lsb>20</lsb>
<msb>22</msb>
</field>
</fields>
</register>
<register>
<name>sf_if_iahb_7</name>
<description>sf_if_iahb_7.</description>
<addressOffset>0x88</addressOffset>
<fields>
<field>
<name>sf_if_3_cmd_buf_0</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sf_ctrl_prot_en_rd</name>
<description>sf_ctrl_prot_en_rd.</description>
<addressOffset>0x100</addressOffset>
<fields>
<field>
<name>sf_dbg_dis</name>
<lsb>31</lsb>
<msb>31</msb>
</field>
<field>
<name>sf_if_0_trig_wr_lock</name>
<lsb>30</lsb>
<msb>30</msb>
</field>
<field>
<name>sf_ctrl_id1_en_rd</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>sf_ctrl_id0_en_rd</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>sf_ctrl_prot_en_rd</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>sf_ctrl_prot_en</name>
<description>sf_ctrl_prot_en.</description>
<addressOffset>0x104</addressOffset>
<fields>
<field>
<name>sf_ctrl_id1_en</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>sf_ctrl_id0_en</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>sf_ctrl_prot_en</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>sf_aes_key_r0_0</name>
<description>sf_aes_key_r0_0.</description>
<addressOffset>0x200</addressOffset>
<fields>
<field>
<name>sf_aes_key_r0_0</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sf_aes_key_r0_1</name>
<description>sf_aes_key_r0_1.</description>
<addressOffset>0x204</addressOffset>
<fields>
<field>
<name>sf_aes_key_r0_1</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sf_aes_key_r0_2</name>
<description>sf_aes_key_r0_2.</description>
<addressOffset>0x208</addressOffset>
<fields>
<field>
<name>sf_aes_key_r0_2</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sf_aes_key_r0_3</name>
<description>sf_aes_key_r0_3.</description>
<addressOffset>0x20C</addressOffset>
<fields>
<field>
<name>sf_aes_key_r0_3</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sf_aes_key_r0_4</name>
<description>sf_aes_key_r0_4.</description>
<addressOffset>0x210</addressOffset>
<fields>
<field>
<name>sf_aes_key_r0_4</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sf_aes_key_r0_5</name>
<description>sf_aes_key_r0_5.</description>
<addressOffset>0x214</addressOffset>
<fields>
<field>
<name>sf_aes_key_r0_5</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sf_aes_key_r0_6</name>
<description>sf_aes_key_r0_6.</description>
<addressOffset>0x218</addressOffset>
<fields>
<field>
<name>sf_aes_key_r0_6</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sf_aes_key_r0_7</name>
<description>sf_aes_key_r0_7.</description>
<addressOffset>0x21C</addressOffset>
<fields>
<field>
<name>sf_aes_key_r0_7</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sf_aes_iv_r0_w0</name>
<description>sf_aes_iv_r0_w0.</description>
<addressOffset>0x220</addressOffset>
<fields>
<field>
<name>sf_aes_iv_r0_w0</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sf_aes_iv_r0_w1</name>
<description>sf_aes_iv_r0_w1.</description>
<addressOffset>0x224</addressOffset>
<fields>
<field>
<name>sf_aes_iv_r0_w1</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sf_aes_iv_r0_w2</name>
<description>sf_aes_iv_r0_w2.</description>
<addressOffset>0x228</addressOffset>
<fields>
<field>
<name>sf_aes_iv_r0_w2</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sf_aes_iv_r0_w3</name>
<description>sf_aes_iv_r0_w3.</description>
<addressOffset>0x22C</addressOffset>
<fields>
<field>
<name>sf_aes_iv_r0_w3</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sf_aes_cfg_r0</name>
<description>sf_aes_cfg_r0.</description>
<addressOffset>0x230</addressOffset>
<fields>
<field>
<name>sf_aes_region_r0_lock</name>
<lsb>31</lsb>
<msb>31</msb>
</field>
<field>
<name>sf_aes_region_r0_en</name>
<lsb>30</lsb>
<msb>30</msb>
</field>
<field>
<name>sf_aes_region_r0_hw_key_en</name>
<lsb>29</lsb>
<msb>29</msb>
</field>
<field>
<name>sf_aes_region_r0_start</name>
<lsb>14</lsb>
<msb>27</msb>
</field>
<field>
<name>sf_aes_region_r0_end</name>
<lsb>0</lsb>
<msb>13</msb>
</field>
</fields>
</register>
<register>
<name>sf_aes_key_r1_0</name>
<description>sf_aes_key_r1_0.</description>
<addressOffset>0x300</addressOffset>
<fields>
<field>
<name>sf_aes_key_r1_0</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sf_aes_key_r1_1</name>
<description>sf_aes_key_r1_1.</description>
<addressOffset>0x304</addressOffset>
<fields>
<field>
<name>sf_aes_key_r1_1</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sf_aes_key_r1_2</name>
<description>sf_aes_key_r1_2.</description>
<addressOffset>0x308</addressOffset>
<fields>
<field>
<name>sf_aes_key_r1_2</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sf_aes_key_r1_3</name>
<description>sf_aes_key_r1_3.</description>
<addressOffset>0x30C</addressOffset>
<fields>
<field>
<name>sf_aes_key_r1_3</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sf_aes_key_r1_4</name>
<description>sf_aes_key_r1_4.</description>
<addressOffset>0x310</addressOffset>
<fields>
<field>
<name>sf_aes_key_r1_4</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sf_aes_key_r1_5</name>
<description>sf_aes_key_r1_5.</description>
<addressOffset>0x314</addressOffset>
<fields>
<field>
<name>sf_aes_key_r1_5</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sf_aes_key_r1_6</name>
<description>sf_aes_key_r1_6.</description>
<addressOffset>0x318</addressOffset>
<fields>
<field>
<name>sf_aes_key_r1_6</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sf_aes_key_r1_7</name>
<description>sf_aes_key_r1_7.</description>
<addressOffset>0x31C</addressOffset>
<fields>
<field>
<name>sf_aes_key_r1_7</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sf_aes_iv_r1_w0</name>
<description>sf_aes_iv_r1_w0.</description>
<addressOffset>0x320</addressOffset>
<fields>
<field>
<name>sf_aes_iv_r1_w0</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sf_aes_iv_r1_w1</name>
<description>sf_aes_iv_r1_w1.</description>
<addressOffset>0x324</addressOffset>
<fields>
<field>
<name>sf_aes_iv_r1_w1</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sf_aes_iv_r1_w2</name>
<description>sf_aes_iv_r1_w2.</description>
<addressOffset>0x328</addressOffset>
<fields>
<field>
<name>sf_aes_iv_r1_w2</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sf_aes_iv_r1_w3</name>
<description>sf_aes_iv_r1_w3.</description>
<addressOffset>0x32C</addressOffset>
<fields>
<field>
<name>sf_aes_iv_r1_w3</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sf_aes_r1</name>
<description>sf_aes_r1.</description>
<addressOffset>0x330</addressOffset>
<fields>
<field>
<name>sf_aes_r1_lock</name>
<lsb>31</lsb>
<msb>31</msb>
</field>
<field>
<name>sf_aes_r1_en</name>
<lsb>30</lsb>
<msb>30</msb>
</field>
<field>
<name>sf_aes_r1_hw_key_en</name>
<lsb>29</lsb>
<msb>29</msb>
</field>
<field>
<name>sf_aes_r1_start</name>
<lsb>14</lsb>
<msb>27</msb>
</field>
<field>
<name>sf_aes_r1_end</name>
<lsb>0</lsb>
<msb>13</msb>
</field>
</fields>
</register>
<register>
<name>sf_aes_key_r2_0</name>
<description>sf_aes_key_r2_0.</description>
<addressOffset>0x400</addressOffset>
<fields>
<field>
<name>sf_aes_key_r2_0</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sf_aes_key_r2_1</name>
<description>sf_aes_key_r2_1.</description>
<addressOffset>0x404</addressOffset>
<fields>
<field>
<name>sf_aes_key_r2_1</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sf_aes_key_r2_2</name>
<description>sf_aes_key_r2_2.</description>
<addressOffset>0x408</addressOffset>
<fields>
<field>
<name>sf_aes_key_r2_2</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sf_aes_key_r2_3</name>
<description>sf_aes_key_r2_3.</description>
<addressOffset>0x40C</addressOffset>
<fields>
<field>
<name>sf_aes_key_r2_3</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sf_aes_key_r2_4</name>
<description>sf_aes_key_r2_4.</description>
<addressOffset>0x410</addressOffset>
<fields>
<field>
<name>sf_aes_key_r2_4</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sf_aes_key_r2_5</name>
<description>sf_aes_key_r2_5.</description>
<addressOffset>0x414</addressOffset>
<fields>
<field>
<name>sf_aes_key_r2_5</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sf_aes_key_r2_6</name>
<description>sf_aes_key_r2_6.</description>
<addressOffset>0x418</addressOffset>
<fields>
<field>
<name>sf_aes_key_r2_6</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sf_aes_key_r2_7</name>
<description>sf_aes_key_r2_7.</description>
<addressOffset>0x41C</addressOffset>
<fields>
<field>
<name>sf_aes_key_r2_7</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sf_aes_iv_r2_w0</name>
<description>sf_aes_iv_r2_w0.</description>
<addressOffset>0x420</addressOffset>
<fields>
<field>
<name>sf_aes_iv_r2_w0</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sf_aes_iv_r2_w1</name>
<description>sf_aes_iv_r2_w1.</description>
<addressOffset>0x424</addressOffset>
<fields>
<field>
<name>sf_aes_iv_r2_w1</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sf_aes_iv_r2_w2</name>
<description>sf_aes_iv_r2_w2.</description>
<addressOffset>0x428</addressOffset>
<fields>
<field>
<name>sf_aes_iv_r2_w2</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sf_aes_iv_r2_w3</name>
<description>sf_aes_iv_r2_w3.</description>
<addressOffset>0x42C</addressOffset>
<fields>
<field>
<name>sf_aes_iv_r2_w3</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>sf_aes_r2</name>
<description>sf_aes_r2.</description>
<addressOffset>0x430</addressOffset>
<fields>
<field>
<name>sf_aes_r2_lock</name>
<lsb>31</lsb>
<msb>31</msb>
</field>
<field>
<name>sf_aes_r2_en</name>
<lsb>30</lsb>
<msb>30</msb>
</field>
<field>
<name>sf_aes_r2_hw_key_en</name>
<lsb>29</lsb>
<msb>29</msb>
</field>
<field>
<name>sf_aes_r2_start</name>
<lsb>14</lsb>
<msb>27</msb>
</field>
<field>
<name>sf_aes_r2_end</name>
<lsb>0</lsb>
<msb>13</msb>
</field>
</fields>
</register>
<register>
<name>sf_id0_offset</name>
<description>sf_id0_offset.</description>
<addressOffset>0x434</addressOffset>
<fields>
<field>
<name>sf_id0_offset</name>
<lsb>0</lsb>
<msb>23</msb>
</field>
</fields>
</register>
<register>
<name>sf_id1_offset</name>
<description>sf_id1_offset.</description>
<addressOffset>0x438</addressOffset>
<fields>
<field>
<name>sf_id1_offset</name>
<lsb>0</lsb>
<msb>23</msb>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>dma</name>
<description>dma.</description>
<baseAddress>0x4000C000</baseAddress>
<groupName>dma</groupName>
<size>32</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>DMA_IntStatus</name>
<description>DMA_IntStatus.</description>
<addressOffset>0x0</addressOffset>
<fields>
<field>
<name>IntStatus</name>
<lsb>0</lsb>
<msb>7</msb>
</field>
</fields>
</register>
<register>
<name>DMA_IntTCStatus</name>
<description>DMA_IntTCStatus.</description>
<addressOffset>0x4</addressOffset>
<fields>
<field>
<name>IntTCStatus</name>
<lsb>0</lsb>
<msb>7</msb>
</field>
</fields>
</register>
<register>
<name>DMA_IntTCClear</name>
<description>DMA_IntTCClear.</description>
<addressOffset>0x8</addressOffset>
<fields>
<field>
<name>IntTCClear</name>
<lsb>0</lsb>
<msb>7</msb>
</field>
</fields>
</register>
<register>
<name>DMA_IntErrorStatus</name>
<description>DMA_IntErrorStatus.</description>
<addressOffset>0xC</addressOffset>
<fields>
<field>
<name>IntErrorStatus</name>
<lsb>0</lsb>
<msb>7</msb>
</field>
</fields>
</register>
<register>
<name>DMA_IntErrClr</name>
<description>DMA_IntErrClr.</description>
<addressOffset>0x10</addressOffset>
<fields>
<field>
<name>IntErrClr</name>
<lsb>0</lsb>
<msb>7</msb>
</field>
</fields>
</register>
<register>
<name>DMA_RawIntTCStatus</name>
<description>DMA_RawIntTCStatus.</description>
<addressOffset>0x14</addressOffset>
<fields>
<field>
<name>RawIntTCStatus</name>
<lsb>0</lsb>
<msb>7</msb>
</field>
</fields>
</register>
<register>
<name>DMA_RawIntErrorStatus</name>
<description>DMA_RawIntErrorStatus.</description>
<addressOffset>0x18</addressOffset>
<fields>
<field>
<name>RawIntErrorStatus</name>
<lsb>0</lsb>
<msb>7</msb>
</field>
</fields>
</register>
<register>
<name>DMA_EnbldChns</name>
<description>DMA_EnbldChns.</description>
<addressOffset>0x1C</addressOffset>
<fields>
<field>
<name>EnabledChannels</name>
<lsb>0</lsb>
<msb>7</msb>
</field>
</fields>
</register>
<register>
<name>DMA_SoftBReq</name>
<description>DMA_SoftBReq.</description>
<addressOffset>0x20</addressOffset>
<fields>
<field>
<name>SoftBReq</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>DMA_SoftSReq</name>
<description>DMA_SoftSReq.</description>
<addressOffset>0x24</addressOffset>
<fields>
<field>
<name>SoftSReq</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>DMA_SoftLBReq</name>
<description>DMA_SoftLBReq.</description>
<addressOffset>0x28</addressOffset>
<fields>
<field>
<name>SoftLBReq</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>DMA_SoftLSReq</name>
<description>DMA_SoftLSReq.</description>
<addressOffset>0x2C</addressOffset>
<fields>
<field>
<name>SoftLSReq</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>DMA_Top_Config</name>
<description>DMA_Top_Config.</description>
<addressOffset>0x30</addressOffset>
<fields>
<field>
<name>M</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>E</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>DMA_Sync</name>
<description>DMA_Sync.</description>
<addressOffset>0x34</addressOffset>
<fields>
<field>
<name>DMA_Sync</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>DMA_C0SrcAddr</name>
<description>DMA_C0SrcAddr.</description>
<addressOffset>0x100</addressOffset>
<fields>
<field>
<name>SrcAddr</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>DMA_C0DstAddr</name>
<description>DMA_C0DstAddr.</description>
<addressOffset>0x104</addressOffset>
<fields>
<field>
<name>DstAddr</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>DMA_C0LLI</name>
<description>DMA_C0LLI.</description>
<addressOffset>0x108</addressOffset>
<fields>
<field>
<name>LLI</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>DMA_C0Control</name>
<description>DMA_C0Control.</description>
<addressOffset>0x10C</addressOffset>
<fields>
<field>
<name>I</name>
<lsb>31</lsb>
<msb>31</msb>
</field>
<field>
<name>Prot</name>
<lsb>28</lsb>
<msb>30</msb>
</field>
<field>
<name>DI</name>
<lsb>27</lsb>
<msb>27</msb>
</field>
<field>
<name>SI</name>
<lsb>26</lsb>
<msb>26</msb>
</field>
<field>
<name>SLargerD</name>
<lsb>24</lsb>
<msb>24</msb>
</field>
<field>
<name>DWidth</name>
<lsb>21</lsb>
<msb>23</msb>
</field>
<field>
<name>SWidth</name>
<lsb>18</lsb>
<msb>20</msb>
</field>
<field>
<name>DBSize</name>
<lsb>15</lsb>
<msb>17</msb>
</field>
<field>
<name>SBSize</name>
<lsb>12</lsb>
<msb>14</msb>
</field>
<field>
<name>TransferSize</name>
<lsb>0</lsb>
<msb>11</msb>
</field>
</fields>
</register>
<register>
<name>DMA_C0Config</name>
<description>DMA_C0Config.</description>
<addressOffset>0x110</addressOffset>
<fields>
<field>
<name>LLICounter</name>
<lsb>20</lsb>
<msb>29</msb>
</field>
<field>
<name>H</name>
<lsb>18</lsb>
<msb>18</msb>
</field>
<field>
<name>A</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>L</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>ITC</name>
<lsb>15</lsb>
<msb>15</msb>
</field>
<field>
<name>IE</name>
<lsb>14</lsb>
<msb>14</msb>
</field>
<field>
<name>FlowCntrl</name>
<lsb>11</lsb>
<msb>13</msb>
</field>
<field>
<name>DstPeripheral</name>
<lsb>6</lsb>
<msb>10</msb>
</field>
<field>
<name>SrcPeripheral</name>
<lsb>1</lsb>
<msb>5</msb>
</field>
<field>
<name>E</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>DMA_C1SrcAddr</name>
<description>DMA_C1SrcAddr.</description>
<addressOffset>0x200</addressOffset>
<fields>
<field>
<name>SrcAddr</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>DMA_C1DstAddr</name>
<description>DMA_C1DstAddr.</description>
<addressOffset>0x204</addressOffset>
<fields>
<field>
<name>DstAddr</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>DMA_C1LLI</name>
<description>DMA_C1LLI.</description>
<addressOffset>0x208</addressOffset>
<fields>
<field>
<name>LLI</name>
<lsb>2</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>DMA_C1Control</name>
<description>DMA_C1Control.</description>
<addressOffset>0x20C</addressOffset>
<fields>
<field>
<name>I</name>
<lsb>31</lsb>
<msb>31</msb>
</field>
<field>
<name>Prot</name>
<lsb>28</lsb>
<msb>30</msb>
</field>
<field>
<name>DI</name>
<lsb>27</lsb>
<msb>27</msb>
</field>
<field>
<name>SI</name>
<lsb>26</lsb>
<msb>26</msb>
</field>
<field>
<name>DWidth</name>
<lsb>21</lsb>
<msb>23</msb>
</field>
<field>
<name>SWidth</name>
<lsb>18</lsb>
<msb>20</msb>
</field>
<field>
<name>DBSize</name>
<lsb>15</lsb>
<msb>17</msb>
</field>
<field>
<name>SBSize</name>
<lsb>12</lsb>
<msb>14</msb>
</field>
<field>
<name>TransferSize</name>
<lsb>0</lsb>
<msb>11</msb>
</field>
</fields>
</register>
<register>
<name>DMA_C1Config</name>
<description>DMA_C1Config.</description>
<addressOffset>0x210</addressOffset>
<fields>
<field>
<name>H</name>
<lsb>18</lsb>
<msb>18</msb>
</field>
<field>
<name>A</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>L</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>ITC</name>
<lsb>15</lsb>
<msb>15</msb>
</field>
<field>
<name>IE</name>
<lsb>14</lsb>
<msb>14</msb>
</field>
<field>
<name>FlowCntrl</name>
<lsb>11</lsb>
<msb>13</msb>
</field>
<field>
<name>DstPeripheral</name>
<lsb>6</lsb>
<msb>10</msb>
</field>
<field>
<name>SrcPeripheral</name>
<lsb>1</lsb>
<msb>5</msb>
</field>
<field>
<name>E</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>DMA_C2SrcAddr</name>
<description>DMA_C2SrcAddr.</description>
<addressOffset>0x300</addressOffset>
<fields>
<field>
<name>SrcAddr</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>DMA_C2DstAddr</name>
<description>DMA_C2DstAddr.</description>
<addressOffset>0x304</addressOffset>
<fields>
<field>
<name>DstAddr</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>DMA_C2LLI</name>
<description>DMA_C2LLI.</description>
<addressOffset>0x308</addressOffset>
<fields>
<field>
<name>LLI</name>
<lsb>2</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>DMA_C2Control</name>
<description>DMA_C2Control.</description>
<addressOffset>0x30C</addressOffset>
<fields>
<field>
<name>I</name>
<lsb>31</lsb>
<msb>31</msb>
</field>
<field>
<name>Prot</name>
<lsb>28</lsb>
<msb>30</msb>
</field>
<field>
<name>DI</name>
<lsb>27</lsb>
<msb>27</msb>
</field>
<field>
<name>SI</name>
<lsb>26</lsb>
<msb>26</msb>
</field>
<field>
<name>DWidth</name>
<lsb>21</lsb>
<msb>23</msb>
</field>
<field>
<name>SWidth</name>
<lsb>18</lsb>
<msb>20</msb>
</field>
<field>
<name>DBSize</name>
<lsb>15</lsb>
<msb>17</msb>
</field>
<field>
<name>SBSize</name>
<lsb>12</lsb>
<msb>14</msb>
</field>
<field>
<name>TransferSize</name>
<lsb>0</lsb>
<msb>11</msb>
</field>
</fields>
</register>
<register>
<name>DMA_C2Config</name>
<description>DMA_C2Config.</description>
<addressOffset>0x310</addressOffset>
<fields>
<field>
<name>H</name>
<lsb>18</lsb>
<msb>18</msb>
</field>
<field>
<name>A</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>L</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>ITC</name>
<lsb>15</lsb>
<msb>15</msb>
</field>
<field>
<name>IE</name>
<lsb>14</lsb>
<msb>14</msb>
</field>
<field>
<name>FlowCntrl</name>
<lsb>11</lsb>
<msb>13</msb>
</field>
<field>
<name>DstPeripheral</name>
<lsb>6</lsb>
<msb>10</msb>
</field>
<field>
<name>SrcPeripheral</name>
<lsb>1</lsb>
<msb>5</msb>
</field>
<field>
<name>E</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>DMA_C3SrcAddr</name>
<description>DMA_C3SrcAddr.</description>
<addressOffset>0x400</addressOffset>
<fields>
<field>
<name>SrcAddr</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>DMA_C3DstAddr</name>
<description>DMA_C3DstAddr.</description>
<addressOffset>0x404</addressOffset>
<fields>
<field>
<name>DstAddr</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>DMA_C3LLI</name>
<description>DMA_C3LLI.</description>
<addressOffset>0x408</addressOffset>
<fields>
<field>
<name>LLI</name>
<lsb>2</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>DMA_C3Control</name>
<description>DMA_C3Control.</description>
<addressOffset>0x40C</addressOffset>
<fields>
<field>
<name>I</name>
<lsb>31</lsb>
<msb>31</msb>
</field>
<field>
<name>Prot</name>
<lsb>28</lsb>
<msb>30</msb>
</field>
<field>
<name>DI</name>
<lsb>27</lsb>
<msb>27</msb>
</field>
<field>
<name>SI</name>
<lsb>26</lsb>
<msb>26</msb>
</field>
<field>
<name>DWidth</name>
<lsb>21</lsb>
<msb>23</msb>
</field>
<field>
<name>SWidth</name>
<lsb>18</lsb>
<msb>20</msb>
</field>
<field>
<name>DBSize</name>
<lsb>15</lsb>
<msb>17</msb>
</field>
<field>
<name>SBSize</name>
<lsb>12</lsb>
<msb>14</msb>
</field>
<field>
<name>TransferSize</name>
<lsb>0</lsb>
<msb>11</msb>
</field>
</fields>
</register>
<register>
<name>DMA_C3Config</name>
<description>DMA_C3Config.</description>
<addressOffset>0x410</addressOffset>
<fields>
<field>
<name>H</name>
<lsb>18</lsb>
<msb>18</msb>
</field>
<field>
<name>A</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>L</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>ITC</name>
<lsb>15</lsb>
<msb>15</msb>
</field>
<field>
<name>IE</name>
<lsb>14</lsb>
<msb>14</msb>
</field>
<field>
<name>FlowCntrl</name>
<lsb>11</lsb>
<msb>13</msb>
</field>
<field>
<name>DstPeripheral</name>
<lsb>6</lsb>
<msb>10</msb>
</field>
<field>
<name>SrcPeripheral</name>
<lsb>1</lsb>
<msb>5</msb>
</field>
<field>
<name>E</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>pds</name>
<description>pds.</description>
<baseAddress>0x4000E000</baseAddress>
<groupName>pds</groupName>
<size>32</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>PDS_CTL</name>
<description>PDS_CTL.</description>
<addressOffset>0x0</addressOffset>
<fields>
<field>
<name>cr_pds_ctrl_pll</name>
<lsb>30</lsb>
<msb>31</msb>
</field>
<field>
<name>cr_pds_ctrl_rf</name>
<lsb>28</lsb>
<msb>29</msb>
</field>
<field>
<name>cr_pds_ldo_vol</name>
<lsb>24</lsb>
<msb>27</msb>
</field>
<field>
<name>cr_pds_pd_ldo11</name>
<lsb>22</lsb>
<msb>22</msb>
</field>
<field>
<name>cr_np_wfi_mask</name>
<lsb>21</lsb>
<msb>21</msb>
</field>
<field>
<name>cr_pds_ldo_vsel_en</name>
<lsb>18</lsb>
<msb>18</msb>
</field>
<field>
<name>cr_pds_rc32m_off_dis</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>cr_pds_rst_soc_en</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>cr_pds_soc_enb_force_on</name>
<lsb>15</lsb>
<msb>15</msb>
</field>
<field>
<name>cr_pds_pd_xtal</name>
<lsb>14</lsb>
<msb>14</msb>
</field>
<field>
<name>cr_pds_pwr_off</name>
<lsb>13</lsb>
<msb>13</msb>
</field>
<field>
<name>cr_pds_wait_xtal_rdy</name>
<lsb>12</lsb>
<msb>12</msb>
</field>
<field>
<name>cr_pds_iso_en</name>
<lsb>11</lsb>
<msb>11</msb>
</field>
<field>
<name>cr_pds_mem_stby</name>
<lsb>9</lsb>
<msb>9</msb>
</field>
<field>
<name>cr_pds_gate_clk</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>cr_pds_pd_bg_sys</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>cr_pds_pd_dcdc18</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>cr_wifi_pds_save_state</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>cr_xtal_force_off</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>cr_sleep_forever</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>pds_start_ps</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>PDS_TIME1</name>
<description>PDS_TIME1.</description>
<addressOffset>0x4</addressOffset>
<fields>
<field>
<name>cr_sleep_duration</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>PDS_INT</name>
<description>PDS_INT.</description>
<addressOffset>0xC</addressOffset>
<fields>
<field>
<name>cr_pds_int_clr</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>cr_pds_pll_done_int_mask</name>
<lsb>11</lsb>
<msb>11</msb>
</field>
<field>
<name>cr_pds_rf_done_int_mask</name>
<lsb>10</lsb>
<msb>10</msb>
</field>
<field>
<name>cr_pds_irq_in_dis</name>
<lsb>9</lsb>
<msb>9</msb>
</field>
<field>
<name>cr_pds_wake_int_mask</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>ro_pds_pll_done_int</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>ro_pds_rf_done_int</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>ro_pds_irq_in</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>ro_pds_wake_int</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>PDS_CTL2</name>
<description>PDS_CTL2.</description>
<addressOffset>0x10</addressOffset>
<fields>
<field>
<name>cr_pds_force_wb_gate_clk</name>
<lsb>18</lsb>
<msb>18</msb>
</field>
<field>
<name>cr_pds_force_np_gate_clk</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>cr_pds_force_wb_mem_stby</name>
<lsb>14</lsb>
<msb>14</msb>
</field>
<field>
<name>cr_pds_force_np_mem_stby</name>
<lsb>12</lsb>
<msb>12</msb>
</field>
<field>
<name>cr_pds_force_wb_pds_rst</name>
<lsb>10</lsb>
<msb>10</msb>
</field>
<field>
<name>cr_pds_force_np_pds_rst</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>cr_pds_force_wb_iso_en</name>
<lsb>6</lsb>
<msb>6</msb>
</field>
<field>
<name>cr_pds_force_np_iso_en</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>cr_pds_force_wb_pwr_off</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>cr_pds_force_np_pwr_off</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>PDS_CTL3</name>
<description>PDS_CTL3.</description>
<addressOffset>0x14</addressOffset>
<fields>
<field>
<name>cr_pds_misc_iso_en</name>
<lsb>30</lsb>
<msb>30</msb>
</field>
<field>
<name>cr_pds_wb_iso_en</name>
<lsb>27</lsb>
<msb>27</msb>
</field>
<field>
<name>cr_pds_np_iso_en</name>
<lsb>24</lsb>
<msb>24</msb>
</field>
<field>
<name>cr_pds_force_misc_gate_clk</name>
<lsb>13</lsb>
<msb>13</msb>
</field>
<field>
<name>cr_pds_force_misc_mem_stby</name>
<lsb>10</lsb>
<msb>10</msb>
</field>
<field>
<name>cr_pds_force_misc_pds_rst</name>
<lsb>7</lsb>
<msb>7</msb>
</field>
<field>
<name>cr_pds_force_misc_iso_en</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>cr_pds_force_misc_pwr_off</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>PDS_CTL4</name>
<description>PDS_CTL4.</description>
<addressOffset>0x18</addressOffset>
<fields>
<field>
<name>cr_pds_misc_gate_clk</name>
<lsb>27</lsb>
<msb>27</msb>
</field>
<field>
<name>cr_pds_misc_mem_stby</name>
<lsb>26</lsb>
<msb>26</msb>
</field>
<field>
<name>cr_pds_misc_reset</name>
<lsb>25</lsb>
<msb>25</msb>
</field>
<field>
<name>cr_pds_misc_pwr_off</name>
<lsb>24</lsb>
<msb>24</msb>
</field>
<field>
<name>cr_pds_wb_gate_clk</name>
<lsb>15</lsb>
<msb>15</msb>
</field>
<field>
<name>cr_pds_wb_mem_stby</name>
<lsb>14</lsb>
<msb>14</msb>
</field>
<field>
<name>cr_pds_wb_reset</name>
<lsb>13</lsb>
<msb>13</msb>
</field>
<field>
<name>cr_pds_wb_pwr_off</name>
<lsb>12</lsb>
<msb>12</msb>
</field>
<field>
<name>cr_pds_np_gate_clk</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>cr_pds_np_mem_stby</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>cr_pds_np_reset</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>cr_pds_np_pwr_off</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>pds_stat</name>
<description>pds_stat.</description>
<addressOffset>0x1C</addressOffset>
<fields>
<field>
<name>ro_pds_pll_state</name>
<lsb>16</lsb>
<msb>17</msb>
</field>
<field>
<name>ro_pds_rf_state</name>
<lsb>8</lsb>
<msb>11</msb>
</field>
<field>
<name>ro_pds_state</name>
<lsb>0</lsb>
<msb>3</msb>
</field>
</fields>
</register>
<register>
<name>pds_ram1</name>
<description>pds_ram1.</description>
<addressOffset>0x20</addressOffset>
<fields>
<field>
<name>cr_np_sram_pwr</name>
<lsb>0</lsb>
<msb>7</msb>
</field>
</fields>
</register>
<register>
<name>rc32m_ctrl0</name>
<description>rc32m_ctrl0.</description>
<addressOffset>0x300</addressOffset>
<fields>
<field>
<name>rc32m_code_fr_ext</name>
<lsb>22</lsb>
<msb>29</msb>
</field>
<field>
<name>rc32m_pd</name>
<lsb>21</lsb>
<msb>21</msb>
</field>
<field>
<name>rc32m_cal_en</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>rc32m_ext_code_en</name>
<lsb>19</lsb>
<msb>19</msb>
</field>
<field>
<name>rc32m_refclk_half</name>
<lsb>18</lsb>
<msb>18</msb>
</field>
<field>
<name>rc32m_allow_cal</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>rc32m_dig_code_fr_cal</name>
<lsb>6</lsb>
<msb>13</msb>
</field>
<field>
<name>rc32m_cal_precharge</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>rc32m_cal_div</name>
<lsb>3</lsb>
<msb>4</msb>
</field>
<field>
<name>rc32m_cal_inprogress</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>rc32m_rdy</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>rc32m_cal_done</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>rc32m_ctrl1</name>
<description>rc32m_ctrl1.</description>
<addressOffset>0x304</addressOffset>
<fields>
<field>
<name>rc32m_reserved</name>
<lsb>24</lsb>
<msb>31</msb>
</field>
<field>
<name>rc32m_clk_force_on</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>rc32m_clk_inv</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>rc32m_clk_soft_rst</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>rc32m_soft_rst</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>rc32m_test_en</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>pu_rst_clkpll</name>
<description>pu_rst_clkpll.</description>
<addressOffset>0x400</addressOffset>
<fields>
<field>
<name>pu_clkpll</name>
<lsb>10</lsb>
<msb>10</msb>
</field>
<field>
<name>pu_clkpll_sfreg</name>
<lsb>9</lsb>
<msb>9</msb>
</field>
<field>
<name>clkpll_pu_cp</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>clkpll_pu_pfd</name>
<lsb>7</lsb>
<msb>7</msb>
</field>
<field>
<name>clkpll_pu_clamp_op</name>
<lsb>6</lsb>
<msb>6</msb>
</field>
<field>
<name>clkpll_pu_fbdv</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>clkpll_pu_postdiv</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>clkpll_reset_refdiv</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>clkpll_reset_fbdv</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>clkpll_reset_postdiv</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>clkpll_sdm_reset</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>clkpll_top_ctrl</name>
<description>clkpll_top_ctrl.</description>
<addressOffset>0x404</addressOffset>
<fields>
<field>
<name>clkpll_vg13_sel</name>
<lsb>24</lsb>
<msb>25</msb>
</field>
<field>
<name>clkpll_vg11_sel</name>
<lsb>20</lsb>
<msb>21</msb>
</field>
<field>
<name>clkpll_refclk_sel</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>clkpll_xtal_rc32m_sel</name>
<lsb>12</lsb>
<msb>12</msb>
</field>
<field>
<name>clkpll_refdiv_ratio</name>
<lsb>8</lsb>
<msb>11</msb>
</field>
<field>
<name>clkpll_postdiv</name>
<lsb>0</lsb>
<msb>6</msb>
</field>
</fields>
</register>
<register>
<name>clkpll_cp</name>
<description>clkpll_cp.</description>
<addressOffset>0x408</addressOffset>
<fields>
<field>
<name>clkpll_cp_opamp_en</name>
<lsb>10</lsb>
<msb>10</msb>
</field>
<field>
<name>clkpll_cp_startup_en</name>
<lsb>9</lsb>
<msb>9</msb>
</field>
<field>
<name>clkpll_int_frac_sw</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>clkpll_icp_1u</name>
<lsb>6</lsb>
<msb>7</msb>
</field>
<field>
<name>clkpll_icp_5u</name>
<lsb>4</lsb>
<msb>5</msb>
</field>
<field>
<name>clkpll_sel_cp_bias</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>clkpll_rz</name>
<description>clkpll_rz.</description>
<addressOffset>0x40C</addressOffset>
<fields>
<field>
<name>clkpll_rz</name>
<lsb>16</lsb>
<msb>18</msb>
</field>
<field>
<name>clkpll_cz</name>
<lsb>14</lsb>
<msb>15</msb>
</field>
<field>
<name>clkpll_c3</name>
<lsb>12</lsb>
<msb>13</msb>
</field>
<field>
<name>clkpll_r4_short</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>clkpll_r4</name>
<lsb>4</lsb>
<msb>5</msb>
</field>
<field>
<name>clkpll_c4_en</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>clkpll_fbdv</name>
<description>clkpll_fbdv.</description>
<addressOffset>0x410</addressOffset>
<fields>
<field>
<name>clkpll_sel_fb_clk</name>
<lsb>2</lsb>
<msb>3</msb>
</field>
<field>
<name>clkpll_sel_sample_clk</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>clkpll_vco</name>
<description>clkpll_vco.</description>
<addressOffset>0x414</addressOffset>
<fields>
<field>
<name>clkpll_shrtr</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>clkpll_vco_speed</name>
<lsb>0</lsb>
<msb>2</msb>
</field>
</fields>
</register>
<register>
<name>clkpll_sdm</name>
<description>clkpll_sdm.</description>
<addressOffset>0x418</addressOffset>
<fields>
<field>
<name>clkpll_sdm_bypass</name>
<lsb>29</lsb>
<msb>29</msb>
</field>
<field>
<name>clkpll_sdm_flag</name>
<lsb>28</lsb>
<msb>28</msb>
</field>
<field>
<name>clkpll_dither_sel</name>
<lsb>24</lsb>
<msb>25</msb>
</field>
<field>
<name>clkpll_sdmin</name>
<lsb>0</lsb>
<msb>23</msb>
</field>
</fields>
</register>
<register>
<name>clkpll_output_en</name>
<description>clkpll_output_en.</description>
<addressOffset>0x41C</addressOffset>
<fields>
<field>
<name>clkpll_en_div2_480m</name>
<lsb>9</lsb>
<msb>9</msb>
</field>
<field>
<name>clkpll_en_32m</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>clkpll_en_48m</name>
<lsb>7</lsb>
<msb>7</msb>
</field>
<field>
<name>clkpll_en_80m</name>
<lsb>6</lsb>
<msb>6</msb>
</field>
<field>
<name>clkpll_en_96m</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>clkpll_en_120m</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>clkpll_en_160m</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>clkpll_en_192m</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>clkpll_en_240m</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>clkpll_en_480m</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>HBN</name>
<description>HBN.</description>
<baseAddress>0x4000F000</baseAddress>
<groupName>HBN</groupName>
<size>32</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>HBN_CTL</name>
<description>HBN_CTL.</description>
<addressOffset>0x0</addressOffset>
<fields>
<field>
<name>hbn_state</name>
<lsb>28</lsb>
<msb>31</msb>
</field>
<field>
<name>sram_slp</name>
<lsb>27</lsb>
<msb>27</msb>
</field>
<field>
<name>sram_slp_option</name>
<lsb>26</lsb>
<msb>26</msb>
</field>
<field>
<name>pwr_on_option</name>
<lsb>25</lsb>
<msb>25</msb>
</field>
<field>
<name>rtc_dly_option</name>
<lsb>24</lsb>
<msb>24</msb>
</field>
<field>
<name>pu_dcdc18_aon</name>
<lsb>23</lsb>
<msb>23</msb>
</field>
<field>
<name>hbn_ldo11_aon_vout_sel</name>
<lsb>19</lsb>
<msb>22</msb>
</field>
<field>
<name>hbn_ldo11_rt_vout_sel</name>
<lsb>15</lsb>
<msb>18</msb>
</field>
<field>
<name>hbn_dis_pwr_off_ldo11_rt</name>
<lsb>14</lsb>
<msb>14</msb>
</field>
<field>
<name>hbn_dis_pwr_off_ldo11</name>
<lsb>13</lsb>
<msb>13</msb>
</field>
<field>
<name>sw_rst</name>
<lsb>12</lsb>
<msb>12</msb>
</field>
<field>
<name>pwrdn_hbn_rtc</name>
<lsb>11</lsb>
<msb>11</msb>
</field>
<field>
<name>pwrdn_hbn_core</name>
<lsb>9</lsb>
<msb>9</msb>
</field>
<field>
<name>trap_mode</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>hbn_mode</name>
<lsb>7</lsb>
<msb>7</msb>
</field>
<field>
<name>rtc_ctl</name>
<lsb>0</lsb>
<msb>6</msb>
</field>
</fields>
</register>
<register>
<name>HBN_TIME_L</name>
<description>HBN_TIME_L.</description>
<addressOffset>0x4</addressOffset>
<fields>
<field>
<name>hbn_time_l</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>HBN_TIME_H</name>
<description>HBN_TIME_H.</description>
<addressOffset>0x8</addressOffset>
<fields>
<field>
<name>hbn_time_h</name>
<lsb>0</lsb>
<msb>7</msb>
</field>
</fields>
</register>
<register>
<name>RTC_TIME_L</name>
<description>RTC_TIME_L.</description>
<addressOffset>0xC</addressOffset>
<fields>
<field>
<name>rtc_time_latch_l</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>RTC_TIME_H</name>
<description>RTC_TIME_H.</description>
<addressOffset>0x10</addressOffset>
<fields>
<field>
<name>rtc_time_latch</name>
<lsb>31</lsb>
<msb>31</msb>
</field>
<field>
<name>rtc_time_latch_h</name>
<lsb>0</lsb>
<msb>7</msb>
</field>
</fields>
</register>
<register>
<name>HBN_IRQ_MODE</name>
<description>HBN_IRQ_MODE.</description>
<addressOffset>0x14</addressOffset>
<fields>
<field>
<name>pin_wakeup_en</name>
<lsb>27</lsb>
<msb>27</msb>
</field>
<field>
<name>pin_wakeup_sel</name>
<lsb>24</lsb>
<msb>26</msb>
</field>
<field>
<name>irq_acomp1_en</name>
<lsb>22</lsb>
<msb>23</msb>
</field>
<field>
<name>irq_acomp0_en</name>
<lsb>20</lsb>
<msb>21</msb>
</field>
<field>
<name>irq_bor_en</name>
<lsb>18</lsb>
<msb>18</msb>
</field>
<field>
<name>reg_en_hw_pu_pd</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>reg_aon_pad_ie_smt</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>hbn_pin_wakeup_mask</name>
<lsb>3</lsb>
<msb>4</msb>
</field>
<field>
<name>hbn_pin_wakeup_mode</name>
<lsb>0</lsb>
<msb>2</msb>
</field>
</fields>
</register>
<register>
<name>HBN_IRQ_STAT</name>
<description>HBN_IRQ_STAT.</description>
<addressOffset>0x18</addressOffset>
<fields>
<field>
<name>irq_stat</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>HBN_IRQ_CLR</name>
<description>HBN_IRQ_CLR.</description>
<addressOffset>0x1C</addressOffset>
<fields>
<field>
<name>irq_clr</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>HBN_PIR_CFG</name>
<description>HBN_PIR_CFG.</description>
<addressOffset>0x20</addressOffset>
<fields>
<field>
<name>gpadc_nosync</name>
<lsb>9</lsb>
<msb>9</msb>
</field>
<field>
<name>gpadc_cgen</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>pir_en</name>
<lsb>7</lsb>
<msb>7</msb>
</field>
<field>
<name>pir_dis</name>
<lsb>4</lsb>
<msb>5</msb>
</field>
<field>
<name>pir_lpf_sel</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>pir_hpf_sel</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>HBN_PIR_VTH</name>
<description>HBN_PIR_VTH.</description>
<addressOffset>0x24</addressOffset>
<fields>
<field>
<name>pir_vth</name>
<lsb>0</lsb>
<msb>13</msb>
</field>
</fields>
</register>
<register>
<name>HBN_PIR_INTERVAL</name>
<description>HBN_PIR_INTERVAL.</description>
<addressOffset>0x28</addressOffset>
<fields>
<field>
<name>pir_interval</name>
<lsb>0</lsb>
<msb>11</msb>
</field>
</fields>
</register>
<register>
<name>HBN_BOR_CFG</name>
<description>HBN_BOR_CFG.</description>
<addressOffset>0x2C</addressOffset>
<fields>
<field>
<name>r_bor_out</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>pu_bor</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>bor_vth</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>bor_sel</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>HBN_GLB</name>
<description>HBN_GLB.</description>
<addressOffset>0x30</addressOffset>
<fields>
<field>
<name>sw_ldo11_aon_vout_sel</name>
<lsb>28</lsb>
<msb>31</msb>
</field>
<field>
<name>sw_ldo11_rt_vout_sel</name>
<lsb>24</lsb>
<msb>27</msb>
</field>
<field>
<name>sw_ldo11soc_vout_sel_aon</name>
<lsb>16</lsb>
<msb>19</msb>
</field>
<field>
<name>hbn_pu_rc32k</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>hbn_f32k_sel</name>
<lsb>3</lsb>
<msb>4</msb>
</field>
<field>
<name>hbn_uart_clk_sel</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>hbn_root_clk_sel</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>HBN_SRAM</name>
<description>HBN_SRAM.</description>
<addressOffset>0x34</addressOffset>
<fields>
<field>
<name>retram_slp</name>
<lsb>7</lsb>
<msb>7</msb>
</field>
<field>
<name>retram_ret</name>
<lsb>6</lsb>
<msb>6</msb>
</field>
</fields>
</register>
<register>
<name>HBN_RSV0</name>
<description>HBN_RSV0.</description>
<addressOffset>0x100</addressOffset>
<fields>
<field>
<name>HBN_RSV0</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>HBN_RSV1</name>
<description>HBN_RSV1.</description>
<addressOffset>0x104</addressOffset>
<fields>
<field>
<name>HBN_RSV1</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>HBN_RSV2</name>
<description>HBN_RSV2.</description>
<addressOffset>0x108</addressOffset>
<fields>
<field>
<name>HBN_RSV2</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>HBN_RSV3</name>
<description>HBN_RSV3.</description>
<addressOffset>0x10C</addressOffset>
<fields>
<field>
<name>HBN_RSV3</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>rc32k_ctrl0</name>
<description>rc32k_ctrl0.</description>
<addressOffset>0x200</addressOffset>
<fields>
<field>
<name>rc32k_code_fr_ext</name>
<lsb>22</lsb>
<msb>31</msb>
</field>
<field>
<name>rc32k_cal_en</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>rc32k_ext_code_en</name>
<lsb>19</lsb>
<msb>19</msb>
</field>
<field>
<name>rc32k_allow_cal</name>
<lsb>18</lsb>
<msb>18</msb>
</field>
<field>
<name>rc32k_vref_dly</name>
<lsb>16</lsb>
<msb>17</msb>
</field>
<field>
<name>rc32k_dig_code_fr_cal</name>
<lsb>6</lsb>
<msb>15</msb>
</field>
<field>
<name>rc32k_cal_precharge</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>rc32k_cal_div</name>
<lsb>3</lsb>
<msb>4</msb>
</field>
<field>
<name>rc32k_cal_inprogress</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>rc32k_rdy</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>rc32k_cal_done</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>xtal32k</name>
<description>xtal32k.</description>
<addressOffset>0x204</addressOffset>
<fields>
<field>
<name>pu_xtal32k</name>
<lsb>19</lsb>
<msb>19</msb>
</field>
<field>
<name>pu_xtal32k_buf</name>
<lsb>18</lsb>
<msb>18</msb>
</field>
<field>
<name>xtal32k_ac_cap_short</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>xtal32k_capbank</name>
<lsb>11</lsb>
<msb>16</msb>
</field>
<field>
<name>xtal32k_inv_stre</name>
<lsb>9</lsb>
<msb>10</msb>
</field>
<field>
<name>xtal32k_otf_short</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>xtal32k_outbuf_stre</name>
<lsb>7</lsb>
<msb>7</msb>
</field>
<field>
<name>xtal32k_reg</name>
<lsb>5</lsb>
<msb>6</msb>
</field>
<field>
<name>xtal32k_amp_ctrl</name>
<lsb>3</lsb>
<msb>4</msb>
</field>
<field>
<name>xtal32k_ext_sel</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>AON</name>
<description>AON.</description>
<baseAddress>0x4000F800</baseAddress>
<groupName>AON</groupName>
<size>32</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>aon</name>
<description>aon.</description>
<addressOffset>0x800</addressOffset>
<fields>
<field>
<name>sw_pu_ldo11_rt</name>
<lsb>22</lsb>
<msb>22</msb>
</field>
<field>
<name>ldo11_rt_pulldown_sel</name>
<lsb>21</lsb>
<msb>21</msb>
</field>
<field>
<name>ldo11_rt_pulldown</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>pu_aon_dc_tbuf</name>
<lsb>12</lsb>
<msb>12</msb>
</field>
<field>
<name>aon_resv</name>
<lsb>0</lsb>
<msb>7</msb>
</field>
</fields>
</register>
<register>
<name>aon_common</name>
<description>aon_common.</description>
<addressOffset>0x804</addressOffset>
<fields>
<field>
<name>ten_cip_misc_aon</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>ten_mbg_aon</name>
<lsb>19</lsb>
<msb>19</msb>
</field>
<field>
<name>dten_xtal_aon</name>
<lsb>18</lsb>
<msb>18</msb>
</field>
<field>
<name>ten_xtal_aon</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>ten_ldo15rf_aon</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>ten_bg_sys_aon</name>
<lsb>12</lsb>
<msb>12</msb>
</field>
<field>
<name>ten_dcdc18_1_aon</name>
<lsb>11</lsb>
<msb>11</msb>
</field>
<field>
<name>ten_dcdc18_0_aon</name>
<lsb>10</lsb>
<msb>10</msb>
</field>
<field>
<name>ten_ldo11soc_aon</name>
<lsb>9</lsb>
<msb>9</msb>
</field>
<field>
<name>ten_vddcore_aon</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>ten_xtal32k</name>
<lsb>6</lsb>
<msb>6</msb>
</field>
<field>
<name>dten_xtal32k</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>ten_aon</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>tmux_aon</name>
<lsb>0</lsb>
<msb>2</msb>
</field>
</fields>
</register>
<register>
<name>aon_misc</name>
<description>aon_misc.</description>
<addressOffset>0x808</addressOffset>
<fields>
<field>
<name>sw_wb_en_aon</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>sw_soc_en_aon</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>bg_sys_top</name>
<description>bg_sys_top.</description>
<addressOffset>0x810</addressOffset>
<fields>
<field>
<name>bg_sys_start_ctrl_aon</name>
<lsb>12</lsb>
<msb>12</msb>
</field>
<field>
<name>pu_bg_sys_aon</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>pmip_resv</name>
<lsb>0</lsb>
<msb>7</msb>
</field>
</fields>
</register>
<register>
<name>dcdc18_top_0</name>
<description>dcdc18_top_0.</description>
<addressOffset>0x814</addressOffset>
<fields>
<field>
<name>dcdc18_rdy_aon</name>
<lsb>31</lsb>
<msb>31</msb>
</field>
<field>
<name>dcdc18_sstart_time_aon</name>
<lsb>28</lsb>
<msb>29</msb>
</field>
<field>
<name>dcdc18_osc_inhibit_t2_aon</name>
<lsb>27</lsb>
<msb>27</msb>
</field>
<field>
<name>dcdc18_slow_osc_aon</name>
<lsb>26</lsb>
<msb>26</msb>
</field>
<field>
<name>dcdc18_stop_osc_aon</name>
<lsb>25</lsb>
<msb>25</msb>
</field>
<field>
<name>dcdc18_slope_curr_sel_aon</name>
<lsb>20</lsb>
<msb>24</msb>
</field>
<field>
<name>dcdc18_osc_freq_trim_aon</name>
<lsb>16</lsb>
<msb>19</msb>
</field>
<field>
<name>dcdc18_osc_2m_mode_aon</name>
<lsb>12</lsb>
<msb>12</msb>
</field>
<field>
<name>dcdc18_vpfm_aon</name>
<lsb>8</lsb>
<msb>11</msb>
</field>
<field>
<name>dcdc18_vout_sel_aon</name>
<lsb>1</lsb>
<msb>5</msb>
</field>
</fields>
</register>
<register>
<name>dcdc18_top_1</name>
<description>dcdc18_top_1.</description>
<addressOffset>0x818</addressOffset>
<fields>
<field>
<name>dcdc18_pulldown_aon</name>
<lsb>29</lsb>
<msb>29</msb>
</field>
<field>
<name>dcdc18_en_antiring_aon</name>
<lsb>28</lsb>
<msb>28</msb>
</field>
<field>
<name>dcdc18_cfb_sel_aon</name>
<lsb>24</lsb>
<msb>27</msb>
</field>
<field>
<name>dcdc18_chf_sel_aon</name>
<lsb>20</lsb>
<msb>23</msb>
</field>
<field>
<name>dcdc18_rc_sel_aon</name>
<lsb>16</lsb>
<msb>19</msb>
</field>
<field>
<name>dcdc18_nonoverlap_td_aon</name>
<lsb>8</lsb>
<msb>12</msb>
</field>
<field>
<name>dcdc18_zvs_td_opt_aon</name>
<lsb>4</lsb>
<msb>6</msb>
</field>
<field>
<name>dcdc18_cs_delay_aon</name>
<lsb>1</lsb>
<msb>3</msb>
</field>
<field>
<name>dcdc18_force_cs_zvs_aon</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>ldo11soc_and_dctest</name>
<description>ldo11soc_and_dctest.</description>
<addressOffset>0x81C</addressOffset>
<fields>
<field>
<name>pmip_dc_tp_out_en_aon</name>
<lsb>31</lsb>
<msb>31</msb>
</field>
<field>
<name>pu_vddcore_misc_aon</name>
<lsb>30</lsb>
<msb>30</msb>
</field>
<field>
<name>ldo11soc_power_good_aon</name>
<lsb>29</lsb>
<msb>29</msb>
</field>
<field>
<name>ldo11soc_rdy_aon</name>
<lsb>28</lsb>
<msb>28</msb>
</field>
<field>
<name>ldo11soc_cc_aon</name>
<lsb>24</lsb>
<msb>25</msb>
</field>
<field>
<name>ldo11soc_vth_sel_aon</name>
<lsb>12</lsb>
<msb>13</msb>
</field>
<field>
<name>ldo11soc_pulldown_sel_aon</name>
<lsb>11</lsb>
<msb>11</msb>
</field>
<field>
<name>ldo11soc_pulldown_aon</name>
<lsb>10</lsb>
<msb>10</msb>
</field>
<field>
<name>ldo11soc_sstart_delay_aon</name>
<lsb>8</lsb>
<msb>9</msb>
</field>
<field>
<name>ldo11soc_sstart_sel_aon</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>pu_ldo11soc_aon</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>psw_irrcv</name>
<description>psw_irrcv.</description>
<addressOffset>0x820</addressOffset>
<fields>
<field>
<name>pu_ir_psw_aon</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>rf_top_aon</name>
<description>rf_top_aon.</description>
<addressOffset>0x880</addressOffset>
<fields>
<field>
<name>ldo15rf_bypass_aon</name>
<lsb>28</lsb>
<msb>28</msb>
</field>
<field>
<name>ldo15rf_cc_aon</name>
<lsb>24</lsb>
<msb>25</msb>
</field>
<field>
<name>ldo15rf_vout_sel_aon</name>
<lsb>16</lsb>
<msb>18</msb>
</field>
<field>
<name>ldo15rf_pulldown_sel_aon</name>
<lsb>13</lsb>
<msb>13</msb>
</field>
<field>
<name>ldo15rf_pulldown_aon</name>
<lsb>12</lsb>
<msb>12</msb>
</field>
<field>
<name>ldo15rf_sstart_delay_aon</name>
<lsb>9</lsb>
<msb>10</msb>
</field>
<field>
<name>ldo15rf_sstart_sel_aon</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>pu_xtal_aon</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>pu_xtal_buf_aon</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>pu_sfreg_aon</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>pu_ldo15rf_aon</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>pu_mbg_aon</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>xtal_cfg</name>
<description>xtal_cfg.</description>
<addressOffset>0x884</addressOffset>
<fields>
<field>
<name>xtal_rdy_sel_aon</name>
<lsb>30</lsb>
<msb>31</msb>
</field>
<field>
<name>xtal_gm_boost_aon</name>
<lsb>28</lsb>
<msb>29</msb>
</field>
<field>
<name>xtal_capcode_in_aon</name>
<lsb>22</lsb>
<msb>27</msb>
</field>
<field>
<name>xtal_capcode_out_aon</name>
<lsb>16</lsb>
<msb>21</msb>
</field>
<field>
<name>xtal_amp_ctrl_aon</name>
<lsb>14</lsb>
<msb>15</msb>
</field>
<field>
<name>xtal_sleep_aon</name>
<lsb>13</lsb>
<msb>13</msb>
</field>
<field>
<name>xtal_fast_startup_aon</name>
<lsb>12</lsb>
<msb>12</msb>
</field>
<field>
<name>xtal_buf_hp_aon</name>
<lsb>8</lsb>
<msb>11</msb>
</field>
<field>
<name>xtal_buf_en_aon</name>
<lsb>4</lsb>
<msb>7</msb>
</field>
<field>
<name>xtal_ext_sel_aon</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>xtal_capcode_extra_aon</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>xtal_bk_aon</name>
<lsb>0</lsb>
<msb>1</msb>
</field>
</fields>
</register>
<register>
<name>tsen</name>
<description>tsen.</description>
<addressOffset>0x888</addressOffset>
<fields>
<field>
<name>xtal_rdy_int_sel_aon</name>
<lsb>30</lsb>
<msb>31</msb>
</field>
<field>
<name>xtal_inn_cfg_en_aon</name>
<lsb>29</lsb>
<msb>29</msb>
</field>
<field>
<name>xtal_rdy</name>
<lsb>28</lsb>
<msb>28</msb>
</field>
<field>
<name>tsen_refcode_rfcal</name>
<lsb>16</lsb>
<msb>27</msb>
</field>
<field>
<name>tsen_refcode_corner</name>
<lsb>0</lsb>
<msb>11</msb>
</field>
</fields>
</register>
<register>
<name>acomp0_ctrl</name>
<description>acomp0_ctrl.</description>
<addressOffset>0x900</addressOffset>
<fields>
<field>
<name>acomp0_muxen</name>
<lsb>26</lsb>
<msb>26</msb>
</field>
<field>
<name>acomp0_pos_sel</name>
<lsb>22</lsb>
<msb>25</msb>
</field>
<field>
<name>acomp0_neg_sel</name>
<lsb>18</lsb>
<msb>21</msb>
</field>
<field>
<name>acomp0_level_sel</name>
<lsb>12</lsb>
<msb>17</msb>
</field>
<field>
<name>acomp0_bias_prog</name>
<lsb>10</lsb>
<msb>11</msb>
</field>
<field>
<name>acomp0_hyst_selp</name>
<lsb>7</lsb>
<msb>9</msb>
</field>
<field>
<name>acomp0_hyst_seln</name>
<lsb>4</lsb>
<msb>6</msb>
</field>
<field>
<name>acomp0_en</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>acomp1_ctrl</name>
<description>acomp1_ctrl.</description>
<addressOffset>0x904</addressOffset>
<fields>
<field>
<name>acomp1_muxen</name>
<lsb>26</lsb>
<msb>26</msb>
</field>
<field>
<name>acomp1_pos_sel</name>
<lsb>22</lsb>
<msb>25</msb>
</field>
<field>
<name>acomp1_neg_sel</name>
<lsb>18</lsb>
<msb>21</msb>
</field>
<field>
<name>acomp1_level_sel</name>
<lsb>12</lsb>
<msb>17</msb>
</field>
<field>
<name>acomp1_bias_prog</name>
<lsb>10</lsb>
<msb>11</msb>
</field>
<field>
<name>acomp1_hyst_selp</name>
<lsb>7</lsb>
<msb>9</msb>
</field>
<field>
<name>acomp1_hyst_seln</name>
<lsb>4</lsb>
<msb>6</msb>
</field>
<field>
<name>acomp1_en</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>acomp_ctrl</name>
<description>acomp_ctrl.</description>
<addressOffset>0x908</addressOffset>
<fields>
<field>
<name>acomp_reserved</name>
<lsb>24</lsb>
<msb>31</msb>
</field>
<field>
<name>acomp0_out_raw</name>
<lsb>19</lsb>
<msb>19</msb>
</field>
<field>
<name>acomp1_out_raw</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>acomp0_test_sel</name>
<lsb>12</lsb>
<msb>13</msb>
</field>
<field>
<name>acomp1_test_sel</name>
<lsb>10</lsb>
<msb>11</msb>
</field>
<field>
<name>acomp0_test_en</name>
<lsb>9</lsb>
<msb>9</msb>
</field>
<field>
<name>acomp1_test_en</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>acomp0_rstn_ana</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>acomp1_rstn_ana</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>gpadc_reg_cmd</name>
<description>gpadc_reg_cmd.</description>
<addressOffset>0x90C</addressOffset>
<fields>
<field>
<name>gpadc_sen_test_en</name>
<lsb>30</lsb>
<msb>30</msb>
</field>
<field>
<name>gpadc_sen_sel</name>
<lsb>28</lsb>
<msb>29</msb>
</field>
<field>
<name>gpadc_chip_sen_pu</name>
<lsb>27</lsb>
<msb>27</msb>
</field>
<field>
<name>gpadc_micboost_32db_en</name>
<lsb>23</lsb>
<msb>23</msb>
</field>
<field>
<name>gpadc_mic_pga2_gain</name>
<lsb>21</lsb>
<msb>22</msb>
</field>
<field>
<name>gpadc_mic1_diff</name>
<lsb>20</lsb>
<msb>20</msb>
</field>
<field>
<name>gpadc_mic2_diff</name>
<lsb>19</lsb>
<msb>19</msb>
</field>
<field>
<name>gpadc_dwa_en</name>
<lsb>18</lsb>
<msb>18</msb>
</field>
<field>
<name>gpadc_byp_micboost</name>
<lsb>16</lsb>
<msb>16</msb>
</field>
<field>
<name>gpadc_micpga_en</name>
<lsb>15</lsb>
<msb>15</msb>
</field>
<field>
<name>gpadc_micbias_en</name>
<lsb>14</lsb>
<msb>14</msb>
</field>
<field>
<name>gpadc_neg_gnd</name>
<lsb>13</lsb>
<msb>13</msb>
</field>
<field>
<name>gpadc_pos_sel</name>
<lsb>8</lsb>
<msb>12</msb>
</field>
<field>
<name>gpadc_neg_sel</name>
<lsb>3</lsb>
<msb>7</msb>
</field>
<field>
<name>gpadc_soft_rst</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
<field>
<name>gpadc_conv_start</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>gpadc_global_en</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>gpadc_reg_config1</name>
<description>gpadc_reg_config1.</description>
<addressOffset>0x910</addressOffset>
<fields>
<field>
<name>gpadc_v18_sel</name>
<lsb>29</lsb>
<msb>30</msb>
</field>
<field>
<name>gpadc_v11_sel</name>
<lsb>27</lsb>
<msb>28</msb>
</field>
<field>
<name>gpadc_dither_en</name>
<lsb>26</lsb>
<msb>26</msb>
</field>
<field>
<name>gpadc_scan_en</name>
<lsb>25</lsb>
<msb>25</msb>
</field>
<field>
<name>gpadc_scan_length</name>
<lsb>21</lsb>
<msb>24</msb>
</field>
<field>
<name>gpadc_clk_div_ratio</name>
<lsb>18</lsb>
<msb>20</msb>
</field>
<field>
<name>gpadc_clk_ana_inv</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>gpadc_res_sel</name>
<lsb>2</lsb>
<msb>4</msb>
</field>
<field>
<name>gpadc_cont_conv_en</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>gpadc_cal_os_en</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>gpadc_reg_config2</name>
<description>gpadc_reg_config2.</description>
<addressOffset>0x914</addressOffset>
<fields>
<field>
<name>gpadc_tsvbe_low</name>
<lsb>31</lsb>
<msb>31</msb>
</field>
<field>
<name>gpadc_dly_sel</name>
<lsb>28</lsb>
<msb>30</msb>
</field>
<field>
<name>gpadc_pga1_gain</name>
<lsb>25</lsb>
<msb>27</msb>
</field>
<field>
<name>gpadc_pga2_gain</name>
<lsb>22</lsb>
<msb>24</msb>
</field>
<field>
<name>gpadc_test_sel</name>
<lsb>19</lsb>
<msb>21</msb>
</field>
<field>
<name>gpadc_test_en</name>
<lsb>18</lsb>
<msb>18</msb>
</field>
<field>
<name>gpadc_bias_sel</name>
<lsb>17</lsb>
<msb>17</msb>
</field>
<field>
<name>gpadc_chop_mode</name>
<lsb>15</lsb>
<msb>16</msb>
</field>
<field>
<name>gpadc_pga_vcmi_en</name>
<lsb>14</lsb>
<msb>14</msb>
</field>
<field>
<name>gpadc_pga_en</name>
<lsb>13</lsb>
<msb>13</msb>
</field>
<field>
<name>gpadc_pga_os_cal</name>
<lsb>9</lsb>
<msb>12</msb>
</field>
<field>
<name>gpadc_pga_vcm</name>
<lsb>7</lsb>
<msb>8</msb>
</field>
<field>
<name>gpadc_ts_en</name>
<lsb>6</lsb>
<msb>6</msb>
</field>
<field>
<name>gpadc_tsext_sel</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>gpadc_vbat_en</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>gpadc_vref_sel</name>
<lsb>3</lsb>
<msb>3</msb>
</field>
<field>
<name>gpadc_diff_mode</name>
<lsb>2</lsb>
<msb>2</msb>
</field>
</fields>
</register>
<register>
<name>gpadc_reg_scn_pos1</name>
<description>adc converation sequence 1</description>
<addressOffset>0x918</addressOffset>
<fields>
<field>
<name>gpadc_scan_pos_5</name>
<lsb>25</lsb>
<msb>29</msb>
</field>
<field>
<name>gpadc_scan_pos_4</name>
<lsb>20</lsb>
<msb>24</msb>
</field>
<field>
<name>gpadc_scan_pos_3</name>
<lsb>15</lsb>
<msb>19</msb>
</field>
<field>
<name>gpadc_scan_pos_2</name>
<lsb>10</lsb>
<msb>14</msb>
</field>
<field>
<name>gpadc_scan_pos_1</name>
<lsb>5</lsb>
<msb>9</msb>
</field>
<field>
<name>gpadc_scan_pos_0</name>
<lsb>0</lsb>
<msb>4</msb>
</field>
</fields>
</register>
<register>
<name>gpadc_reg_scn_pos2</name>
<description>adc converation sequence 2</description>
<addressOffset>0x91C</addressOffset>
<fields>
<field>
<name>gpadc_scan_pos_11</name>
<lsb>25</lsb>
<msb>29</msb>
</field>
<field>
<name>gpadc_scan_pos_10</name>
<lsb>20</lsb>
<msb>24</msb>
</field>
<field>
<name>gpadc_scan_pos_9</name>
<lsb>15</lsb>
<msb>19</msb>
</field>
<field>
<name>gpadc_scan_pos_8</name>
<lsb>10</lsb>
<msb>14</msb>
</field>
<field>
<name>gpadc_scan_pos_7</name>
<lsb>5</lsb>
<msb>9</msb>
</field>
<field>
<name>gpadc_scan_pos_6</name>
<lsb>0</lsb>
<msb>4</msb>
</field>
</fields>
</register>
<register>
<name>gpadc_reg_scn_neg1</name>
<description>adc converation sequence 3</description>
<addressOffset>0x920</addressOffset>
<fields>
<field>
<name>gpadc_scan_neg_5</name>
<lsb>25</lsb>
<msb>29</msb>
</field>
<field>
<name>gpadc_scan_neg_4</name>
<lsb>20</lsb>
<msb>24</msb>
</field>
<field>
<name>gpadc_scan_neg_3</name>
<lsb>15</lsb>
<msb>19</msb>
</field>
<field>
<name>gpadc_scan_neg_2</name>
<lsb>10</lsb>
<msb>14</msb>
</field>
<field>
<name>gpadc_scan_neg_1</name>
<lsb>5</lsb>
<msb>9</msb>
</field>
<field>
<name>gpadc_scan_neg_0</name>
<lsb>0</lsb>
<msb>4</msb>
</field>
</fields>
</register>
<register>
<name>gpadc_reg_scn_neg2</name>
<description>adc converation sequence 4</description>
<addressOffset>0x924</addressOffset>
<fields>
<field>
<name>gpadc_scan_neg_11</name>
<lsb>25</lsb>
<msb>29</msb>
</field>
<field>
<name>gpadc_scan_neg_10</name>
<lsb>20</lsb>
<msb>24</msb>
</field>
<field>
<name>gpadc_scan_neg_9</name>
<lsb>15</lsb>
<msb>19</msb>
</field>
<field>
<name>gpadc_scan_neg_8</name>
<lsb>10</lsb>
<msb>14</msb>
</field>
<field>
<name>gpadc_scan_neg_7</name>
<lsb>5</lsb>
<msb>9</msb>
</field>
<field>
<name>gpadc_scan_neg_6</name>
<lsb>0</lsb>
<msb>4</msb>
</field>
</fields>
</register>
<register>
<name>gpadc_reg_status</name>
<description>gpadc_reg_status.</description>
<addressOffset>0x928</addressOffset>
<fields>
<field>
<name>gpadc_reserved</name>
<lsb>16</lsb>
<msb>31</msb>
</field>
<field>
<name>gpadc_data_rdy</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>gpadc_reg_isr</name>
<description>gpadc_reg_isr.</description>
<addressOffset>0x92C</addressOffset>
<fields>
<field>
<name>gpadc_pos_satur_mask</name>
<lsb>9</lsb>
<msb>9</msb>
</field>
<field>
<name>gpadc_neg_satur_mask</name>
<lsb>8</lsb>
<msb>8</msb>
</field>
<field>
<name>gpadc_pos_satur_clr</name>
<lsb>5</lsb>
<msb>5</msb>
</field>
<field>
<name>gpadc_neg_satur_clr</name>
<lsb>4</lsb>
<msb>4</msb>
</field>
<field>
<name>gpadc_pos_satur</name>
<lsb>1</lsb>
<msb>1</msb>
</field>
<field>
<name>gpadc_neg_satur</name>
<lsb>0</lsb>
<msb>0</msb>
</field>
</fields>
</register>
<register>
<name>gpadc_reg_result</name>
<description>gpadc_reg_result.</description>
<addressOffset>0x930</addressOffset>
<fields>
<field>
<name>gpadc_data_out</name>
<lsb>0</lsb>
<msb>25</msb>
</field>
</fields>
</register>
<register>
<name>gpadc_reg_raw_result</name>
<description>gpadc_reg_raw_result.</description>
<addressOffset>0x934</addressOffset>
<fields>
<field>
<name>gpadc_raw_data</name>
<lsb>0</lsb>
<msb>11</msb>
</field>
</fields>
</register>
<register>
<name>gpadc_reg_define</name>
<description>gpadc_reg_define.</description>
<addressOffset>0x938</addressOffset>
<fields>
<field>
<name>gpadc_os_cal_data</name>
<lsb>0</lsb>
<msb>15</msb>
</field>
</fields>
</register>
<register>
<name>hbncore_resv0</name>
<description>hbncore_resv0.</description>
<addressOffset>0x93C</addressOffset>
<fields>
<field>
<name>hbncore_resv0_data</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
<name>hbncore_resv1</name>
<description>hbncore_resv1.</description>
<addressOffset>0x940</addressOffset>
<fields>
<field>
<name>hbncore_resv1_data</name>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
</registers>
</peripheral>
</peripherals>
</device>
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