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bl_mcu_sdk/bsp/board/bl616dk/board.c
2022-10-24 19:05:55 +08:00

349 lines
12 KiB
C

#include "bflb_uart.h"
#include "bflb_irq.h"
#include "bflb_gpio.h"
#include "bflb_clock.h"
#include "bflb_rtc.h"
#include "mmheap.h"
#include "board.h"
#include "bl616_tzc_sec.h"
#include "bl616_psram.h"
#include "bl616_glb.h"
#define WB_4MB_PSRAM (1)
#ifdef CONFIG_BSP_SDH_SDCARD
#include "sdh_sdcard.h"
#endif
extern uint32_t __HeapBase;
extern uint32_t __HeapLimit;
struct heap_info mmheap_root;
static struct heap_region system_mmheap[] = {
{ NULL, 0 },
{ NULL, 0 }, /* Terminates the array. */
};
static struct bflb_device_s *uart0;
#if (defined(CONFIG_LUA) || defined(CONFIG_BFLOG))
static struct bflb_device_s *rtc;
#endif
static void system_clock_init(void)
{
/* wifipll/audiopll */
GLB_Power_On_XTAL_And_PLL_CLK(GLB_XTAL_40M, GLB_PLL_WIFIPLL | GLB_PLL_AUPLL);
GLB_Set_MCU_System_CLK(GLB_MCU_SYS_CLK_TOP_WIFIPLL_320M);
CPU_Set_MTimer_CLK(ENABLE, BL_MTIMER_SOURCE_CLOCK_MCU_CLK, Clock_System_Clock_Get(BL_SYSTEM_CLOCK_MCU_CLK) / 1000000 - 1);
}
static void peripheral_clock_init(void)
{
PERIPHERAL_CLOCK_ADC_DAC_ENABLE();
PERIPHERAL_CLOCK_SEC_ENABLE();
PERIPHERAL_CLOCK_DMA0_ENABLE();
PERIPHERAL_CLOCK_UART0_ENABLE();
PERIPHERAL_CLOCK_UART1_ENABLE();
PERIPHERAL_CLOCK_SPI0_ENABLE();
PERIPHERAL_CLOCK_I2C0_ENABLE();
PERIPHERAL_CLOCK_PWM0_ENABLE();
PERIPHERAL_CLOCK_TIMER0_1_WDG_ENABLE();
PERIPHERAL_CLOCK_IR_ENABLE();
PERIPHERAL_CLOCK_I2S_ENABLE();
PERIPHERAL_CLOCK_USB_ENABLE();
GLB_Set_UART_CLK(ENABLE, HBN_UART_CLK_XCLK, 0);
GLB_Set_SPI_CLK(ENABLE, GLB_SPI_CLK_MCU_MUXPLL_160M, 0);
GLB_Set_I2C_CLK(ENABLE, GLB_I2C_CLK_XCLK, 0);
GLB_Set_ADC_CLK(ENABLE, GLB_ADC_CLK_XCLK, 0);
GLB_Set_DIG_CLK_Sel(GLB_DIG_CLK_XCLK);
GLB_Set_DIG_512K_CLK(ENABLE, ENABLE, 0x4E);
GLB_Set_PWM1_IO_Sel(GLB_PWM1_IO_DIFF_END);
#ifdef CONFIG_BSP_SDH_SDCARD
PERIPHERAL_CLOCK_SDH_ENABLE();
GLB_Set_SDH_CLK(ENABLE, GLB_SDH_CLK_WIFIPLL_96M, 0);
GLB_AHB_MCU_Software_Reset(GLB_AHB_MCU_SW_EXT_SDH);
SDH_ClockSet(400000, 96000000, 48000000);
#endif
GLB_Set_USB_CLK_From_WIFIPLL(1);
}
static void bflb_init_psram_gpio(void)
{
GLB_GPIO_Cfg_Type cfg;
cfg.pullType = GPIO_PULL_NONE;
cfg.drive = 0;
cfg.smtCtrl = 1;
for (uint8_t i = 0; i < 12; i++) {
cfg.gpioPin = 41 + i;
cfg.gpioMode = GPIO_MODE_INPUT;
GLB_GPIO_Init(&cfg);
}
}
static void psram_winbond_default_init(void)
{
PSRAM_Ctrl_Cfg_Type default_psram_ctrl_cfg = {
.vendor = PSRAM_CTRL_VENDOR_WINBOND,
.ioMode = PSRAM_CTRL_X8_MODE,
.size = PSRAM_SIZE_4MB,
.dqs_delay = 0xfff0,
};
PSRAM_Winbond_Cfg_Type default_winbond_cfg = {
.rst = DISABLE,
.clockType = PSRAM_CLOCK_DIFF,
.inputPowerDownMode = DISABLE,
.hybridSleepMode = DISABLE,
.linear_dis = ENABLE,
.PASR = PSRAM_PARTIAL_REFRESH_FULL,
.disDeepPowerDownMode = ENABLE,
.fixedLatency = DISABLE,
.brustLen = PSRAM_WINBOND_BURST_LENGTH_32_BYTES,
.brustType = PSRAM_WRAPPED_BURST,
.latency = PSRAM_WINBOND_6_CLOCKS_LATENCY,
.driveStrength = PSRAM_WINBOND_DRIVE_STRENGTH_35_OHMS_FOR_4M_115_OHMS_FOR_8M,
};
PSram_Ctrl_Init(PSRAM0_ID, &default_psram_ctrl_cfg);
// PSram_Ctrl_Winbond_Reset(PSRAM0_ID);
PSram_Ctrl_Winbond_Write_Reg(PSRAM0_ID, PSRAM_WINBOND_REG_CR0, &default_winbond_cfg);
}
uint32_t board_psram_x8_init(void)
{
uint16_t reg_read = 0;
GLB_Set_PSRAMB_CLK_Sel(ENABLE, GLB_PSRAMB_EMI_WIFIPLL_320M, 0);
bflb_init_psram_gpio();
/* psram init*/
psram_winbond_default_init();
/* check psram work or not */
PSram_Ctrl_Winbond_Read_Reg(PSRAM0_ID, PSRAM_WINBOND_REG_ID0, &reg_read);
return reg_read;
}
void bl_show_log(void)
{
printf("\r\n");
printf(" ____ __ __ _ _ _ \r\n");
printf(" | _ \\ / _|/ _| | | | | | | \r\n");
printf(" | |_) | ___ _ _| |_| |_ __ _| | ___ | | __ _| |__ \r\n");
printf(" | _ < / _ \\| | | | _| _/ _` | |/ _ \\| |/ _` | '_ \\ \r\n");
printf(" | |_) | (_) | |_| | | | || (_| | | (_) | | (_| | |_) |\r\n");
printf(" |____/ \\___/ \\__,_|_| |_| \\__,_|_|\\___/|_|\\__,_|_.__/ \r\n");
printf("\r\n");
printf("Build:%s,%s\r\n", __TIME__, __DATE__);
printf("Copyright (c) 2022 Bouffalolab team\r\n");
}
extern void bflb_uart_set_console(struct bflb_device_s *dev);
static void console_init()
{
struct bflb_device_s *gpio;
gpio = bflb_device_get_by_name("gpio");
bflb_gpio_uart_init(gpio, GPIO_PIN_21, GPIO_UART_FUNC_UART0_TX);
bflb_gpio_uart_init(gpio, GPIO_PIN_22, GPIO_UART_FUNC_UART0_RX);
struct bflb_uart_config_s cfg;
cfg.baudrate = 2000000;
cfg.data_bits = UART_DATA_BITS_8;
cfg.stop_bits = UART_STOP_BITS_1;
cfg.parity = UART_PARITY_NONE;
cfg.flow_ctrl = 0;
cfg.tx_fifo_threshold = 7;
cfg.rx_fifo_threshold = 7;
uart0 = bflb_device_get_by_name("uart0");
bflb_uart_init(uart0, &cfg);
bflb_uart_set_console(uart0);
}
void board_init(void)
{
bflb_irq_initialize();
system_clock_init();
peripheral_clock_init();
system_mmheap[0].addr = (uint8_t *)&__HeapBase;
system_mmheap[0].mem_size = ((size_t)&__HeapLimit - (size_t)&__HeapBase);
if (system_mmheap[0].mem_size > 0) {
mmheap_init(&mmheap_root, system_mmheap);
}
console_init();
bl_show_log();
printf("dynamic memory init success,heap size = %d Kbyte \r\n", system_mmheap[0].mem_size / 1024);
printf("sig1:%08lx\r\n", BL_RD_REG(GLB_BASE, GLB_UART_CFG1));
printf("sig2:%08lx\r\n", BL_RD_REG(GLB_BASE, GLB_UART_CFG2));
#if (defined(CONFIG_LUA) || defined(CONFIG_BFLOG))
rtc = bflb_device_get_by_name("rtc");
bflb_rtc_set_time(rtc, BFLB_RTC_SEC2TIME(0));
#endif
#ifdef CONFIG_PSRAM
board_psram_x8_init();
Tzc_Sec_PSRAMB_Access_Release();
#endif
}
void board_uart1_gpio_init()
{
struct bflb_device_s *gpio;
gpio = bflb_device_get_by_name("gpio");
bflb_gpio_uart_init(gpio, GPIO_PIN_23, GPIO_UART_FUNC_UART1_TX);
bflb_gpio_uart_init(gpio, GPIO_PIN_24, GPIO_UART_FUNC_UART1_RX);
bflb_gpio_uart_init(gpio, GPIO_PIN_25, GPIO_UART_FUNC_UART1_CTS);
bflb_gpio_uart_init(gpio, GPIO_PIN_26, GPIO_UART_FUNC_UART1_RTS);
}
void board_i2c0_gpio_init()
{
struct bflb_device_s *gpio;
gpio = bflb_device_get_by_name("gpio");
/* I2C0_SDA */
bflb_gpio_init(gpio, GPIO_PIN_11, GPIO_FUNC_I2C0 | GPIO_ALTERNATE | GPIO_PULLUP | GPIO_SMT_EN | GPIO_DRV_1);
/* I2C0_SCL */
bflb_gpio_init(gpio, GPIO_PIN_16, GPIO_FUNC_I2C0 | GPIO_ALTERNATE | GPIO_PULLUP | GPIO_SMT_EN | GPIO_DRV_1);
}
void board_spi0_gpio_init()
{
struct bflb_device_s *gpio;
gpio = bflb_device_get_by_name("gpio");
bflb_gpio_init(gpio, GPIO_PIN_16, GPIO_FUNC_SPI0 | GPIO_ALTERNATE | GPIO_PULLUP | GPIO_SMT_EN | GPIO_DRV_1);
bflb_gpio_init(gpio, GPIO_PIN_17, GPIO_FUNC_SPI0 | GPIO_ALTERNATE | GPIO_PULLUP | GPIO_SMT_EN | GPIO_DRV_1);
bflb_gpio_init(gpio, GPIO_PIN_18, GPIO_FUNC_SPI0 | GPIO_ALTERNATE | GPIO_PULLUP | GPIO_SMT_EN | GPIO_DRV_1);
bflb_gpio_init(gpio, GPIO_PIN_19, GPIO_FUNC_SPI0 | GPIO_ALTERNATE | GPIO_PULLUP | GPIO_SMT_EN | GPIO_DRV_1);
}
void board_pwm0_gpio_init()
{
struct bflb_device_s *gpio;
gpio = bflb_device_get_by_name("gpio");
bflb_gpio_init(gpio, GPIO_PIN_24, GPIO_FUNC_PWM0 | GPIO_ALTERNATE | GPIO_PULLDOWN | GPIO_SMT_EN | GPIO_DRV_1);
bflb_gpio_init(gpio, GPIO_PIN_25, GPIO_FUNC_PWM0 | GPIO_ALTERNATE | GPIO_PULLUP | GPIO_SMT_EN | GPIO_DRV_1);
bflb_gpio_init(gpio, GPIO_PIN_26, GPIO_FUNC_PWM0 | GPIO_ALTERNATE | GPIO_PULLDOWN | GPIO_SMT_EN | GPIO_DRV_1);
bflb_gpio_init(gpio, GPIO_PIN_27, GPIO_FUNC_PWM0 | GPIO_ALTERNATE | GPIO_PULLUP | GPIO_SMT_EN | GPIO_DRV_1);
bflb_gpio_init(gpio, GPIO_PIN_28, GPIO_FUNC_PWM0 | GPIO_ALTERNATE | GPIO_PULLDOWN | GPIO_SMT_EN | GPIO_DRV_1);
bflb_gpio_init(gpio, GPIO_PIN_29, GPIO_FUNC_PWM0 | GPIO_ALTERNATE | GPIO_PULLUP | GPIO_SMT_EN | GPIO_DRV_1);
bflb_gpio_init(gpio, GPIO_PIN_30, GPIO_FUNC_PWM0 | GPIO_ALTERNATE | GPIO_PULLDOWN | GPIO_SMT_EN | GPIO_DRV_1);
bflb_gpio_init(gpio, GPIO_PIN_31, GPIO_FUNC_PWM0 | GPIO_ALTERNATE | GPIO_PULLUP | GPIO_SMT_EN | GPIO_DRV_1);
}
void board_adc_gpio_init()
{
struct bflb_device_s *gpio;
gpio = bflb_device_get_by_name("gpio");
/* ADC_CH0 */
bflb_gpio_init(gpio, GPIO_PIN_20, GPIO_ANALOG | GPIO_SMT_EN | GPIO_DRV_0);
/* ADC_CH8 */
bflb_gpio_init(gpio, GPIO_PIN_1, GPIO_ANALOG | GPIO_SMT_EN | GPIO_DRV_0);
/* ADC_CH9 */
bflb_gpio_init(gpio, GPIO_PIN_0, GPIO_ANALOG | GPIO_SMT_EN | GPIO_DRV_0);
/* ADC_CH10 */
bflb_gpio_init(gpio, GPIO_PIN_27, GPIO_ANALOG | GPIO_SMT_EN | GPIO_DRV_0);
/* ADC_CH11 */
bflb_gpio_init(gpio, GPIO_PIN_28, GPIO_ANALOG | GPIO_SMT_EN | GPIO_DRV_0);
}
void board_dac_gpio_init()
{
struct bflb_device_s *gpio;
gpio = bflb_device_get_by_name("gpio");
/* DAC_CHA */
bflb_gpio_init(gpio, GPIO_PIN_3, GPIO_ANALOG | GPIO_SMT_EN | GPIO_DRV_0);
/* DAC_CHB */
bflb_gpio_init(gpio, GPIO_PIN_2, GPIO_ANALOG | GPIO_SMT_EN | GPIO_DRV_0);
}
void board_emac_gpio_init()
{
struct bflb_device_s *gpio;
gpio = bflb_device_get_by_name("gpio");
bflb_gpio_init(gpio, GPIO_PIN_25, GPIO_FUNC_EMAC | GPIO_ALTERNATE | GPIO_PULLUP | GPIO_SMT_EN | GPIO_DRV_1);
bflb_gpio_init(gpio, GPIO_PIN_26, GPIO_FUNC_EMAC | GPIO_ALTERNATE | GPIO_PULLUP | GPIO_SMT_EN | GPIO_DRV_1);
bflb_gpio_init(gpio, GPIO_PIN_27, GPIO_FUNC_EMAC | GPIO_ALTERNATE | GPIO_PULLUP | GPIO_SMT_EN | GPIO_DRV_1);
bflb_gpio_init(gpio, GPIO_PIN_28, GPIO_FUNC_EMAC | GPIO_ALTERNATE | GPIO_PULLUP | GPIO_SMT_EN | GPIO_DRV_1);
bflb_gpio_init(gpio, GPIO_PIN_29, GPIO_FUNC_EMAC | GPIO_ALTERNATE | GPIO_PULLUP | GPIO_SMT_EN | GPIO_DRV_1);
bflb_gpio_init(gpio, GPIO_PIN_30, GPIO_FUNC_EMAC | GPIO_ALTERNATE | GPIO_PULLUP | GPIO_SMT_EN | GPIO_DRV_1);
bflb_gpio_init(gpio, GPIO_PIN_31, GPIO_FUNC_EMAC | GPIO_ALTERNATE | GPIO_PULLUP | GPIO_SMT_EN | GPIO_DRV_1);
bflb_gpio_init(gpio, GPIO_PIN_32, GPIO_FUNC_EMAC | GPIO_ALTERNATE | GPIO_PULLUP | GPIO_SMT_EN | GPIO_DRV_1);
bflb_gpio_init(gpio, GPIO_PIN_33, GPIO_FUNC_EMAC | GPIO_ALTERNATE | GPIO_PULLUP | GPIO_SMT_EN | GPIO_DRV_1);
bflb_gpio_init(gpio, GPIO_PIN_34, GPIO_FUNC_EMAC | GPIO_ALTERNATE | GPIO_PULLUP | GPIO_SMT_EN | GPIO_DRV_1);
#if defined(BL616)
GLB_Config_AUDIO_PLL_To_400M();
// GLB_PER_Clock_UnGate(GLB_AHB_CLOCK_IP_EMAC);
#endif
}
void board_sdh_gpio_init()
{
struct bflb_device_s *gpio;
gpio = bflb_device_get_by_name("gpio");
bflb_gpio_init(gpio, GPIO_PIN_10, GPIO_FUNC_SDH | GPIO_ALTERNATE | GPIO_PULLUP | GPIO_SMT_EN | GPIO_DRV_2);
bflb_gpio_init(gpio, GPIO_PIN_11, GPIO_FUNC_SDH | GPIO_ALTERNATE | GPIO_PULLUP | GPIO_SMT_EN | GPIO_DRV_2);
bflb_gpio_init(gpio, GPIO_PIN_12, GPIO_FUNC_SDH | GPIO_ALTERNATE | GPIO_PULLUP | GPIO_SMT_EN | GPIO_DRV_2);
bflb_gpio_init(gpio, GPIO_PIN_13, GPIO_FUNC_SDH | GPIO_ALTERNATE | GPIO_PULLUP | GPIO_SMT_EN | GPIO_DRV_2);
bflb_gpio_init(gpio, GPIO_PIN_14, GPIO_FUNC_SDH | GPIO_ALTERNATE | GPIO_PULLUP | GPIO_SMT_EN | GPIO_DRV_2);
bflb_gpio_init(gpio, GPIO_PIN_15, GPIO_FUNC_SDH | GPIO_ALTERNATE | GPIO_PULLUP | GPIO_SMT_EN | GPIO_DRV_2);
}
#ifdef CONFIG_BFLOG
__attribute__((weak)) uint64_t bflog_clock(void)
{
return CPU_Get_MTimer_Counter();
}
__attribute__((weak)) uint32_t bflog_time(void)
{
return BFLB_RTC_TIME2SEC(bflb_rtc_get_time(rtc));
}
__attribute__((weak)) char *bflog_thread(void)
{
return "";
}
#endif
#ifdef CONFIG_LUA
clock_t luaport_clock(void)
{
return (clock_t)CPU_Get_MTimer_Counter();
}
time_t luaport_time(time_t *seconds)
{
time_t t = (time_t)BFLB_RTC_TIME2SEC(bflb_rtc_get_time(rtc));
if (seconds != NULL) {
*seconds = t;
}
return t;
}
#endif