/**
******************************************************************************
* @file tzc_nsec_reg.h
* @version V1.2
* @date 2020-03-30
* @brief This file is the description of.IP register
******************************************************************************
* @attention
*
*
© COPYRIGHT(c) 2019 Bouffalo Lab
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
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* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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*
******************************************************************************
*/
#ifndef __TZC_NSEC_REG_H__
#define __TZC_NSEC_REG_H__
#include "bl702.h"
/* 0x40 : tzc_rom_ctrl */
#define TZC_NSEC_TZC_ROM_CTRL_OFFSET (0x40)
#define TZC_NSEC_TZC_ROM0_R0_ID0_EN TZC_NSEC_TZC_ROM0_R0_ID0_EN
#define TZC_NSEC_TZC_ROM0_R0_ID0_EN_POS (0U)
#define TZC_NSEC_TZC_ROM0_R0_ID0_EN_LEN (1U)
#define TZC_NSEC_TZC_ROM0_R0_ID0_EN_MSK (((1U<